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Searched defs:_reg (Results 1 – 15 of 15) sorted by relevance

/arch/mips/include/asm/mach-pic32/
Dpic32.h14 #define PIC32_CLR(_reg) ((_reg) + 0x04) argument
15 #define PIC32_SET(_reg) ((_reg) + 0x08) argument
16 #define PIC32_INV(_reg) ((_reg) + 0x0C) argument
/arch/arm/mach-mmp/
Dclock.h25 #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ argument
33 #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ argument
41 #define APMU_CLK(_name, _reg, _eval, _rate) \ argument
49 #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ argument
/arch/arm64/kvm/
Dregmap.c17 #define REG_OFFSET(_reg) \ argument
/arch/arm/kvm/
Demulate.c23 #define REG_OFFSET(_reg) \ argument
/arch/mips/include/asm/
Dkvm_host.h475 #define __BUILD_KVM_RW_SAVED(name, type, _reg, sel) \ argument
487 #define __BUILD_KVM_SET_SAVED(name, type, _reg, sel) \ argument
508 #define __BUILD_KVM_ATOMIC_SAVED(name, type, _reg, sel) \ argument
533 #define __BUILD_KVM_RW_VZ(name, type, _reg, sel) \ argument
545 #define __BUILD_KVM_SET_VZ(name, type, _reg, sel) \ argument
564 #define __BUILD_KVM_SAVE_VZ(name, _reg, sel) \ argument
616 #define __BUILD_KVM_RW_SW(name, type, _reg, sel) \ argument
620 #define __BUILD_KVM_SET_SW(name, type, _reg, sel) \ argument
624 #define __BUILD_KVM_ATOMIC_SW(name, type, _reg, sel) \ argument
657 #define __BUILD_KVM_RW_HW(name, type, _reg, sel) \ argument
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/arch/sh/kernel/cpu/sh4a/
Dclock-sh7366.c108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
128 #define MSTP(_parent, _reg, _bit, _flags) \ argument
Dclock-sh7343.c105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
125 #define MSTP(_parent, _reg, _bit, _flags) \ argument
Dclock-sh7723.c111 #define DIV4(_reg, _bit, _mask, _flags) \ argument
Dclock-sh7722.c108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
Dclock-sh7724.c150 #define DIV4(_reg, _bit, _mask, _flags) \ argument
Dclock-sh7734.c69 #define DIV4(_reg, _bit, _mask, _flags) \ argument
/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c77 #define DIV4(_reg, _bit, _mask, _flags) \ argument
Dclock-sh7269.c105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
/arch/ia64/kernel/
Dhead.S65 #define SAVE_ONE_RR(num, _reg, _tmp) \ argument
/arch/x86/kvm/vmx/
Dvmx.c7042 #define cr4_fixed1_update(_cr4_mask, _reg, _cpuid_mask) do { \ in nested_vmx_cr_fixed1_bits_update() argument