1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * SMP initialisation and IPI support
4 * Based on arch/arm/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 */
8
9 #include <linux/acpi.h>
10 #include <linux/arm_sdei.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/sched/mm.h>
15 #include <linux/sched/hotplug.h>
16 #include <linux/sched/task_stack.h>
17 #include <linux/interrupt.h>
18 #include <linux/cache.h>
19 #include <linux/profile.h>
20 #include <linux/errno.h>
21 #include <linux/mm.h>
22 #include <linux/err.h>
23 #include <linux/cpu.h>
24 #include <linux/smp.h>
25 #include <linux/seq_file.h>
26 #include <linux/irq.h>
27 #include <linux/irqchip/arm-gic-v3.h>
28 #include <linux/percpu.h>
29 #include <linux/clockchips.h>
30 #include <linux/completion.h>
31 #include <linux/of.h>
32 #include <linux/irq_work.h>
33 #include <linux/kexec.h>
34
35 #include <asm/alternative.h>
36 #include <asm/atomic.h>
37 #include <asm/cacheflush.h>
38 #include <asm/cpu.h>
39 #include <asm/cputype.h>
40 #include <asm/cpu_ops.h>
41 #include <asm/daifflags.h>
42 #include <asm/mmu_context.h>
43 #include <asm/numa.h>
44 #include <asm/pgtable.h>
45 #include <asm/pgalloc.h>
46 #include <asm/processor.h>
47 #include <asm/scs.h>
48 #include <asm/smp_plat.h>
49 #include <asm/sections.h>
50 #include <asm/tlbflush.h>
51 #include <asm/ptrace.h>
52 #include <asm/virt.h>
53
54 #define CREATE_TRACE_POINTS
55 #include <trace/events/ipi.h>
56 #undef CREATE_TRACE_POINTS
57 #include <trace/hooks/debug.h>
58
59 DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
60 EXPORT_PER_CPU_SYMBOL(cpu_number);
61
62 /*
63 * as from 2.5, kernels no longer have an init_tasks structure
64 * so we need some other way of telling a new secondary core
65 * where to place its SVC stack
66 */
67 struct secondary_data secondary_data;
68 /* Number of CPUs which aren't online, but looping in kernel text. */
69 int cpus_stuck_in_kernel;
70
71 enum ipi_msg_type {
72 IPI_RESCHEDULE,
73 IPI_CALL_FUNC,
74 IPI_CPU_STOP,
75 IPI_CPU_CRASH_STOP,
76 IPI_TIMER,
77 IPI_IRQ_WORK,
78 IPI_WAKEUP
79 };
80
81 #ifdef CONFIG_HOTPLUG_CPU
82 static int op_cpu_kill(unsigned int cpu);
83 #else
op_cpu_kill(unsigned int cpu)84 static inline int op_cpu_kill(unsigned int cpu)
85 {
86 return -ENOSYS;
87 }
88 #endif
89
90
91 /*
92 * Boot a secondary CPU, and assign it the specified idle task.
93 * This also gives us the initial stack to use for this CPU.
94 */
boot_secondary(unsigned int cpu,struct task_struct * idle)95 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
96 {
97 if (cpu_ops[cpu]->cpu_boot)
98 return cpu_ops[cpu]->cpu_boot(cpu);
99
100 return -EOPNOTSUPP;
101 }
102
103 static DECLARE_COMPLETION(cpu_running);
104
__cpu_up(unsigned int cpu,struct task_struct * idle)105 int __cpu_up(unsigned int cpu, struct task_struct *idle)
106 {
107 int ret;
108 long status;
109
110 /*
111 * We need to tell the secondary core where to find its stack and the
112 * page tables.
113 */
114 secondary_data.task = idle;
115 secondary_data.stack = task_stack_page(idle) + THREAD_SIZE;
116 update_cpu_boot_status(CPU_MMU_OFF);
117 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
118
119 /*
120 * Now bring the CPU into our world.
121 */
122 ret = boot_secondary(cpu, idle);
123 if (ret == 0) {
124 /*
125 * CPU was successfully started, wait for it to come online or
126 * time out.
127 */
128 wait_for_completion_timeout(&cpu_running,
129 msecs_to_jiffies(5000));
130
131 if (!cpu_online(cpu)) {
132 pr_crit("CPU%u: failed to come online\n", cpu);
133 ret = -EIO;
134 }
135 } else {
136 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
137 return ret;
138 }
139
140 secondary_data.task = NULL;
141 secondary_data.stack = NULL;
142 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
143 status = READ_ONCE(secondary_data.status);
144 if (ret && status) {
145
146 if (status == CPU_MMU_OFF)
147 status = READ_ONCE(__early_cpu_boot_status);
148
149 switch (status & CPU_BOOT_STATUS_MASK) {
150 default:
151 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
152 cpu, status);
153 cpus_stuck_in_kernel++;
154 break;
155 case CPU_KILL_ME:
156 if (!op_cpu_kill(cpu)) {
157 pr_crit("CPU%u: died during early boot\n", cpu);
158 break;
159 }
160 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
161 /* Fall through */
162 case CPU_STUCK_IN_KERNEL:
163 pr_crit("CPU%u: is stuck in kernel\n", cpu);
164 if (status & CPU_STUCK_REASON_52_BIT_VA)
165 pr_crit("CPU%u: does not support 52-bit VAs\n", cpu);
166 if (status & CPU_STUCK_REASON_NO_GRAN)
167 pr_crit("CPU%u: does not support %luK granule \n", cpu, PAGE_SIZE / SZ_1K);
168 cpus_stuck_in_kernel++;
169 break;
170 case CPU_PANIC_KERNEL:
171 panic("CPU%u detected unsupported configuration\n", cpu);
172 }
173 }
174
175 return ret;
176 }
177
init_gic_priority_masking(void)178 static void init_gic_priority_masking(void)
179 {
180 u32 cpuflags;
181
182 if (WARN_ON(!gic_enable_sre()))
183 return;
184
185 cpuflags = read_sysreg(daif);
186
187 WARN_ON(!(cpuflags & PSR_I_BIT));
188
189 gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
190 }
191
192 /*
193 * This is the secondary CPU boot entry. We're using this CPUs
194 * idle thread stack, but a set of temporary page tables.
195 */
secondary_start_kernel(void)196 asmlinkage notrace void secondary_start_kernel(void)
197 {
198 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
199 struct mm_struct *mm = &init_mm;
200 unsigned int cpu;
201
202 cpu = task_cpu(current);
203 set_my_cpu_offset(per_cpu_offset(cpu));
204
205 /*
206 * All kernel threads share the same mm context; grab a
207 * reference and switch to it.
208 */
209 mmgrab(mm);
210 current->active_mm = mm;
211
212 /*
213 * TTBR0 is only used for the identity mapping at this stage. Make it
214 * point to zero page to avoid speculatively fetching new entries.
215 */
216 cpu_uninstall_idmap();
217
218 if (system_uses_irq_prio_masking())
219 init_gic_priority_masking();
220
221 rcu_cpu_starting(cpu);
222 preempt_disable();
223 trace_hardirqs_off();
224
225 /*
226 * If the system has established the capabilities, make sure
227 * this CPU ticks all of those. If it doesn't, the CPU will
228 * fail to come online.
229 */
230 check_local_cpu_capabilities();
231
232 if (cpu_ops[cpu]->cpu_postboot)
233 cpu_ops[cpu]->cpu_postboot();
234
235 /*
236 * Log the CPU info before it is marked online and might get read.
237 */
238 cpuinfo_store_cpu();
239
240 /*
241 * Enable GIC and timers.
242 */
243 notify_cpu_starting(cpu);
244
245 store_cpu_topology(cpu);
246 numa_add_cpu(cpu);
247
248 /*
249 * OK, now it's safe to let the boot CPU continue. Wait for
250 * the CPU migration code to notice that the CPU is online
251 * before we continue.
252 */
253 pr_info("CPU%u: Booted secondary processor 0x%010lx [0x%08x]\n",
254 cpu, (unsigned long)mpidr,
255 read_cpuid_id());
256 update_cpu_boot_status(CPU_BOOT_SUCCESS);
257 set_cpu_online(cpu, true);
258 complete(&cpu_running);
259
260 local_daif_restore(DAIF_PROCCTX);
261
262 /*
263 * OK, it's off to the idle thread for us
264 */
265 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
266 }
267
268 #ifdef CONFIG_HOTPLUG_CPU
op_cpu_disable(unsigned int cpu)269 static int op_cpu_disable(unsigned int cpu)
270 {
271 /*
272 * If we don't have a cpu_die method, abort before we reach the point
273 * of no return. CPU0 may not have an cpu_ops, so test for it.
274 */
275 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
276 return -EOPNOTSUPP;
277
278 /*
279 * We may need to abort a hot unplug for some other mechanism-specific
280 * reason.
281 */
282 if (cpu_ops[cpu]->cpu_disable)
283 return cpu_ops[cpu]->cpu_disable(cpu);
284
285 return 0;
286 }
287
288 /*
289 * __cpu_disable runs on the processor to be shutdown.
290 */
__cpu_disable(void)291 int __cpu_disable(void)
292 {
293 unsigned int cpu = smp_processor_id();
294 int ret;
295
296 ret = op_cpu_disable(cpu);
297 if (ret)
298 return ret;
299
300 remove_cpu_topology(cpu);
301 numa_remove_cpu(cpu);
302
303 /*
304 * Take this CPU offline. Once we clear this, we can't return,
305 * and we must not schedule until we're ready to give up the cpu.
306 */
307 set_cpu_online(cpu, false);
308
309 /*
310 * OK - migrate IRQs away from this CPU
311 */
312 irq_migrate_all_off_this_cpu();
313
314 return 0;
315 }
316
op_cpu_kill(unsigned int cpu)317 static int op_cpu_kill(unsigned int cpu)
318 {
319 /*
320 * If we have no means of synchronising with the dying CPU, then assume
321 * that it is really dead. We can only wait for an arbitrary length of
322 * time and hope that it's dead, so let's skip the wait and just hope.
323 */
324 if (!cpu_ops[cpu]->cpu_kill)
325 return 0;
326
327 return cpu_ops[cpu]->cpu_kill(cpu);
328 }
329
330 /*
331 * called on the thread which is asking for a CPU to be shutdown -
332 * waits until shutdown has completed, or it is timed out.
333 */
__cpu_die(unsigned int cpu)334 void __cpu_die(unsigned int cpu)
335 {
336 int err;
337
338 if (!cpu_wait_death(cpu, 5)) {
339 pr_crit("CPU%u: cpu didn't die\n", cpu);
340 return;
341 }
342 pr_notice("CPU%u: shutdown\n", cpu);
343
344 /*
345 * Now that the dying CPU is beyond the point of no return w.r.t.
346 * in-kernel synchronisation, try to get the firwmare to help us to
347 * verify that it has really left the kernel before we consider
348 * clobbering anything it might still be using.
349 */
350 err = op_cpu_kill(cpu);
351 if (err)
352 pr_warn("CPU%d may not have shut down cleanly: %d\n",
353 cpu, err);
354 }
355
356 /*
357 * Called from the idle thread for the CPU which has been shutdown.
358 *
359 */
cpu_die(void)360 void cpu_die(void)
361 {
362 unsigned int cpu = smp_processor_id();
363
364 /* Save the shadow stack pointer before exiting the idle task */
365 scs_save(current);
366
367 idle_task_exit();
368
369 local_daif_mask();
370
371 /* Tell __cpu_die() that this CPU is now safe to dispose of */
372 (void)cpu_report_death();
373
374 /*
375 * Actually shutdown the CPU. This must never fail. The specific hotplug
376 * mechanism must perform all required cache maintenance to ensure that
377 * no dirty lines are lost in the process of shutting down the CPU.
378 */
379 cpu_ops[cpu]->cpu_die(cpu);
380
381 BUG();
382 }
383 #endif
384
385 /*
386 * Kill the calling secondary CPU, early in bringup before it is turned
387 * online.
388 */
cpu_die_early(void)389 void cpu_die_early(void)
390 {
391 int cpu = smp_processor_id();
392
393 pr_crit("CPU%d: will not boot\n", cpu);
394
395 /* Mark this CPU absent */
396 set_cpu_present(cpu, 0);
397 rcu_report_dead(cpu);
398
399 #ifdef CONFIG_HOTPLUG_CPU
400 update_cpu_boot_status(CPU_KILL_ME);
401 /* Check if we can park ourselves */
402 if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
403 cpu_ops[cpu]->cpu_die(cpu);
404 #endif
405 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
406
407 cpu_park_loop();
408 }
409
hyp_mode_check(void)410 static void __init hyp_mode_check(void)
411 {
412 if (is_hyp_mode_available())
413 pr_info("CPU: All CPU(s) started at EL2\n");
414 else if (is_hyp_mode_mismatched())
415 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
416 "CPU: CPUs started in inconsistent modes");
417 else
418 pr_info("CPU: All CPU(s) started at EL1\n");
419 }
420
smp_cpus_done(unsigned int max_cpus)421 void __init smp_cpus_done(unsigned int max_cpus)
422 {
423 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
424 setup_cpu_features();
425 hyp_mode_check();
426 apply_alternatives_all();
427 mark_linear_text_alias_ro();
428 }
429
smp_prepare_boot_cpu(void)430 void __init smp_prepare_boot_cpu(void)
431 {
432 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
433 cpuinfo_store_boot_cpu();
434
435 /*
436 * We now know enough about the boot CPU to apply the
437 * alternatives that cannot wait until interrupt handling
438 * and/or scheduling is enabled.
439 */
440 apply_boot_alternatives();
441
442 /* Conditionally switch to GIC PMR for interrupt masking */
443 if (system_uses_irq_prio_masking())
444 init_gic_priority_masking();
445 }
446
of_get_cpu_mpidr(struct device_node * dn)447 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
448 {
449 const __be32 *cell;
450 u64 hwid;
451
452 /*
453 * A cpu node with missing "reg" property is
454 * considered invalid to build a cpu_logical_map
455 * entry.
456 */
457 cell = of_get_property(dn, "reg", NULL);
458 if (!cell) {
459 pr_err("%pOF: missing reg property\n", dn);
460 return INVALID_HWID;
461 }
462
463 hwid = of_read_number(cell, of_n_addr_cells(dn));
464 /*
465 * Non affinity bits must be set to 0 in the DT
466 */
467 if (hwid & ~MPIDR_HWID_BITMASK) {
468 pr_err("%pOF: invalid reg property\n", dn);
469 return INVALID_HWID;
470 }
471 return hwid;
472 }
473
474 /*
475 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
476 * entries and check for duplicates. If any is found just ignore the
477 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
478 * matching valid MPIDR values.
479 */
is_mpidr_duplicate(unsigned int cpu,u64 hwid)480 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
481 {
482 unsigned int i;
483
484 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
485 if (cpu_logical_map(i) == hwid)
486 return true;
487 return false;
488 }
489
490 /*
491 * Initialize cpu operations for a logical cpu and
492 * set it in the possible mask on success
493 */
smp_cpu_setup(int cpu)494 static int __init smp_cpu_setup(int cpu)
495 {
496 if (cpu_read_ops(cpu))
497 return -ENODEV;
498
499 if (cpu_ops[cpu]->cpu_init(cpu))
500 return -ENODEV;
501
502 set_cpu_possible(cpu, true);
503
504 return 0;
505 }
506
507 static bool bootcpu_valid __initdata;
508 static unsigned int cpu_count = 1;
509
510 #ifdef CONFIG_ACPI
511 static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
512
acpi_cpu_get_madt_gicc(int cpu)513 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
514 {
515 return &cpu_madt_gicc[cpu];
516 }
517
518 /*
519 * acpi_map_gic_cpu_interface - parse processor MADT entry
520 *
521 * Carry out sanity checks on MADT processor entry and initialize
522 * cpu_logical_map on success
523 */
524 static void __init
acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt * processor)525 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
526 {
527 u64 hwid = processor->arm_mpidr;
528
529 if (!(processor->flags & ACPI_MADT_ENABLED)) {
530 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
531 return;
532 }
533
534 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
535 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
536 return;
537 }
538
539 if (is_mpidr_duplicate(cpu_count, hwid)) {
540 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
541 return;
542 }
543
544 /* Check if GICC structure of boot CPU is available in the MADT */
545 if (cpu_logical_map(0) == hwid) {
546 if (bootcpu_valid) {
547 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
548 hwid);
549 return;
550 }
551 bootcpu_valid = true;
552 cpu_madt_gicc[0] = *processor;
553 return;
554 }
555
556 if (cpu_count >= NR_CPUS)
557 return;
558
559 /* map the logical cpu id to cpu MPIDR */
560 set_cpu_logical_map(cpu_count, hwid);
561
562 cpu_madt_gicc[cpu_count] = *processor;
563
564 /*
565 * Set-up the ACPI parking protocol cpu entries
566 * while initializing the cpu_logical_map to
567 * avoid parsing MADT entries multiple times for
568 * nothing (ie a valid cpu_logical_map entry should
569 * contain a valid parking protocol data set to
570 * initialize the cpu if the parking protocol is
571 * the only available enable method).
572 */
573 acpi_set_mailbox_entry(cpu_count, processor);
574
575 cpu_count++;
576 }
577
578 static int __init
acpi_parse_gic_cpu_interface(union acpi_subtable_headers * header,const unsigned long end)579 acpi_parse_gic_cpu_interface(union acpi_subtable_headers *header,
580 const unsigned long end)
581 {
582 struct acpi_madt_generic_interrupt *processor;
583
584 processor = (struct acpi_madt_generic_interrupt *)header;
585 if (BAD_MADT_GICC_ENTRY(processor, end))
586 return -EINVAL;
587
588 acpi_table_print_madt_entry(&header->common);
589
590 acpi_map_gic_cpu_interface(processor);
591
592 return 0;
593 }
594
acpi_parse_and_init_cpus(void)595 static void __init acpi_parse_and_init_cpus(void)
596 {
597 int i;
598
599 /*
600 * do a walk of MADT to determine how many CPUs
601 * we have including disabled CPUs, and get information
602 * we need for SMP init.
603 */
604 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
605 acpi_parse_gic_cpu_interface, 0);
606
607 /*
608 * In ACPI, SMP and CPU NUMA information is provided in separate
609 * static tables, namely the MADT and the SRAT.
610 *
611 * Thus, it is simpler to first create the cpu logical map through
612 * an MADT walk and then map the logical cpus to their node ids
613 * as separate steps.
614 */
615 acpi_map_cpus_to_nodes();
616
617 for (i = 0; i < nr_cpu_ids; i++)
618 early_map_cpu_to_node(i, acpi_numa_get_nid(i));
619 }
620 #else
621 #define acpi_parse_and_init_cpus(...) do { } while (0)
622 #endif
623
624 /*
625 * Enumerate the possible CPU set from the device tree and build the
626 * cpu logical map array containing MPIDR values related to logical
627 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
628 */
of_parse_and_init_cpus(void)629 static void __init of_parse_and_init_cpus(void)
630 {
631 struct device_node *dn;
632
633 for_each_of_cpu_node(dn) {
634 u64 hwid = of_get_cpu_mpidr(dn);
635
636 if (hwid == INVALID_HWID)
637 goto next;
638
639 if (is_mpidr_duplicate(cpu_count, hwid)) {
640 pr_err("%pOF: duplicate cpu reg properties in the DT\n",
641 dn);
642 goto next;
643 }
644
645 /*
646 * The numbering scheme requires that the boot CPU
647 * must be assigned logical id 0. Record it so that
648 * the logical map built from DT is validated and can
649 * be used.
650 */
651 if (hwid == cpu_logical_map(0)) {
652 if (bootcpu_valid) {
653 pr_err("%pOF: duplicate boot cpu reg property in DT\n",
654 dn);
655 goto next;
656 }
657
658 bootcpu_valid = true;
659 early_map_cpu_to_node(0, of_node_to_nid(dn));
660
661 /*
662 * cpu_logical_map has already been
663 * initialized and the boot cpu doesn't need
664 * the enable-method so continue without
665 * incrementing cpu.
666 */
667 continue;
668 }
669
670 if (cpu_count >= NR_CPUS)
671 goto next;
672
673 pr_debug("cpu logical map 0x%llx\n", hwid);
674 set_cpu_logical_map(cpu_count, hwid);
675
676 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
677 next:
678 cpu_count++;
679 }
680 }
681
682 /*
683 * Enumerate the possible CPU set from the device tree or ACPI and build the
684 * cpu logical map array containing MPIDR values related to logical
685 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
686 */
smp_init_cpus(void)687 void __init smp_init_cpus(void)
688 {
689 int i;
690
691 if (acpi_disabled)
692 of_parse_and_init_cpus();
693 else
694 acpi_parse_and_init_cpus();
695
696 if (cpu_count > nr_cpu_ids)
697 pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
698 cpu_count, nr_cpu_ids);
699
700 if (!bootcpu_valid) {
701 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
702 return;
703 }
704
705 /*
706 * We need to set the cpu_logical_map entries before enabling
707 * the cpus so that cpu processor description entries (DT cpu nodes
708 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
709 * with entries in cpu_logical_map while initializing the cpus.
710 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
711 */
712 for (i = 1; i < nr_cpu_ids; i++) {
713 if (cpu_logical_map(i) != INVALID_HWID) {
714 if (smp_cpu_setup(i))
715 set_cpu_logical_map(i, INVALID_HWID);
716 }
717 }
718 }
719
smp_prepare_cpus(unsigned int max_cpus)720 void __init smp_prepare_cpus(unsigned int max_cpus)
721 {
722 int err;
723 unsigned int cpu;
724 unsigned int this_cpu;
725
726 init_cpu_topology();
727
728 this_cpu = smp_processor_id();
729 store_cpu_topology(this_cpu);
730 numa_store_cpu_info(this_cpu);
731 numa_add_cpu(this_cpu);
732
733 /*
734 * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
735 * secondary CPUs present.
736 */
737 if (max_cpus == 0)
738 return;
739
740 /*
741 * Initialise the present map (which describes the set of CPUs
742 * actually populated at the present time) and release the
743 * secondaries from the bootloader.
744 */
745 for_each_possible_cpu(cpu) {
746
747 per_cpu(cpu_number, cpu) = cpu;
748
749 if (cpu == smp_processor_id())
750 continue;
751
752 if (!cpu_ops[cpu])
753 continue;
754
755 err = cpu_ops[cpu]->cpu_prepare(cpu);
756 if (err)
757 continue;
758
759 set_cpu_present(cpu, true);
760 numa_store_cpu_info(cpu);
761 }
762 }
763
764 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
765
set_smp_cross_call(void (* fn)(const struct cpumask *,unsigned int))766 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
767 {
768 __smp_cross_call = fn;
769 }
770
771 static const char *ipi_types[NR_IPI] __tracepoint_string = {
772 #define S(x,s) [x] = s
773 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
774 S(IPI_CALL_FUNC, "Function call interrupts"),
775 S(IPI_CPU_STOP, "CPU stop interrupts"),
776 S(IPI_CPU_CRASH_STOP, "CPU stop (for crash dump) interrupts"),
777 S(IPI_TIMER, "Timer broadcast interrupts"),
778 S(IPI_IRQ_WORK, "IRQ work interrupts"),
779 S(IPI_WAKEUP, "CPU wake-up interrupts"),
780 };
781
smp_cross_call(const struct cpumask * target,unsigned int ipinr)782 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
783 {
784 trace_ipi_raise(target, ipi_types[ipinr]);
785 __smp_cross_call(target, ipinr);
786 }
787
show_ipi_list(struct seq_file * p,int prec)788 void show_ipi_list(struct seq_file *p, int prec)
789 {
790 unsigned int cpu, i;
791
792 for (i = 0; i < NR_IPI; i++) {
793 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
794 prec >= 4 ? " " : "");
795 for_each_online_cpu(cpu)
796 seq_printf(p, "%10u ",
797 __get_irq_stat(cpu, ipi_irqs[i]));
798 seq_printf(p, " %s\n", ipi_types[i]);
799 }
800 }
801
smp_irq_stat_cpu(unsigned int cpu)802 u64 smp_irq_stat_cpu(unsigned int cpu)
803 {
804 u64 sum = 0;
805 int i;
806
807 for (i = 0; i < NR_IPI; i++)
808 sum += __get_irq_stat(cpu, ipi_irqs[i]);
809
810 return sum;
811 }
812
arch_send_call_function_ipi_mask(const struct cpumask * mask)813 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
814 {
815 smp_cross_call(mask, IPI_CALL_FUNC);
816 }
817
arch_send_call_function_single_ipi(int cpu)818 void arch_send_call_function_single_ipi(int cpu)
819 {
820 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
821 }
822
823 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
arch_send_wakeup_ipi_mask(const struct cpumask * mask)824 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
825 {
826 smp_cross_call(mask, IPI_WAKEUP);
827 }
828 #endif
829
830 #ifdef CONFIG_IRQ_WORK
arch_irq_work_raise(void)831 void arch_irq_work_raise(void)
832 {
833 if (__smp_cross_call)
834 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
835 }
836 #endif
837
local_cpu_stop(void)838 static void local_cpu_stop(void)
839 {
840 set_cpu_online(smp_processor_id(), false);
841
842 local_daif_mask();
843 sdei_mask_local_cpu();
844 cpu_park_loop();
845 }
846
847 /*
848 * We need to implement panic_smp_self_stop() for parallel panic() calls, so
849 * that cpu_online_mask gets correctly updated and smp_send_stop() can skip
850 * CPUs that have already stopped themselves.
851 */
panic_smp_self_stop(void)852 void panic_smp_self_stop(void)
853 {
854 local_cpu_stop();
855 }
856
857 #ifdef CONFIG_KEXEC_CORE
858 static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
859 #endif
860
ipi_cpu_crash_stop(unsigned int cpu,struct pt_regs * regs)861 static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
862 {
863 #ifdef CONFIG_KEXEC_CORE
864 crash_save_cpu(regs, cpu);
865
866 atomic_dec(&waiting_for_crash_ipi);
867
868 local_irq_disable();
869 sdei_mask_local_cpu();
870
871 #ifdef CONFIG_HOTPLUG_CPU
872 if (cpu_ops[cpu]->cpu_die)
873 cpu_ops[cpu]->cpu_die(cpu);
874 #endif
875
876 /* just in case */
877 cpu_park_loop();
878 #endif
879 }
880
881 /*
882 * Main handler for inter-processor interrupts
883 */
handle_IPI(int ipinr,struct pt_regs * regs)884 void handle_IPI(int ipinr, struct pt_regs *regs)
885 {
886 unsigned int cpu = smp_processor_id();
887 struct pt_regs *old_regs = set_irq_regs(regs);
888
889 if ((unsigned)ipinr < NR_IPI) {
890 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
891 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
892 }
893
894 switch (ipinr) {
895 case IPI_RESCHEDULE:
896 scheduler_ipi();
897 break;
898
899 case IPI_CALL_FUNC:
900 irq_enter();
901 generic_smp_call_function_interrupt();
902 irq_exit();
903 break;
904
905 case IPI_CPU_STOP:
906 trace_android_vh_ipi_stop_rcuidle(regs);
907 irq_enter();
908 local_cpu_stop();
909 irq_exit();
910 break;
911
912 case IPI_CPU_CRASH_STOP:
913 if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
914 irq_enter();
915 ipi_cpu_crash_stop(cpu, regs);
916
917 unreachable();
918 }
919 break;
920
921 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
922 case IPI_TIMER:
923 irq_enter();
924 tick_receive_broadcast();
925 irq_exit();
926 break;
927 #endif
928
929 #ifdef CONFIG_IRQ_WORK
930 case IPI_IRQ_WORK:
931 irq_enter();
932 irq_work_run();
933 irq_exit();
934 break;
935 #endif
936
937 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
938 case IPI_WAKEUP:
939 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
940 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
941 cpu);
942 break;
943 #endif
944
945 default:
946 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
947 break;
948 }
949
950 if ((unsigned)ipinr < NR_IPI)
951 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
952 set_irq_regs(old_regs);
953 }
954
smp_send_reschedule(int cpu)955 void smp_send_reschedule(int cpu)
956 {
957 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
958 }
959
960 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
tick_broadcast(const struct cpumask * mask)961 void tick_broadcast(const struct cpumask *mask)
962 {
963 smp_cross_call(mask, IPI_TIMER);
964 }
965 #endif
966
967 /*
968 * The number of CPUs online, not counting this CPU (which may not be
969 * fully online and so not counted in num_online_cpus()).
970 */
num_other_online_cpus(void)971 static inline unsigned int num_other_online_cpus(void)
972 {
973 unsigned int this_cpu_online = cpu_online(smp_processor_id());
974
975 return num_online_cpus() - this_cpu_online;
976 }
977
smp_send_stop(void)978 void smp_send_stop(void)
979 {
980 unsigned long timeout;
981
982 if (num_other_online_cpus()) {
983 cpumask_t mask;
984
985 cpumask_copy(&mask, cpu_online_mask);
986 cpumask_clear_cpu(smp_processor_id(), &mask);
987
988 if (system_state <= SYSTEM_RUNNING)
989 pr_crit("SMP: stopping secondary CPUs\n");
990 smp_cross_call(&mask, IPI_CPU_STOP);
991 }
992
993 /* Wait up to one second for other CPUs to stop */
994 timeout = USEC_PER_SEC;
995 while (num_other_online_cpus() && timeout--)
996 udelay(1);
997
998 if (num_other_online_cpus())
999 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
1000 cpumask_pr_args(cpu_online_mask));
1001
1002 sdei_mask_local_cpu();
1003 }
1004
1005 #ifdef CONFIG_KEXEC_CORE
crash_smp_send_stop(void)1006 void crash_smp_send_stop(void)
1007 {
1008 static int cpus_stopped;
1009 cpumask_t mask;
1010 unsigned long timeout;
1011
1012 /*
1013 * This function can be called twice in panic path, but obviously
1014 * we execute this only once.
1015 */
1016 if (cpus_stopped)
1017 return;
1018
1019 cpus_stopped = 1;
1020
1021 /*
1022 * If this cpu is the only one alive at this point in time, online or
1023 * not, there are no stop messages to be sent around, so just back out.
1024 */
1025 if (num_other_online_cpus() == 0) {
1026 sdei_mask_local_cpu();
1027 return;
1028 }
1029
1030 cpumask_copy(&mask, cpu_online_mask);
1031 cpumask_clear_cpu(smp_processor_id(), &mask);
1032
1033 atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
1034
1035 pr_crit("SMP: stopping secondary CPUs\n");
1036 smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
1037
1038 /* Wait up to one second for other CPUs to stop */
1039 timeout = USEC_PER_SEC;
1040 while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
1041 udelay(1);
1042
1043 if (atomic_read(&waiting_for_crash_ipi) > 0)
1044 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
1045 cpumask_pr_args(&mask));
1046
1047 sdei_mask_local_cpu();
1048 }
1049
smp_crash_stop_failed(void)1050 bool smp_crash_stop_failed(void)
1051 {
1052 return (atomic_read(&waiting_for_crash_ipi) > 0);
1053 }
1054 #endif
1055
1056 /*
1057 * not supported here
1058 */
setup_profiling_timer(unsigned int multiplier)1059 int setup_profiling_timer(unsigned int multiplier)
1060 {
1061 return -EINVAL;
1062 }
1063
have_cpu_die(void)1064 static bool have_cpu_die(void)
1065 {
1066 #ifdef CONFIG_HOTPLUG_CPU
1067 int any_cpu = raw_smp_processor_id();
1068
1069 if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
1070 return true;
1071 #endif
1072 return false;
1073 }
1074
cpus_are_stuck_in_kernel(void)1075 bool cpus_are_stuck_in_kernel(void)
1076 {
1077 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
1078
1079 return !!cpus_stuck_in_kernel || smp_spin_tables;
1080 }
1081