1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
4 * E500 Book E processors.
5 *
6 * Copyright 2004,2010 Freescale Semiconductor, Inc.
7 *
8 * This file contains the routines for initializing the MMU
9 * on the 4xx series of chips.
10 * -- paulus
11 *
12 * Derived from arch/ppc/mm/init.c:
13 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
14 *
15 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
16 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
17 * Copyright (C) 1996 Paul Mackerras
18 *
19 * Derived from "arch/i386/mm/init.c"
20 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
21 */
22
23 #include <linux/signal.h>
24 #include <linux/sched.h>
25 #include <linux/kernel.h>
26 #include <linux/errno.h>
27 #include <linux/string.h>
28 #include <linux/types.h>
29 #include <linux/ptrace.h>
30 #include <linux/mman.h>
31 #include <linux/mm.h>
32 #include <linux/swap.h>
33 #include <linux/stddef.h>
34 #include <linux/vmalloc.h>
35 #include <linux/init.h>
36 #include <linux/delay.h>
37 #include <linux/highmem.h>
38 #include <linux/memblock.h>
39
40 #include <asm/pgalloc.h>
41 #include <asm/prom.h>
42 #include <asm/io.h>
43 #include <asm/mmu_context.h>
44 #include <asm/pgtable.h>
45 #include <asm/mmu.h>
46 #include <linux/uaccess.h>
47 #include <asm/smp.h>
48 #include <asm/machdep.h>
49 #include <asm/setup.h>
50 #include <asm/paca.h>
51
52 #include <mm/mmu_decl.h>
53
54 unsigned int tlbcam_index;
55
56 #define NUM_TLBCAMS (64)
57 struct tlbcam TLBCAM[NUM_TLBCAMS];
58
59 struct tlbcamrange {
60 unsigned long start;
61 unsigned long limit;
62 phys_addr_t phys;
63 } tlbcam_addrs[NUM_TLBCAMS];
64
tlbcam_sz(int idx)65 unsigned long tlbcam_sz(int idx)
66 {
67 return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
68 }
69
70 #ifdef CONFIG_FSL_BOOKE
71 /*
72 * Return PA for this VA if it is mapped by a CAM, or 0
73 */
v_block_mapped(unsigned long va)74 phys_addr_t v_block_mapped(unsigned long va)
75 {
76 int b;
77 for (b = 0; b < tlbcam_index; ++b)
78 if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
79 return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
80 return 0;
81 }
82
83 /*
84 * Return VA for a given PA or 0 if not mapped
85 */
p_block_mapped(phys_addr_t pa)86 unsigned long p_block_mapped(phys_addr_t pa)
87 {
88 int b;
89 for (b = 0; b < tlbcam_index; ++b)
90 if (pa >= tlbcam_addrs[b].phys
91 && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
92 +tlbcam_addrs[b].phys)
93 return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
94 return 0;
95 }
96 #endif
97
98 /*
99 * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
100 * in particular size must be a power of 4 between 4k and the max supported by
101 * an implementation; max may further be limited by what can be represented in
102 * an unsigned long (for example, 32-bit implementations cannot support a 4GB
103 * size).
104 */
settlbcam(int index,unsigned long virt,phys_addr_t phys,unsigned long size,unsigned long flags,unsigned int pid)105 static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
106 unsigned long size, unsigned long flags, unsigned int pid)
107 {
108 unsigned int tsize;
109
110 tsize = __ilog2(size) - 10;
111
112 #if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
113 if ((flags & _PAGE_NO_CACHE) == 0)
114 flags |= _PAGE_COHERENT;
115 #endif
116
117 TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
118 TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
119 TLBCAM[index].MAS2 = virt & PAGE_MASK;
120
121 TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
122 TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
123 TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
124 TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
125 TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
126
127 TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
128 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
129 if (mmu_has_feature(MMU_FTR_BIG_PHYS))
130 TLBCAM[index].MAS7 = (u64)phys >> 32;
131
132 /* Below is unlikely -- only for large user pages or similar */
133 if (pte_user(__pte(flags))) {
134 TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
135 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
136 }
137
138 tlbcam_addrs[index].start = virt;
139 tlbcam_addrs[index].limit = virt + size - 1;
140 tlbcam_addrs[index].phys = phys;
141 }
142
calc_cam_sz(unsigned long ram,unsigned long virt,phys_addr_t phys)143 unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
144 phys_addr_t phys)
145 {
146 unsigned int camsize = __ilog2(ram);
147 unsigned int align = __ffs(virt | phys);
148 unsigned long max_cam;
149
150 if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
151 /* Convert (4^max) kB to (2^max) bytes */
152 max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
153 camsize &= ~1U;
154 align &= ~1U;
155 } else {
156 /* Convert (2^max) kB to (2^max) bytes */
157 max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
158 }
159
160 if (camsize > align)
161 camsize = align;
162 if (camsize > max_cam)
163 camsize = max_cam;
164
165 return 1UL << camsize;
166 }
167
map_mem_in_cams_addr(phys_addr_t phys,unsigned long virt,unsigned long ram,int max_cam_idx,bool dryrun)168 static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt,
169 unsigned long ram, int max_cam_idx,
170 bool dryrun)
171 {
172 int i;
173 unsigned long amount_mapped = 0;
174
175 /* Calculate CAM values */
176 for (i = 0; ram && i < max_cam_idx; i++) {
177 unsigned long cam_sz;
178
179 cam_sz = calc_cam_sz(ram, virt, phys);
180 if (!dryrun)
181 settlbcam(i, virt, phys, cam_sz,
182 pgprot_val(PAGE_KERNEL_X), 0);
183
184 ram -= cam_sz;
185 amount_mapped += cam_sz;
186 virt += cam_sz;
187 phys += cam_sz;
188 }
189
190 if (dryrun)
191 return amount_mapped;
192
193 loadcam_multi(0, i, max_cam_idx);
194 tlbcam_index = i;
195
196 #ifdef CONFIG_PPC64
197 get_paca()->tcd.esel_next = i;
198 get_paca()->tcd.esel_max = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
199 get_paca()->tcd.esel_first = i;
200 #endif
201
202 return amount_mapped;
203 }
204
map_mem_in_cams(unsigned long ram,int max_cam_idx,bool dryrun)205 unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, bool dryrun)
206 {
207 unsigned long virt = PAGE_OFFSET;
208 phys_addr_t phys = memstart_addr;
209
210 return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx, dryrun);
211 }
212
213 #ifdef CONFIG_PPC32
214
215 #if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
216 #error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
217 #endif
218
mmu_mapin_ram(unsigned long base,unsigned long top)219 unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
220 {
221 return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
222 }
223
224 /*
225 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
226 */
MMU_init_hw(void)227 void __init MMU_init_hw(void)
228 {
229 flush_instruction_cache();
230 }
231
adjust_total_lowmem(void)232 void __init adjust_total_lowmem(void)
233 {
234 unsigned long ram;
235 int i;
236
237 /* adjust lowmem size to __max_low_memory */
238 ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
239
240 i = switch_to_as1();
241 __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM, false);
242 restore_to_as0(i, 0, 0, 1);
243
244 pr_info("Memory CAM mapping: ");
245 for (i = 0; i < tlbcam_index - 1; i++)
246 pr_cont("%lu/", tlbcam_sz(i) >> 20);
247 pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
248 (unsigned int)((total_lowmem - __max_low_memory) >> 20));
249
250 memblock_set_current_limit(memstart_addr + __max_low_memory);
251 }
252
setup_initial_memory_limit(phys_addr_t first_memblock_base,phys_addr_t first_memblock_size)253 void setup_initial_memory_limit(phys_addr_t first_memblock_base,
254 phys_addr_t first_memblock_size)
255 {
256 phys_addr_t limit = first_memblock_base + first_memblock_size;
257
258 /* 64M mapped initially according to head_fsl_booke.S */
259 memblock_set_current_limit(min_t(u64, limit, 0x04000000));
260 }
261
262 #ifdef CONFIG_RELOCATABLE
263 int __initdata is_second_reloc;
relocate_init(u64 dt_ptr,phys_addr_t start)264 notrace void __init relocate_init(u64 dt_ptr, phys_addr_t start)
265 {
266 unsigned long base = KERNELBASE;
267
268 kernstart_addr = start;
269 if (is_second_reloc) {
270 virt_phys_offset = PAGE_OFFSET - memstart_addr;
271 return;
272 }
273
274 /*
275 * Relocatable kernel support based on processing of dynamic
276 * relocation entries. Before we get the real memstart_addr,
277 * We will compute the virt_phys_offset like this:
278 * virt_phys_offset = stext.run - kernstart_addr
279 *
280 * stext.run = (KERNELBASE & ~0x3ffffff) +
281 * (kernstart_addr & 0x3ffffff)
282 * When we relocate, we have :
283 *
284 * (kernstart_addr & 0x3ffffff) = (stext.run & 0x3ffffff)
285 *
286 * hence:
287 * virt_phys_offset = (KERNELBASE & ~0x3ffffff) -
288 * (kernstart_addr & ~0x3ffffff)
289 *
290 */
291 start &= ~0x3ffffff;
292 base &= ~0x3ffffff;
293 virt_phys_offset = base - start;
294 early_get_first_memblock_info(__va(dt_ptr), NULL);
295 /*
296 * We now get the memstart_addr, then we should check if this
297 * address is the same as what the PAGE_OFFSET map to now. If
298 * not we have to change the map of PAGE_OFFSET to memstart_addr
299 * and do a second relocation.
300 */
301 if (start != memstart_addr) {
302 int n;
303 long offset = start - memstart_addr;
304
305 is_second_reloc = 1;
306 n = switch_to_as1();
307 /* map a 64M area for the second relocation */
308 if (memstart_addr > start)
309 map_mem_in_cams(0x4000000, CONFIG_LOWMEM_CAM_NUM,
310 false);
311 else
312 map_mem_in_cams_addr(start, PAGE_OFFSET + offset,
313 0x4000000, CONFIG_LOWMEM_CAM_NUM,
314 false);
315 restore_to_as0(n, offset, __va(dt_ptr), 1);
316 /* We should never reach here */
317 panic("Relocation error");
318 }
319 }
320 #endif
321 #endif
322