• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
7 //
8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 //
10 // Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided
11 // by platform driver code.
12 //
13 
14 #include <linux/mutex.h>
15 #include <linux/types.h>
16 
17 #include "sof-priv.h"
18 #include "ops.h"
19 
20 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id);
21 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd);
22 
23 /*
24  * IPC message Tx/Rx message handling.
25  */
26 
27 /* SOF generic IPC data */
28 struct snd_sof_ipc {
29 	struct snd_sof_dev *sdev;
30 
31 	/* protects messages and the disable flag */
32 	struct mutex tx_mutex;
33 	/* disables further sending of ipc's */
34 	bool disable_ipc_tx;
35 
36 	struct snd_sof_ipc_msg msg;
37 };
38 
39 struct sof_ipc_ctrl_data_params {
40 	size_t msg_bytes;
41 	size_t hdr_bytes;
42 	size_t pl_size;
43 	size_t elems;
44 	u32 num_msg;
45 	u8 *src;
46 	u8 *dst;
47 };
48 
49 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
ipc_log_header(struct device * dev,u8 * text,u32 cmd)50 static void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
51 {
52 	u8 *str;
53 	u8 *str2 = NULL;
54 	u32 glb;
55 	u32 type;
56 
57 	glb = cmd & SOF_GLB_TYPE_MASK;
58 	type = cmd & SOF_CMD_TYPE_MASK;
59 
60 	switch (glb) {
61 	case SOF_IPC_GLB_REPLY:
62 		str = "GLB_REPLY"; break;
63 	case SOF_IPC_GLB_COMPOUND:
64 		str = "GLB_COMPOUND"; break;
65 	case SOF_IPC_GLB_TPLG_MSG:
66 		str = "GLB_TPLG_MSG";
67 		switch (type) {
68 		case SOF_IPC_TPLG_COMP_NEW:
69 			str2 = "COMP_NEW"; break;
70 		case SOF_IPC_TPLG_COMP_FREE:
71 			str2 = "COMP_FREE"; break;
72 		case SOF_IPC_TPLG_COMP_CONNECT:
73 			str2 = "COMP_CONNECT"; break;
74 		case SOF_IPC_TPLG_PIPE_NEW:
75 			str2 = "PIPE_NEW"; break;
76 		case SOF_IPC_TPLG_PIPE_FREE:
77 			str2 = "PIPE_FREE"; break;
78 		case SOF_IPC_TPLG_PIPE_CONNECT:
79 			str2 = "PIPE_CONNECT"; break;
80 		case SOF_IPC_TPLG_PIPE_COMPLETE:
81 			str2 = "PIPE_COMPLETE"; break;
82 		case SOF_IPC_TPLG_BUFFER_NEW:
83 			str2 = "BUFFER_NEW"; break;
84 		case SOF_IPC_TPLG_BUFFER_FREE:
85 			str2 = "BUFFER_FREE"; break;
86 		default:
87 			str2 = "unknown type"; break;
88 		}
89 		break;
90 	case SOF_IPC_GLB_PM_MSG:
91 		str = "GLB_PM_MSG";
92 		switch (type) {
93 		case SOF_IPC_PM_CTX_SAVE:
94 			str2 = "CTX_SAVE"; break;
95 		case SOF_IPC_PM_CTX_RESTORE:
96 			str2 = "CTX_RESTORE"; break;
97 		case SOF_IPC_PM_CTX_SIZE:
98 			str2 = "CTX_SIZE"; break;
99 		case SOF_IPC_PM_CLK_SET:
100 			str2 = "CLK_SET"; break;
101 		case SOF_IPC_PM_CLK_GET:
102 			str2 = "CLK_GET"; break;
103 		case SOF_IPC_PM_CLK_REQ:
104 			str2 = "CLK_REQ"; break;
105 		case SOF_IPC_PM_CORE_ENABLE:
106 			str2 = "CORE_ENABLE"; break;
107 		default:
108 			str2 = "unknown type"; break;
109 		}
110 		break;
111 	case SOF_IPC_GLB_COMP_MSG:
112 		str = "GLB_COMP_MSG";
113 		switch (type) {
114 		case SOF_IPC_COMP_SET_VALUE:
115 			str2 = "SET_VALUE"; break;
116 		case SOF_IPC_COMP_GET_VALUE:
117 			str2 = "GET_VALUE"; break;
118 		case SOF_IPC_COMP_SET_DATA:
119 			str2 = "SET_DATA"; break;
120 		case SOF_IPC_COMP_GET_DATA:
121 			str2 = "GET_DATA"; break;
122 		default:
123 			str2 = "unknown type"; break;
124 		}
125 		break;
126 	case SOF_IPC_GLB_STREAM_MSG:
127 		str = "GLB_STREAM_MSG";
128 		switch (type) {
129 		case SOF_IPC_STREAM_PCM_PARAMS:
130 			str2 = "PCM_PARAMS"; break;
131 		case SOF_IPC_STREAM_PCM_PARAMS_REPLY:
132 			str2 = "PCM_REPLY"; break;
133 		case SOF_IPC_STREAM_PCM_FREE:
134 			str2 = "PCM_FREE"; break;
135 		case SOF_IPC_STREAM_TRIG_START:
136 			str2 = "TRIG_START"; break;
137 		case SOF_IPC_STREAM_TRIG_STOP:
138 			str2 = "TRIG_STOP"; break;
139 		case SOF_IPC_STREAM_TRIG_PAUSE:
140 			str2 = "TRIG_PAUSE"; break;
141 		case SOF_IPC_STREAM_TRIG_RELEASE:
142 			str2 = "TRIG_RELEASE"; break;
143 		case SOF_IPC_STREAM_TRIG_DRAIN:
144 			str2 = "TRIG_DRAIN"; break;
145 		case SOF_IPC_STREAM_TRIG_XRUN:
146 			str2 = "TRIG_XRUN"; break;
147 		case SOF_IPC_STREAM_POSITION:
148 			str2 = "POSITION"; break;
149 		case SOF_IPC_STREAM_VORBIS_PARAMS:
150 			str2 = "VORBIS_PARAMS"; break;
151 		case SOF_IPC_STREAM_VORBIS_FREE:
152 			str2 = "VORBIS_FREE"; break;
153 		default:
154 			str2 = "unknown type"; break;
155 		}
156 		break;
157 	case SOF_IPC_FW_READY:
158 		str = "FW_READY"; break;
159 	case SOF_IPC_GLB_DAI_MSG:
160 		str = "GLB_DAI_MSG";
161 		switch (type) {
162 		case SOF_IPC_DAI_CONFIG:
163 			str2 = "CONFIG"; break;
164 		case SOF_IPC_DAI_LOOPBACK:
165 			str2 = "LOOPBACK"; break;
166 		default:
167 			str2 = "unknown type"; break;
168 		}
169 		break;
170 	case SOF_IPC_GLB_TRACE_MSG:
171 		str = "GLB_TRACE_MSG"; break;
172 	case SOF_IPC_GLB_TEST_MSG:
173 		str = "GLB_TEST_MSG";
174 		switch (type) {
175 		case SOF_IPC_TEST_IPC_FLOOD:
176 			str2 = "IPC_FLOOD"; break;
177 		default:
178 			str2 = "unknown type"; break;
179 		}
180 		break;
181 	default:
182 		str = "unknown GLB command"; break;
183 	}
184 
185 	if (str2)
186 		dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2);
187 	else
188 		dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str);
189 }
190 #else
ipc_log_header(struct device * dev,u8 * text,u32 cmd)191 static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
192 {
193 	if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG)
194 		dev_dbg(dev, "%s: 0x%x\n", text, cmd);
195 }
196 #endif
197 
198 /* wait for IPC message reply */
tx_wait_done(struct snd_sof_ipc * ipc,struct snd_sof_ipc_msg * msg,void * reply_data)199 static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg,
200 			void *reply_data)
201 {
202 	struct snd_sof_dev *sdev = ipc->sdev;
203 	struct sof_ipc_cmd_hdr *hdr = msg->msg_data;
204 	int ret;
205 
206 	/* wait for DSP IPC completion */
207 	ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
208 				 msecs_to_jiffies(sdev->ipc_timeout));
209 
210 	if (ret == 0) {
211 		dev_err(sdev->dev, "error: ipc timed out for 0x%x size %d\n",
212 			hdr->cmd, hdr->size);
213 		snd_sof_dsp_dbg_dump(ipc->sdev, SOF_DBG_REGS | SOF_DBG_MBOX);
214 		snd_sof_ipc_dump(ipc->sdev);
215 		snd_sof_trace_notify_for_error(ipc->sdev);
216 		ret = -ETIMEDOUT;
217 	} else {
218 		ret = msg->reply_error;
219 		if (ret < 0) {
220 			dev_err(sdev->dev, "error: ipc error for 0x%x size %zu\n",
221 				hdr->cmd, msg->reply_size);
222 		} else {
223 			ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd);
224 			if (msg->reply_size)
225 				/* copy the data returned from DSP */
226 				memcpy(reply_data, msg->reply_data,
227 				       msg->reply_size);
228 		}
229 	}
230 
231 	return ret;
232 }
233 
234 /* send IPC message from host to DSP */
sof_ipc_tx_message_unlocked(struct snd_sof_ipc * ipc,u32 header,void * msg_data,size_t msg_bytes,void * reply_data,size_t reply_bytes)235 static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header,
236 				       void *msg_data, size_t msg_bytes,
237 				       void *reply_data, size_t reply_bytes)
238 {
239 	struct snd_sof_dev *sdev = ipc->sdev;
240 	struct snd_sof_ipc_msg *msg;
241 	int ret;
242 
243 	if (ipc->disable_ipc_tx)
244 		return -ENODEV;
245 
246 	/*
247 	 * The spin-lock is also still needed to protect message objects against
248 	 * other atomic contexts.
249 	 */
250 	spin_lock_irq(&sdev->ipc_lock);
251 
252 	/* initialise the message */
253 	msg = &ipc->msg;
254 
255 	msg->header = header;
256 	msg->msg_size = msg_bytes;
257 	msg->reply_size = reply_bytes;
258 	msg->reply_error = 0;
259 
260 	/* attach any data */
261 	if (msg_bytes)
262 		memcpy(msg->msg_data, msg_data, msg_bytes);
263 
264 	sdev->msg = msg;
265 
266 	ret = snd_sof_dsp_send_msg(sdev, msg);
267 	/* Next reply that we receive will be related to this message */
268 	if (!ret)
269 		msg->ipc_complete = false;
270 
271 	spin_unlock_irq(&sdev->ipc_lock);
272 
273 	if (ret < 0) {
274 		/* So far IPC TX never fails, consider making the above void */
275 		dev_err_ratelimited(sdev->dev,
276 				    "error: ipc tx failed with error %d\n",
277 				    ret);
278 		return ret;
279 	}
280 
281 	ipc_log_header(sdev->dev, "ipc tx", msg->header);
282 
283 	/* now wait for completion */
284 	if (!ret)
285 		ret = tx_wait_done(ipc, msg, reply_data);
286 
287 	return ret;
288 }
289 
290 /* send IPC message from host to DSP */
sof_ipc_tx_message(struct snd_sof_ipc * ipc,u32 header,void * msg_data,size_t msg_bytes,void * reply_data,size_t reply_bytes)291 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
292 		       void *msg_data, size_t msg_bytes, void *reply_data,
293 		       size_t reply_bytes)
294 {
295 	int ret;
296 
297 	if (msg_bytes > SOF_IPC_MSG_MAX_SIZE ||
298 	    reply_bytes > SOF_IPC_MSG_MAX_SIZE)
299 		return -ENOBUFS;
300 
301 	/* Serialise IPC TX */
302 	mutex_lock(&ipc->tx_mutex);
303 
304 	ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes,
305 					  reply_data, reply_bytes);
306 
307 	mutex_unlock(&ipc->tx_mutex);
308 
309 	return ret;
310 }
311 EXPORT_SYMBOL(sof_ipc_tx_message);
312 
313 /* handle reply message from DSP */
snd_sof_ipc_reply(struct snd_sof_dev * sdev,u32 msg_id)314 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id)
315 {
316 	struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
317 
318 	if (msg->ipc_complete) {
319 		dev_err(sdev->dev, "error: no reply expected, received 0x%x",
320 			msg_id);
321 		return -EINVAL;
322 	}
323 
324 	/* wake up and return the error if we have waiters on this message ? */
325 	msg->ipc_complete = true;
326 	wake_up(&msg->waitq);
327 
328 	return 0;
329 }
330 EXPORT_SYMBOL(snd_sof_ipc_reply);
331 
332 /* DSP firmware has sent host a message  */
snd_sof_ipc_msgs_rx(struct snd_sof_dev * sdev)333 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
334 {
335 	struct sof_ipc_cmd_hdr hdr;
336 	u32 cmd, type;
337 	int err = 0;
338 
339 	/* read back header */
340 	snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr));
341 	ipc_log_header(sdev->dev, "ipc rx", hdr.cmd);
342 
343 	cmd = hdr.cmd & SOF_GLB_TYPE_MASK;
344 	type = hdr.cmd & SOF_CMD_TYPE_MASK;
345 
346 	/* check message type */
347 	switch (cmd) {
348 	case SOF_IPC_GLB_REPLY:
349 		dev_err(sdev->dev, "error: ipc reply unknown\n");
350 		break;
351 	case SOF_IPC_FW_READY:
352 		/* check for FW boot completion */
353 		if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
354 			err = sof_ops(sdev)->fw_ready(sdev, cmd);
355 			if (err < 0)
356 				sdev->fw_state = SOF_FW_BOOT_READY_FAILED;
357 			else
358 				sdev->fw_state = SOF_FW_BOOT_COMPLETE;
359 
360 			/* wake up firmware loader */
361 			wake_up(&sdev->boot_wait);
362 		}
363 		break;
364 	case SOF_IPC_GLB_COMPOUND:
365 	case SOF_IPC_GLB_TPLG_MSG:
366 	case SOF_IPC_GLB_PM_MSG:
367 	case SOF_IPC_GLB_COMP_MSG:
368 		break;
369 	case SOF_IPC_GLB_STREAM_MSG:
370 		/* need to pass msg id into the function */
371 		ipc_stream_message(sdev, hdr.cmd);
372 		break;
373 	case SOF_IPC_GLB_TRACE_MSG:
374 		ipc_trace_message(sdev, type);
375 		break;
376 	default:
377 		dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd);
378 		break;
379 	}
380 
381 	ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd);
382 }
383 EXPORT_SYMBOL(snd_sof_ipc_msgs_rx);
384 
385 /*
386  * IPC trace mechanism.
387  */
388 
ipc_trace_message(struct snd_sof_dev * sdev,u32 msg_id)389 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id)
390 {
391 	struct sof_ipc_dma_trace_posn posn;
392 
393 	switch (msg_id) {
394 	case SOF_IPC_TRACE_DMA_POSITION:
395 		/* read back full message */
396 		snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn));
397 		snd_sof_trace_update_pos(sdev, &posn);
398 		break;
399 	default:
400 		dev_err(sdev->dev, "error: unhandled trace message %x\n",
401 			msg_id);
402 		break;
403 	}
404 }
405 
406 /*
407  * IPC stream position.
408  */
409 
ipc_period_elapsed(struct snd_sof_dev * sdev,u32 msg_id)410 static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id)
411 {
412 	struct snd_sof_pcm_stream *stream;
413 	struct sof_ipc_stream_posn posn;
414 	struct snd_sof_pcm *spcm;
415 	int direction;
416 
417 	spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction);
418 	if (!spcm) {
419 		dev_err(sdev->dev,
420 			"error: period elapsed for unknown stream, msg_id %d\n",
421 			msg_id);
422 		return;
423 	}
424 
425 	stream = &spcm->stream[direction];
426 	snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
427 
428 	dev_dbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n",
429 		posn.host_posn, posn.dai_posn, posn.wallclock);
430 
431 	memcpy(&stream->posn, &posn, sizeof(posn));
432 
433 	/* only inform ALSA for period_wakeup mode */
434 	if (!stream->substream->runtime->no_period_wakeup)
435 		snd_sof_pcm_period_elapsed(stream->substream);
436 }
437 
438 /* DSP notifies host of an XRUN within FW */
ipc_xrun(struct snd_sof_dev * sdev,u32 msg_id)439 static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id)
440 {
441 	struct snd_sof_pcm_stream *stream;
442 	struct sof_ipc_stream_posn posn;
443 	struct snd_sof_pcm *spcm;
444 	int direction;
445 
446 	spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction);
447 	if (!spcm) {
448 		dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n",
449 			msg_id);
450 		return;
451 	}
452 
453 	stream = &spcm->stream[direction];
454 	snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
455 
456 	dev_dbg(sdev->dev,  "posn XRUN: host %llx comp %d size %d\n",
457 		posn.host_posn, posn.xrun_comp_id, posn.xrun_size);
458 
459 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP)
460 	/* stop PCM on XRUN - used for pipeline debug */
461 	memcpy(&stream->posn, &posn, sizeof(posn));
462 	snd_pcm_stop_xrun(stream->substream);
463 #endif
464 }
465 
466 /* stream notifications from DSP FW */
ipc_stream_message(struct snd_sof_dev * sdev,u32 msg_cmd)467 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd)
468 {
469 	/* get msg cmd type and msd id */
470 	u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK;
471 	u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd);
472 
473 	switch (msg_type) {
474 	case SOF_IPC_STREAM_POSITION:
475 		ipc_period_elapsed(sdev, msg_id);
476 		break;
477 	case SOF_IPC_STREAM_TRIG_XRUN:
478 		ipc_xrun(sdev, msg_id);
479 		break;
480 	default:
481 		dev_err(sdev->dev, "error: unhandled stream message %x\n",
482 			msg_id);
483 		break;
484 	}
485 }
486 
487 /* get stream position IPC - use faster MMIO method if available on platform */
snd_sof_ipc_stream_posn(struct snd_sof_dev * sdev,struct snd_sof_pcm * spcm,int direction,struct sof_ipc_stream_posn * posn)488 int snd_sof_ipc_stream_posn(struct snd_sof_dev *sdev,
489 			    struct snd_sof_pcm *spcm, int direction,
490 			    struct sof_ipc_stream_posn *posn)
491 {
492 	struct sof_ipc_stream stream;
493 	int err;
494 
495 	/* read position via slower IPC */
496 	stream.hdr.size = sizeof(stream);
497 	stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION;
498 	stream.comp_id = spcm->stream[direction].comp_id;
499 
500 	/* send IPC to the DSP */
501 	err = sof_ipc_tx_message(sdev->ipc,
502 				 stream.hdr.cmd, &stream, sizeof(stream), posn,
503 				 sizeof(*posn));
504 	if (err < 0) {
505 		dev_err(sdev->dev, "error: failed to get stream %d position\n",
506 			stream.comp_id);
507 		return err;
508 	}
509 
510 	return 0;
511 }
512 EXPORT_SYMBOL(snd_sof_ipc_stream_posn);
513 
sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type,struct sof_ipc_ctrl_data * src,struct sof_ipc_ctrl_data * dst,struct sof_ipc_ctrl_data_params * sparams)514 static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type,
515 				    struct sof_ipc_ctrl_data *src,
516 				    struct sof_ipc_ctrl_data *dst,
517 				    struct sof_ipc_ctrl_data_params *sparams)
518 {
519 	switch (ctrl_type) {
520 	case SOF_CTRL_TYPE_VALUE_CHAN_GET:
521 	case SOF_CTRL_TYPE_VALUE_CHAN_SET:
522 		sparams->src = (u8 *)src->chanv;
523 		sparams->dst = (u8 *)dst->chanv;
524 		break;
525 	case SOF_CTRL_TYPE_VALUE_COMP_GET:
526 	case SOF_CTRL_TYPE_VALUE_COMP_SET:
527 		sparams->src = (u8 *)src->compv;
528 		sparams->dst = (u8 *)dst->compv;
529 		break;
530 	case SOF_CTRL_TYPE_DATA_GET:
531 	case SOF_CTRL_TYPE_DATA_SET:
532 		sparams->src = (u8 *)src->data->data;
533 		sparams->dst = (u8 *)dst->data->data;
534 		break;
535 	default:
536 		return -EINVAL;
537 	}
538 
539 	/* calculate payload size and number of messages */
540 	sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes;
541 	sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size);
542 
543 	return 0;
544 }
545 
sof_set_get_large_ctrl_data(struct snd_sof_dev * sdev,struct sof_ipc_ctrl_data * cdata,struct sof_ipc_ctrl_data_params * sparams,bool send)546 static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev,
547 				       struct sof_ipc_ctrl_data *cdata,
548 				       struct sof_ipc_ctrl_data_params *sparams,
549 				       bool send)
550 {
551 	struct sof_ipc_ctrl_data *partdata;
552 	size_t send_bytes;
553 	size_t offset = 0;
554 	size_t msg_bytes;
555 	size_t pl_size;
556 	int err;
557 	int i;
558 
559 	/* allocate max ipc size because we have at least one */
560 	partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL);
561 	if (!partdata)
562 		return -ENOMEM;
563 
564 	if (send)
565 		err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata,
566 					       sparams);
567 	else
568 		err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata,
569 					       sparams);
570 	if (err < 0) {
571 		kfree(partdata);
572 		return err;
573 	}
574 
575 	msg_bytes = sparams->msg_bytes;
576 	pl_size = sparams->pl_size;
577 
578 	/* copy the header data */
579 	memcpy(partdata, cdata, sparams->hdr_bytes);
580 
581 	/* Serialise IPC TX */
582 	mutex_lock(&sdev->ipc->tx_mutex);
583 
584 	/* copy the payload data in a loop */
585 	for (i = 0; i < sparams->num_msg; i++) {
586 		send_bytes = min(msg_bytes, pl_size);
587 		partdata->num_elems = send_bytes;
588 		partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes;
589 		partdata->msg_index = i;
590 		msg_bytes -= send_bytes;
591 		partdata->elems_remaining = msg_bytes;
592 
593 		if (send)
594 			memcpy(sparams->dst, sparams->src + offset, send_bytes);
595 
596 		err = sof_ipc_tx_message_unlocked(sdev->ipc,
597 						  partdata->rhdr.hdr.cmd,
598 						  partdata,
599 						  partdata->rhdr.hdr.size,
600 						  partdata,
601 						  partdata->rhdr.hdr.size);
602 		if (err < 0)
603 			break;
604 
605 		if (!send)
606 			memcpy(sparams->dst + offset, sparams->src, send_bytes);
607 
608 		offset += pl_size;
609 	}
610 
611 	mutex_unlock(&sdev->ipc->tx_mutex);
612 
613 	kfree(partdata);
614 	return err;
615 }
616 
617 /*
618  * IPC get()/set() for kcontrols.
619  */
snd_sof_ipc_set_get_comp_data(struct snd_sof_ipc * ipc,struct snd_sof_control * scontrol,u32 ipc_cmd,enum sof_ipc_ctrl_type ctrl_type,enum sof_ipc_ctrl_cmd ctrl_cmd,bool send)620 int snd_sof_ipc_set_get_comp_data(struct snd_sof_ipc *ipc,
621 				  struct snd_sof_control *scontrol,
622 				  u32 ipc_cmd,
623 				  enum sof_ipc_ctrl_type ctrl_type,
624 				  enum sof_ipc_ctrl_cmd ctrl_cmd,
625 				  bool send)
626 {
627 	struct sof_ipc_ctrl_data *cdata = scontrol->control_data;
628 	struct snd_sof_dev *sdev = ipc->sdev;
629 	struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
630 	struct sof_ipc_fw_version *v = &ready->version;
631 	struct sof_ipc_ctrl_data_params sparams;
632 	size_t send_bytes;
633 	int err;
634 
635 	/* read or write firmware volume */
636 	if (scontrol->readback_offset != 0) {
637 		/* write/read value header via mmaped region */
638 		send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) *
639 		cdata->num_elems;
640 		if (send)
641 			snd_sof_dsp_block_write(sdev, sdev->mmio_bar,
642 						scontrol->readback_offset,
643 						cdata->chanv, send_bytes);
644 
645 		else
646 			snd_sof_dsp_block_read(sdev, sdev->mmio_bar,
647 					       scontrol->readback_offset,
648 					       cdata->chanv, send_bytes);
649 		return 0;
650 	}
651 
652 	cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd;
653 	cdata->cmd = ctrl_cmd;
654 	cdata->type = ctrl_type;
655 	cdata->comp_id = scontrol->comp_id;
656 	cdata->msg_index = 0;
657 
658 	/* calculate header and data size */
659 	switch (cdata->type) {
660 	case SOF_CTRL_TYPE_VALUE_CHAN_GET:
661 	case SOF_CTRL_TYPE_VALUE_CHAN_SET:
662 		sparams.msg_bytes = scontrol->num_channels *
663 			sizeof(struct sof_ipc_ctrl_value_chan);
664 		sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
665 		sparams.elems = scontrol->num_channels;
666 		break;
667 	case SOF_CTRL_TYPE_VALUE_COMP_GET:
668 	case SOF_CTRL_TYPE_VALUE_COMP_SET:
669 		sparams.msg_bytes = scontrol->num_channels *
670 			sizeof(struct sof_ipc_ctrl_value_comp);
671 		sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
672 		sparams.elems = scontrol->num_channels;
673 		break;
674 	case SOF_CTRL_TYPE_DATA_GET:
675 	case SOF_CTRL_TYPE_DATA_SET:
676 		sparams.msg_bytes = cdata->data->size;
677 		sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) +
678 			sizeof(struct sof_abi_hdr);
679 		sparams.elems = cdata->data->size;
680 		break;
681 	default:
682 		return -EINVAL;
683 	}
684 
685 	cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes;
686 	cdata->num_elems = sparams.elems;
687 	cdata->elems_remaining = 0;
688 
689 	/* send normal size ipc in one part */
690 	if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) {
691 		err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata,
692 					 cdata->rhdr.hdr.size, cdata,
693 					 cdata->rhdr.hdr.size);
694 
695 		if (err < 0)
696 			dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n",
697 				cdata->comp_id);
698 
699 		return err;
700 	}
701 
702 	/* data is bigger than max ipc size, chop into smaller pieces */
703 	dev_dbg(sdev->dev, "large ipc size %u, control size %u\n",
704 		cdata->rhdr.hdr.size, scontrol->size);
705 
706 	/* large messages is only supported from ABI 3.3.0 onwards */
707 	if (v->abi_version < SOF_ABI_VER(3, 3, 0)) {
708 		dev_err(sdev->dev, "error: incompatible FW ABI version\n");
709 		return -EINVAL;
710 	}
711 
712 	err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send);
713 
714 	if (err < 0)
715 		dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n",
716 			cdata->comp_id);
717 
718 	return err;
719 }
720 EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data);
721 
722 /*
723  * IPC layer enumeration.
724  */
725 
snd_sof_dsp_mailbox_init(struct snd_sof_dev * sdev,u32 dspbox,size_t dspbox_size,u32 hostbox,size_t hostbox_size)726 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox,
727 			     size_t dspbox_size, u32 hostbox,
728 			     size_t hostbox_size)
729 {
730 	sdev->dsp_box.offset = dspbox;
731 	sdev->dsp_box.size = dspbox_size;
732 	sdev->host_box.offset = hostbox;
733 	sdev->host_box.size = hostbox_size;
734 	return 0;
735 }
736 EXPORT_SYMBOL(snd_sof_dsp_mailbox_init);
737 
snd_sof_ipc_valid(struct snd_sof_dev * sdev)738 int snd_sof_ipc_valid(struct snd_sof_dev *sdev)
739 {
740 	struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
741 	struct sof_ipc_fw_version *v = &ready->version;
742 
743 	dev_info(sdev->dev,
744 		 "Firmware info: version %d:%d:%d-%s\n",  v->major, v->minor,
745 		 v->micro, v->tag);
746 	dev_info(sdev->dev,
747 		 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n",
748 		 SOF_ABI_VERSION_MAJOR(v->abi_version),
749 		 SOF_ABI_VERSION_MINOR(v->abi_version),
750 		 SOF_ABI_VERSION_PATCH(v->abi_version),
751 		 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH);
752 
753 	if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) {
754 		dev_err(sdev->dev, "error: incompatible FW ABI version\n");
755 		return -EINVAL;
756 	}
757 
758 	if (v->abi_version > SOF_ABI_VERSION) {
759 		if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) {
760 			dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n");
761 		} else {
762 			dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n");
763 			return -EINVAL;
764 		}
765 	}
766 
767 	if (ready->flags & SOF_IPC_INFO_BUILD) {
768 		dev_info(sdev->dev,
769 			 "Firmware debug build %d on %s-%s - options:\n"
770 			 " GDB: %s\n"
771 			 " lock debug: %s\n"
772 			 " lock vdebug: %s\n",
773 			 v->build, v->date, v->time,
774 			 (ready->flags & SOF_IPC_INFO_GDB) ?
775 				"enabled" : "disabled",
776 			 (ready->flags & SOF_IPC_INFO_LOCKS) ?
777 				"enabled" : "disabled",
778 			 (ready->flags & SOF_IPC_INFO_LOCKSV) ?
779 				"enabled" : "disabled");
780 	}
781 
782 	/* copy the fw_version into debugfs at first boot */
783 	memcpy(&sdev->fw_version, v, sizeof(*v));
784 
785 	return 0;
786 }
787 EXPORT_SYMBOL(snd_sof_ipc_valid);
788 
snd_sof_ipc_init(struct snd_sof_dev * sdev)789 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev)
790 {
791 	struct snd_sof_ipc *ipc;
792 	struct snd_sof_ipc_msg *msg;
793 
794 	/* check if mandatory ops required for ipc are defined */
795 	if (!sof_ops(sdev)->fw_ready) {
796 		dev_err(sdev->dev, "error: ipc mandatory ops not defined\n");
797 		return NULL;
798 	}
799 
800 	ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL);
801 	if (!ipc)
802 		return NULL;
803 
804 	mutex_init(&ipc->tx_mutex);
805 	ipc->sdev = sdev;
806 	msg = &ipc->msg;
807 
808 	/* indicate that we aren't sending a message ATM */
809 	msg->ipc_complete = true;
810 
811 	/* pre-allocate message data */
812 	msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE,
813 				     GFP_KERNEL);
814 	if (!msg->msg_data)
815 		return NULL;
816 
817 	msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE,
818 				       GFP_KERNEL);
819 	if (!msg->reply_data)
820 		return NULL;
821 
822 	init_waitqueue_head(&msg->waitq);
823 
824 	return ipc;
825 }
826 EXPORT_SYMBOL(snd_sof_ipc_init);
827 
snd_sof_ipc_free(struct snd_sof_dev * sdev)828 void snd_sof_ipc_free(struct snd_sof_dev *sdev)
829 {
830 	struct snd_sof_ipc *ipc = sdev->ipc;
831 
832 	if (!ipc)
833 		return;
834 
835 	/* disable sending of ipc's */
836 	mutex_lock(&ipc->tx_mutex);
837 	ipc->disable_ipc_tx = true;
838 	mutex_unlock(&ipc->tx_mutex);
839 }
840 EXPORT_SYMBOL(snd_sof_ipc_free);
841