1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Kernel-based Virtual Machine driver for Linux
4 *
5 * This header defines architecture specific interfaces, x86 version
6 */
7
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
10
11 #include <linux/types.h>
12 #include <linux/mm.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18
19 #include <linux/kvm.h>
20 #include <linux/kvm_para.h>
21 #include <linux/kvm_types.h>
22 #include <linux/perf_event.h>
23 #include <linux/pvclock_gtod.h>
24 #include <linux/clocksource.h>
25 #include <linux/irqbypass.h>
26 #include <linux/hyperv.h>
27
28 #include <asm/apic.h>
29 #include <asm/pvclock-abi.h>
30 #include <asm/desc.h>
31 #include <asm/mtrr.h>
32 #include <asm/msr-index.h>
33 #include <asm/asm.h>
34 #include <asm/kvm_page_track.h>
35 #include <asm/kvm_vcpu_regs.h>
36 #include <asm/hyperv-tlfs.h>
37
38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
39
40 #define KVM_MAX_VCPUS 288
41 #define KVM_SOFT_MAX_VCPUS 240
42 #define KVM_MAX_VCPU_ID 1023
43 #define KVM_USER_MEM_SLOTS 509
44 /* memory slots that are not exposed to userspace */
45 #define KVM_PRIVATE_MEM_SLOTS 3
46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
47
48 #define KVM_HALT_POLL_NS_DEFAULT 200000
49
50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
51
52 /* x86-specific vcpu->requests bit members */
53 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
54 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
55 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
56 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
57 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
58 #define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5)
59 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
60 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
61 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
62 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
63 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
64 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
65 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
66 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
67 #define KVM_REQ_MCLOCK_INPROGRESS \
68 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
69 #define KVM_REQ_SCAN_IOAPIC \
70 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
71 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
72 #define KVM_REQ_APIC_PAGE_RELOAD \
73 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
74 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
75 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
76 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
77 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
78 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
79 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
80 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24)
81
82 #define CR0_RESERVED_BITS \
83 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
84 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
85 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
86
87 #define CR4_RESERVED_BITS \
88 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
89 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
90 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
91 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
92 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
93 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
94
95 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
96
97
98
99 #define INVALID_PAGE (~(hpa_t)0)
100 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
101
102 #define UNMAPPED_GVA (~(gpa_t)0)
103
104 /* KVM Hugepage definitions for x86 */
105 enum {
106 PT_PAGE_TABLE_LEVEL = 1,
107 PT_DIRECTORY_LEVEL = 2,
108 PT_PDPE_LEVEL = 3,
109 /* set max level to the biggest one */
110 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL,
111 };
112 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \
113 PT_PAGE_TABLE_LEVEL + 1)
114 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
115 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
116 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
117 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
118 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
119
gfn_to_index(gfn_t gfn,gfn_t base_gfn,int level)120 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
121 {
122 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
123 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
124 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
125 }
126
127 #define KVM_PERMILLE_MMU_PAGES 20
128 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
129 #define KVM_MMU_HASH_SHIFT 12
130 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
131 #define KVM_MIN_FREE_MMU_PAGES 5
132 #define KVM_REFILL_PAGES 25
133 #define KVM_MAX_CPUID_ENTRIES 80
134 #define KVM_NR_FIXED_MTRR_REGION 88
135 #define KVM_NR_VAR_MTRR 8
136
137 #define ASYNC_PF_PER_VCPU 64
138
139 enum kvm_reg {
140 VCPU_REGS_RAX = __VCPU_REGS_RAX,
141 VCPU_REGS_RCX = __VCPU_REGS_RCX,
142 VCPU_REGS_RDX = __VCPU_REGS_RDX,
143 VCPU_REGS_RBX = __VCPU_REGS_RBX,
144 VCPU_REGS_RSP = __VCPU_REGS_RSP,
145 VCPU_REGS_RBP = __VCPU_REGS_RBP,
146 VCPU_REGS_RSI = __VCPU_REGS_RSI,
147 VCPU_REGS_RDI = __VCPU_REGS_RDI,
148 #ifdef CONFIG_X86_64
149 VCPU_REGS_R8 = __VCPU_REGS_R8,
150 VCPU_REGS_R9 = __VCPU_REGS_R9,
151 VCPU_REGS_R10 = __VCPU_REGS_R10,
152 VCPU_REGS_R11 = __VCPU_REGS_R11,
153 VCPU_REGS_R12 = __VCPU_REGS_R12,
154 VCPU_REGS_R13 = __VCPU_REGS_R13,
155 VCPU_REGS_R14 = __VCPU_REGS_R14,
156 VCPU_REGS_R15 = __VCPU_REGS_R15,
157 #endif
158 VCPU_REGS_RIP,
159 NR_VCPU_REGS
160 };
161
162 enum kvm_reg_ex {
163 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
164 VCPU_EXREG_CR3,
165 VCPU_EXREG_RFLAGS,
166 VCPU_EXREG_SEGMENTS,
167 };
168
169 enum {
170 VCPU_SREG_ES,
171 VCPU_SREG_CS,
172 VCPU_SREG_SS,
173 VCPU_SREG_DS,
174 VCPU_SREG_FS,
175 VCPU_SREG_GS,
176 VCPU_SREG_TR,
177 VCPU_SREG_LDTR,
178 };
179
180 #include <asm/kvm_emulate.h>
181
182 #define KVM_NR_MEM_OBJS 40
183
184 #define KVM_NR_DB_REGS 4
185
186 #define DR6_BD (1 << 13)
187 #define DR6_BS (1 << 14)
188 #define DR6_BT (1 << 15)
189 #define DR6_RTM (1 << 16)
190 #define DR6_FIXED_1 0xfffe0ff0
191 #define DR6_INIT 0xffff0ff0
192 #define DR6_VOLATILE 0x0001e00f
193
194 #define DR7_BP_EN_MASK 0x000000ff
195 #define DR7_GE (1 << 9)
196 #define DR7_GD (1 << 13)
197 #define DR7_FIXED_1 0x00000400
198 #define DR7_VOLATILE 0xffff2bff
199
200 #define PFERR_PRESENT_BIT 0
201 #define PFERR_WRITE_BIT 1
202 #define PFERR_USER_BIT 2
203 #define PFERR_RSVD_BIT 3
204 #define PFERR_FETCH_BIT 4
205 #define PFERR_PK_BIT 5
206 #define PFERR_GUEST_FINAL_BIT 32
207 #define PFERR_GUEST_PAGE_BIT 33
208
209 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
210 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
211 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
212 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
213 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
214 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
215 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
216 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
217
218 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
219 PFERR_WRITE_MASK | \
220 PFERR_PRESENT_MASK)
221
222 /* apic attention bits */
223 #define KVM_APIC_CHECK_VAPIC 0
224 /*
225 * The following bit is set with PV-EOI, unset on EOI.
226 * We detect PV-EOI changes by guest by comparing
227 * this bit with PV-EOI in guest memory.
228 * See the implementation in apic_update_pv_eoi.
229 */
230 #define KVM_APIC_PV_EOI_PENDING 1
231
232 struct kvm_kernel_irq_routing_entry;
233
234 /*
235 * We don't want allocation failures within the mmu code, so we preallocate
236 * enough memory for a single page fault in a cache.
237 */
238 struct kvm_mmu_memory_cache {
239 int nobjs;
240 void *objects[KVM_NR_MEM_OBJS];
241 };
242
243 /*
244 * the pages used as guest page table on soft mmu are tracked by
245 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
246 * by indirect shadow page can not be more than 15 bits.
247 *
248 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access,
249 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
250 */
251 union kvm_mmu_page_role {
252 u32 word;
253 struct {
254 unsigned level:4;
255 unsigned gpte_is_8_bytes:1;
256 unsigned quadrant:2;
257 unsigned direct:1;
258 unsigned access:3;
259 unsigned invalid:1;
260 unsigned nxe:1;
261 unsigned cr0_wp:1;
262 unsigned smep_andnot_wp:1;
263 unsigned smap_andnot_wp:1;
264 unsigned ad_disabled:1;
265 unsigned guest_mode:1;
266 unsigned :6;
267
268 /*
269 * This is left at the top of the word so that
270 * kvm_memslots_for_spte_role can extract it with a
271 * simple shift. While there is room, give it a whole
272 * byte so it is also faster to load it from memory.
273 */
274 unsigned smm:8;
275 };
276 };
277
278 union kvm_mmu_extended_role {
279 /*
280 * This structure complements kvm_mmu_page_role caching everything needed for
281 * MMU configuration. If nothing in both these structures changed, MMU
282 * re-configuration can be skipped. @valid bit is set on first usage so we don't
283 * treat all-zero structure as valid data.
284 */
285 u32 word;
286 struct {
287 unsigned int valid:1;
288 unsigned int execonly:1;
289 unsigned int cr0_pg:1;
290 unsigned int cr4_pae:1;
291 unsigned int cr4_pse:1;
292 unsigned int cr4_pke:1;
293 unsigned int cr4_smap:1;
294 unsigned int cr4_smep:1;
295 unsigned int cr4_la57:1;
296 unsigned int maxphyaddr:6;
297 };
298 };
299
300 union kvm_mmu_role {
301 u64 as_u64;
302 struct {
303 union kvm_mmu_page_role base;
304 union kvm_mmu_extended_role ext;
305 };
306 };
307
308 struct kvm_rmap_head {
309 unsigned long val;
310 };
311
312 struct kvm_mmu_page {
313 struct list_head link;
314 struct hlist_node hash_link;
315 struct list_head lpage_disallowed_link;
316
317 bool unsync;
318 u8 mmu_valid_gen;
319 bool mmio_cached;
320 bool lpage_disallowed; /* Can't be replaced by an equiv large page */
321
322 /*
323 * The following two entries are used to key the shadow page in the
324 * hash table.
325 */
326 union kvm_mmu_page_role role;
327 gfn_t gfn;
328
329 u64 *spt;
330 /* hold the gfn of each spte inside spt */
331 gfn_t *gfns;
332 int root_count; /* Currently serving as active root */
333 unsigned int unsync_children;
334 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
335 DECLARE_BITMAP(unsync_child_bitmap, 512);
336
337 #ifdef CONFIG_X86_32
338 /*
339 * Used out of the mmu-lock to avoid reading spte values while an
340 * update is in progress; see the comments in __get_spte_lockless().
341 */
342 int clear_spte_count;
343 #endif
344
345 /* Number of writes since the last time traversal visited this page. */
346 atomic_t write_flooding_count;
347 };
348
349 struct kvm_pio_request {
350 unsigned long linear_rip;
351 unsigned long count;
352 int in;
353 int port;
354 int size;
355 };
356
357 #define PT64_ROOT_MAX_LEVEL 5
358
359 struct rsvd_bits_validate {
360 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
361 u64 bad_mt_xwr;
362 };
363
364 struct kvm_mmu_root_info {
365 gpa_t cr3;
366 hpa_t hpa;
367 };
368
369 #define KVM_MMU_ROOT_INFO_INVALID \
370 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE })
371
372 #define KVM_MMU_NUM_PREV_ROOTS 3
373
374 /*
375 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
376 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
377 * current mmu mode.
378 */
379 struct kvm_mmu {
380 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
381 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
382 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
383 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err,
384 bool prefault);
385 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
386 struct x86_exception *fault);
387 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa,
388 u32 access, struct x86_exception *exception);
389 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
390 struct x86_exception *exception);
391 int (*sync_page)(struct kvm_vcpu *vcpu,
392 struct kvm_mmu_page *sp);
393 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
394 hpa_t root_hpa;
395 gpa_t root_cr3;
396 union kvm_mmu_role mmu_role;
397 u8 root_level;
398 u8 shadow_root_level;
399 u8 ept_ad;
400 bool direct_map;
401 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
402
403 /*
404 * Bitmap; bit set = permission fault
405 * Byte index: page fault error code [4:1]
406 * Bit index: pte permissions in ACC_* format
407 */
408 u8 permissions[16];
409
410 /*
411 * The pkru_mask indicates if protection key checks are needed. It
412 * consists of 16 domains indexed by page fault error code bits [4:1],
413 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
414 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
415 */
416 u32 pkru_mask;
417
418 u64 *pae_root;
419 u64 *lm_root;
420
421 /*
422 * check zero bits on shadow page table entries, these
423 * bits include not only hardware reserved bits but also
424 * the bits spte never used.
425 */
426 struct rsvd_bits_validate shadow_zero_check;
427
428 struct rsvd_bits_validate guest_rsvd_check;
429
430 /* Can have large pages at levels 2..last_nonleaf_level-1. */
431 u8 last_nonleaf_level;
432
433 bool nx;
434
435 u64 pdptrs[4]; /* pae */
436 };
437
438 struct kvm_tlb_range {
439 u64 start_gfn;
440 u64 pages;
441 };
442
443 enum pmc_type {
444 KVM_PMC_GP = 0,
445 KVM_PMC_FIXED,
446 };
447
448 struct kvm_pmc {
449 enum pmc_type type;
450 u8 idx;
451 u64 counter;
452 u64 eventsel;
453 struct perf_event *perf_event;
454 struct kvm_vcpu *vcpu;
455 };
456
457 struct kvm_pmu {
458 unsigned nr_arch_gp_counters;
459 unsigned nr_arch_fixed_counters;
460 unsigned available_event_types;
461 u64 fixed_ctr_ctrl;
462 u64 global_ctrl;
463 u64 global_status;
464 u64 global_ovf_ctrl;
465 u64 counter_bitmask[2];
466 u64 global_ctrl_mask;
467 u64 global_ovf_ctrl_mask;
468 u64 reserved_bits;
469 u8 version;
470 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
471 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
472 struct irq_work irq_work;
473 u64 reprogram_pmi;
474 };
475
476 struct kvm_pmu_ops;
477
478 enum {
479 KVM_DEBUGREG_BP_ENABLED = 1,
480 KVM_DEBUGREG_WONT_EXIT = 2,
481 KVM_DEBUGREG_RELOAD = 4,
482 };
483
484 struct kvm_mtrr_range {
485 u64 base;
486 u64 mask;
487 struct list_head node;
488 };
489
490 struct kvm_mtrr {
491 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
492 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
493 u64 deftype;
494
495 struct list_head head;
496 };
497
498 /* Hyper-V SynIC timer */
499 struct kvm_vcpu_hv_stimer {
500 struct hrtimer timer;
501 int index;
502 union hv_stimer_config config;
503 u64 count;
504 u64 exp_time;
505 struct hv_message msg;
506 bool msg_pending;
507 };
508
509 /* Hyper-V synthetic interrupt controller (SynIC)*/
510 struct kvm_vcpu_hv_synic {
511 u64 version;
512 u64 control;
513 u64 msg_page;
514 u64 evt_page;
515 atomic64_t sint[HV_SYNIC_SINT_COUNT];
516 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
517 DECLARE_BITMAP(auto_eoi_bitmap, 256);
518 DECLARE_BITMAP(vec_bitmap, 256);
519 bool active;
520 bool dont_zero_synic_pages;
521 };
522
523 /* Hyper-V per vcpu emulation context */
524 struct kvm_vcpu_hv {
525 u32 vp_index;
526 u64 hv_vapic;
527 s64 runtime_offset;
528 struct kvm_vcpu_hv_synic synic;
529 struct kvm_hyperv_exit exit;
530 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
531 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
532 cpumask_t tlb_flush;
533 };
534
535 struct kvm_vcpu_arch {
536 /*
537 * rip and regs accesses must go through
538 * kvm_{register,rip}_{read,write} functions.
539 */
540 unsigned long regs[NR_VCPU_REGS];
541 u32 regs_avail;
542 u32 regs_dirty;
543
544 unsigned long cr0;
545 unsigned long cr0_guest_owned_bits;
546 unsigned long cr2;
547 unsigned long cr3;
548 unsigned long cr4;
549 unsigned long cr4_guest_owned_bits;
550 unsigned long cr8;
551 u32 host_pkru;
552 u32 pkru;
553 u32 hflags;
554 u64 efer;
555 u64 apic_base;
556 struct kvm_lapic *apic; /* kernel irqchip context */
557 bool apicv_active;
558 bool load_eoi_exitmap_pending;
559 DECLARE_BITMAP(ioapic_handled_vectors, 256);
560 unsigned long apic_attention;
561 int32_t apic_arb_prio;
562 int mp_state;
563 u64 ia32_misc_enable_msr;
564 u64 smbase;
565 u64 smi_count;
566 bool at_instruction_boundary;
567 bool tpr_access_reporting;
568 u64 ia32_xss;
569 u64 microcode_version;
570 u64 arch_capabilities;
571
572 /*
573 * Paging state of the vcpu
574 *
575 * If the vcpu runs in guest mode with two level paging this still saves
576 * the paging mode of the l1 guest. This context is always used to
577 * handle faults.
578 */
579 struct kvm_mmu *mmu;
580
581 /* Non-nested MMU for L1 */
582 struct kvm_mmu root_mmu;
583
584 /* L1 MMU when running nested */
585 struct kvm_mmu guest_mmu;
586
587 /*
588 * Paging state of an L2 guest (used for nested npt)
589 *
590 * This context will save all necessary information to walk page tables
591 * of the an L2 guest. This context is only initialized for page table
592 * walking and not for faulting since we never handle l2 page faults on
593 * the host.
594 */
595 struct kvm_mmu nested_mmu;
596
597 /*
598 * Pointer to the mmu context currently used for
599 * gva_to_gpa translations.
600 */
601 struct kvm_mmu *walk_mmu;
602
603 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
604 struct kvm_mmu_memory_cache mmu_page_cache;
605 struct kvm_mmu_memory_cache mmu_page_header_cache;
606
607 /*
608 * QEMU userspace and the guest each have their own FPU state.
609 * In vcpu_run, we switch between the user and guest FPU contexts.
610 * While running a VCPU, the VCPU thread will have the guest FPU
611 * context.
612 *
613 * Note that while the PKRU state lives inside the fpu registers,
614 * it is switched out separately at VMENTER and VMEXIT time. The
615 * "guest_fpu" state here contains the guest FPU context, with the
616 * host PRKU bits.
617 */
618 struct fpu *user_fpu;
619 struct fpu *guest_fpu;
620
621 u64 xcr0;
622 u64 guest_supported_xcr0;
623 u32 guest_xstate_size;
624
625 struct kvm_pio_request pio;
626 void *pio_data;
627
628 u8 event_exit_inst_len;
629
630 struct kvm_queued_exception {
631 bool pending;
632 bool injected;
633 bool has_error_code;
634 u8 nr;
635 u32 error_code;
636 unsigned long payload;
637 bool has_payload;
638 u8 nested_apf;
639 } exception;
640
641 struct kvm_queued_interrupt {
642 bool injected;
643 bool soft;
644 u8 nr;
645 } interrupt;
646
647 int halt_request; /* real mode on Intel only */
648
649 int cpuid_nent;
650 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
651
652 int maxphyaddr;
653
654 /* emulate context */
655
656 struct x86_emulate_ctxt emulate_ctxt;
657 bool emulate_regs_need_sync_to_vcpu;
658 bool emulate_regs_need_sync_from_vcpu;
659 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
660
661 gpa_t time;
662 struct pvclock_vcpu_time_info hv_clock;
663 unsigned int hw_tsc_khz;
664 struct gfn_to_hva_cache pv_time;
665 bool pv_time_enabled;
666 /* set guest stopped flag in pvclock flags field */
667 bool pvclock_set_guest_stopped_request;
668
669 struct {
670 u8 preempted;
671 u64 msr_val;
672 u64 last_steal;
673 struct gfn_to_pfn_cache cache;
674 } st;
675
676 u64 tsc_offset;
677 u64 last_guest_tsc;
678 u64 last_host_tsc;
679 u64 tsc_offset_adjustment;
680 u64 this_tsc_nsec;
681 u64 this_tsc_write;
682 u64 this_tsc_generation;
683 bool tsc_catchup;
684 bool tsc_always_catchup;
685 s8 virtual_tsc_shift;
686 u32 virtual_tsc_mult;
687 u32 virtual_tsc_khz;
688 s64 ia32_tsc_adjust_msr;
689 u64 msr_ia32_power_ctl;
690 u64 tsc_scaling_ratio;
691
692 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
693 unsigned nmi_pending; /* NMI queued after currently running handler */
694 bool nmi_injected; /* Trying to inject an NMI this entry */
695 bool smi_pending; /* SMI queued after currently running handler */
696
697 struct kvm_mtrr mtrr_state;
698 u64 pat;
699
700 unsigned switch_db_regs;
701 unsigned long db[KVM_NR_DB_REGS];
702 unsigned long dr6;
703 unsigned long dr7;
704 unsigned long eff_db[KVM_NR_DB_REGS];
705 unsigned long guest_debug_dr7;
706 u64 msr_platform_info;
707 u64 msr_misc_features_enables;
708
709 u64 mcg_cap;
710 u64 mcg_status;
711 u64 mcg_ctl;
712 u64 mcg_ext_ctl;
713 u64 *mce_banks;
714
715 /* Cache MMIO info */
716 u64 mmio_gva;
717 unsigned mmio_access;
718 gfn_t mmio_gfn;
719 u64 mmio_gen;
720
721 struct kvm_pmu pmu;
722
723 /* used for guest single stepping over the given code position */
724 unsigned long singlestep_rip;
725
726 struct kvm_vcpu_hv hyperv;
727
728 cpumask_var_t wbinvd_dirty_mask;
729
730 unsigned long last_retry_eip;
731 unsigned long last_retry_addr;
732
733 struct {
734 bool halted;
735 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
736 struct gfn_to_hva_cache data;
737 u64 msr_val;
738 u32 id;
739 bool send_user_only;
740 u32 host_apf_reason;
741 unsigned long nested_apf_token;
742 bool delivery_as_pf_vmexit;
743 } apf;
744
745 /* OSVW MSRs (AMD only) */
746 struct {
747 u64 length;
748 u64 status;
749 } osvw;
750
751 struct {
752 u64 msr_val;
753 struct gfn_to_hva_cache data;
754 } pv_eoi;
755
756 u64 msr_kvm_poll_control;
757
758 /*
759 * Indicate whether the access faults on its page table in guest
760 * which is set when fix page fault and used to detect unhandeable
761 * instruction.
762 */
763 bool write_fault_to_shadow_pgtable;
764
765 /* set at EPT violation at this point */
766 unsigned long exit_qualification;
767
768 /* pv related host specific info */
769 struct {
770 bool pv_unhalted;
771 } pv;
772
773 int pending_ioapic_eoi;
774 int pending_external_vector;
775
776 /* GPA available */
777 bool gpa_available;
778 gpa_t gpa_val;
779
780 /* be preempted when it's in kernel-mode(cpl=0) */
781 bool preempted_in_kernel;
782
783 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
784 bool l1tf_flush_l1d;
785
786 /* AMD MSRC001_0015 Hardware Configuration */
787 u64 msr_hwcr;
788 };
789
790 struct kvm_lpage_info {
791 int disallow_lpage;
792 };
793
794 struct kvm_arch_memory_slot {
795 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
796 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
797 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
798 };
799
800 /*
801 * We use as the mode the number of bits allocated in the LDR for the
802 * logical processor ID. It happens that these are all powers of two.
803 * This makes it is very easy to detect cases where the APICs are
804 * configured for multiple modes; in that case, we cannot use the map and
805 * hence cannot use kvm_irq_delivery_to_apic_fast either.
806 */
807 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
808 #define KVM_APIC_MODE_XAPIC_FLAT 8
809 #define KVM_APIC_MODE_X2APIC 16
810
811 struct kvm_apic_map {
812 struct rcu_head rcu;
813 u8 mode;
814 u32 max_apic_id;
815 union {
816 struct kvm_lapic *xapic_flat_map[8];
817 struct kvm_lapic *xapic_cluster_map[16][4];
818 };
819 struct kvm_lapic *phys_map[];
820 };
821
822 /* Hyper-V emulation context */
823 struct kvm_hv {
824 struct mutex hv_lock;
825 u64 hv_guest_os_id;
826 u64 hv_hypercall;
827 u64 hv_tsc_page;
828
829 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
830 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
831 u64 hv_crash_ctl;
832
833 HV_REFERENCE_TSC_PAGE tsc_ref;
834
835 struct idr conn_to_evt;
836
837 u64 hv_reenlightenment_control;
838 u64 hv_tsc_emulation_control;
839 u64 hv_tsc_emulation_status;
840
841 /* How many vCPUs have VP index != vCPU index */
842 atomic_t num_mismatched_vp_indexes;
843
844 struct hv_partition_assist_pg *hv_pa_pg;
845 };
846
847 enum kvm_irqchip_mode {
848 KVM_IRQCHIP_NONE,
849 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
850 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
851 };
852
853 struct kvm_arch {
854 unsigned long n_used_mmu_pages;
855 unsigned long n_requested_mmu_pages;
856 unsigned long n_max_mmu_pages;
857 unsigned int indirect_shadow_pages;
858 u8 mmu_valid_gen;
859 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
860 /*
861 * Hash table of struct kvm_mmu_page.
862 */
863 struct list_head active_mmu_pages;
864 struct list_head zapped_obsolete_pages;
865 struct list_head lpage_disallowed_mmu_pages;
866 struct kvm_page_track_notifier_node mmu_sp_tracker;
867 struct kvm_page_track_notifier_head track_notifier_head;
868
869 struct list_head assigned_dev_head;
870 struct iommu_domain *iommu_domain;
871 bool iommu_noncoherent;
872 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
873 atomic_t noncoherent_dma_count;
874 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
875 atomic_t assigned_device_count;
876 struct kvm_pic *vpic;
877 struct kvm_ioapic *vioapic;
878 struct kvm_pit *vpit;
879 atomic_t vapics_in_nmi_mode;
880 struct mutex apic_map_lock;
881 struct kvm_apic_map *apic_map;
882
883 bool apic_access_page_done;
884
885 gpa_t wall_clock;
886
887 bool mwait_in_guest;
888 bool hlt_in_guest;
889 bool pause_in_guest;
890 bool cstate_in_guest;
891
892 unsigned long irq_sources_bitmap;
893 s64 kvmclock_offset;
894 raw_spinlock_t tsc_write_lock;
895 u64 last_tsc_nsec;
896 u64 last_tsc_write;
897 u32 last_tsc_khz;
898 u64 cur_tsc_nsec;
899 u64 cur_tsc_write;
900 u64 cur_tsc_offset;
901 u64 cur_tsc_generation;
902 int nr_vcpus_matched_tsc;
903
904 spinlock_t pvclock_gtod_sync_lock;
905 bool use_master_clock;
906 u64 master_kernel_ns;
907 u64 master_cycle_now;
908 struct delayed_work kvmclock_update_work;
909 struct delayed_work kvmclock_sync_work;
910
911 struct kvm_xen_hvm_config xen_hvm_config;
912
913 /* reads protected by irq_srcu, writes by irq_lock */
914 struct hlist_head mask_notifier_list;
915
916 struct kvm_hv hyperv;
917
918 #ifdef CONFIG_KVM_MMU_AUDIT
919 int audit_point;
920 #endif
921
922 bool backwards_tsc_observed;
923 bool boot_vcpu_runs_old_kvmclock;
924 u32 bsp_vcpu_id;
925
926 u64 disabled_quirks;
927
928 enum kvm_irqchip_mode irqchip_mode;
929 u8 nr_reserved_ioapic_pins;
930
931 bool disabled_lapic_found;
932
933 bool x2apic_format;
934 bool x2apic_broadcast_quirk_disabled;
935
936 bool guest_can_read_msr_platform_info;
937 bool exception_payload_enabled;
938
939 struct kvm_pmu_event_filter *pmu_event_filter;
940 struct task_struct *nx_lpage_recovery_thread;
941 };
942
943 struct kvm_vm_stat {
944 ulong mmu_shadow_zapped;
945 ulong mmu_pte_write;
946 ulong mmu_pde_zapped;
947 ulong mmu_flooded;
948 ulong mmu_recycled;
949 ulong mmu_cache_miss;
950 ulong mmu_unsync;
951 ulong remote_tlb_flush;
952 ulong lpages;
953 ulong nx_lpage_splits;
954 ulong max_mmu_page_hash_collisions;
955 };
956
957 struct kvm_vcpu_stat {
958 u64 pf_fixed;
959 u64 pf_guest;
960 u64 tlb_flush;
961 u64 invlpg;
962
963 u64 exits;
964 u64 io_exits;
965 u64 mmio_exits;
966 u64 signal_exits;
967 u64 irq_window_exits;
968 u64 nmi_window_exits;
969 u64 l1d_flush;
970 u64 halt_exits;
971 u64 halt_successful_poll;
972 u64 halt_attempted_poll;
973 u64 halt_poll_invalid;
974 u64 halt_wakeup;
975 u64 request_irq_exits;
976 u64 irq_exits;
977 u64 host_state_reload;
978 u64 fpu_reload;
979 u64 insn_emulation;
980 u64 insn_emulation_fail;
981 u64 hypercalls;
982 u64 irq_injections;
983 u64 nmi_injections;
984 u64 req_event;
985 u64 preemption_reported;
986 u64 preemption_other;
987 };
988
989 struct x86_instruction_info;
990
991 struct msr_data {
992 bool host_initiated;
993 u32 index;
994 u64 data;
995 };
996
997 struct kvm_lapic_irq {
998 u32 vector;
999 u16 delivery_mode;
1000 u16 dest_mode;
1001 bool level;
1002 u16 trig_mode;
1003 u32 shorthand;
1004 u32 dest_id;
1005 bool msi_redir_hint;
1006 };
1007
1008 struct kvm_x86_ops {
1009 int (*cpu_has_kvm_support)(void); /* __init */
1010 int (*disabled_by_bios)(void); /* __init */
1011 int (*hardware_enable)(void);
1012 void (*hardware_disable)(void);
1013 int (*check_processor_compatibility)(void);/* __init */
1014 int (*hardware_setup)(void); /* __init */
1015 void (*hardware_unsetup)(void); /* __exit */
1016 bool (*cpu_has_accelerated_tpr)(void);
1017 bool (*has_emulated_msr)(int index);
1018 void (*cpuid_update)(struct kvm_vcpu *vcpu);
1019
1020 struct kvm *(*vm_alloc)(void);
1021 void (*vm_free)(struct kvm *);
1022 int (*vm_init)(struct kvm *kvm);
1023 void (*vm_destroy)(struct kvm *kvm);
1024
1025 /* Create, but do not attach this VCPU */
1026 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
1027 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1028 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1029
1030 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
1031 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1032 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1033
1034 void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
1035 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1036 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1037 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1038 void (*get_segment)(struct kvm_vcpu *vcpu,
1039 struct kvm_segment *var, int seg);
1040 int (*get_cpl)(struct kvm_vcpu *vcpu);
1041 void (*set_segment)(struct kvm_vcpu *vcpu,
1042 struct kvm_segment *var, int seg);
1043 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1044 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
1045 void (*decache_cr3)(struct kvm_vcpu *vcpu);
1046 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
1047 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1048 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1049 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1050 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1051 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1052 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1053 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1054 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1055 u64 (*get_dr6)(struct kvm_vcpu *vcpu);
1056 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
1057 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1058 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1059 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1060 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1061 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1062
1063 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa);
1064 int (*tlb_remote_flush)(struct kvm *kvm);
1065 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1066 struct kvm_tlb_range *range);
1067
1068 /*
1069 * Flush any TLB entries associated with the given GVA.
1070 * Does not need to flush GPA->HPA mappings.
1071 * Can potentially get non-canonical addresses through INVLPGs, which
1072 * the implementation may choose to ignore if appropriate.
1073 */
1074 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1075
1076 void (*run)(struct kvm_vcpu *vcpu);
1077 int (*handle_exit)(struct kvm_vcpu *vcpu);
1078 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1079 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1080 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1081 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1082 unsigned char *hypercall_addr);
1083 void (*set_irq)(struct kvm_vcpu *vcpu);
1084 void (*set_nmi)(struct kvm_vcpu *vcpu);
1085 void (*queue_exception)(struct kvm_vcpu *vcpu);
1086 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1087 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
1088 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
1089 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1090 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1091 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1092 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1093 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1094 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu);
1095 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1096 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1097 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1098 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1099 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1100 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1101 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
1102 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1103 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1104 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1105 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1106 int (*get_tdp_level)(struct kvm_vcpu *vcpu);
1107 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1108 int (*get_lpage_level)(void);
1109 bool (*rdtscp_supported)(void);
1110 bool (*invpcid_supported)(void);
1111
1112 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1113
1114 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
1115
1116 bool (*has_wbinvd_exit)(void);
1117
1118 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu);
1119 /* Returns actual tsc_offset set in active VMCS */
1120 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1121
1122 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
1123
1124 int (*check_intercept)(struct kvm_vcpu *vcpu,
1125 struct x86_instruction_info *info,
1126 enum x86_intercept_stage stage);
1127 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1128 bool (*mpx_supported)(void);
1129 bool (*xsaves_supported)(void);
1130 bool (*umip_emulated)(void);
1131 bool (*pt_supported)(void);
1132 bool (*pku_supported)(void);
1133
1134 int (*check_nested_events)(struct kvm_vcpu *vcpu);
1135 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1136
1137 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1138
1139 /*
1140 * Arch-specific dirty logging hooks. These hooks are only supposed to
1141 * be valid if the specific arch has hardware-accelerated dirty logging
1142 * mechanism. Currently only for PML on VMX.
1143 *
1144 * - slot_enable_log_dirty:
1145 * called when enabling log dirty mode for the slot.
1146 * - slot_disable_log_dirty:
1147 * called when disabling log dirty mode for the slot.
1148 * also called when slot is created with log dirty disabled.
1149 * - flush_log_dirty:
1150 * called before reporting dirty_bitmap to userspace.
1151 * - enable_log_dirty_pt_masked:
1152 * called when reenabling log dirty for the GFNs in the mask after
1153 * corresponding bits are cleared in slot->dirty_bitmap.
1154 */
1155 void (*slot_enable_log_dirty)(struct kvm *kvm,
1156 struct kvm_memory_slot *slot);
1157 void (*slot_disable_log_dirty)(struct kvm *kvm,
1158 struct kvm_memory_slot *slot);
1159 void (*flush_log_dirty)(struct kvm *kvm);
1160 void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1161 struct kvm_memory_slot *slot,
1162 gfn_t offset, unsigned long mask);
1163 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1164
1165 /* pmu operations of sub-arch */
1166 const struct kvm_pmu_ops *pmu_ops;
1167
1168 /*
1169 * Architecture specific hooks for vCPU blocking due to
1170 * HLT instruction.
1171 * Returns for .pre_block():
1172 * - 0 means continue to block the vCPU.
1173 * - 1 means we cannot block the vCPU since some event
1174 * happens during this period, such as, 'ON' bit in
1175 * posted-interrupts descriptor is set.
1176 */
1177 int (*pre_block)(struct kvm_vcpu *vcpu);
1178 void (*post_block)(struct kvm_vcpu *vcpu);
1179
1180 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1181 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1182
1183 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1184 uint32_t guest_irq, bool set);
1185 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1186 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1187
1188 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1189 bool *expired);
1190 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1191
1192 void (*setup_mce)(struct kvm_vcpu *vcpu);
1193
1194 int (*get_nested_state)(struct kvm_vcpu *vcpu,
1195 struct kvm_nested_state __user *user_kvm_nested_state,
1196 unsigned user_data_size);
1197 int (*set_nested_state)(struct kvm_vcpu *vcpu,
1198 struct kvm_nested_state __user *user_kvm_nested_state,
1199 struct kvm_nested_state *kvm_state);
1200 bool (*get_vmcs12_pages)(struct kvm_vcpu *vcpu);
1201
1202 int (*smi_allowed)(struct kvm_vcpu *vcpu);
1203 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1204 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1205 int (*enable_smi_window)(struct kvm_vcpu *vcpu);
1206
1207 int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1208 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1209 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1210
1211 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1212
1213 int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu,
1214 uint16_t *vmcs_version);
1215 uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu);
1216
1217 bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu);
1218
1219 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1220 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1221 };
1222
1223 struct kvm_arch_async_pf {
1224 u32 token;
1225 gfn_t gfn;
1226 unsigned long cr3;
1227 bool direct_map;
1228 };
1229
1230 extern struct kvm_x86_ops *kvm_x86_ops;
1231 extern struct kmem_cache *x86_fpu_cache;
1232
1233 #define __KVM_HAVE_ARCH_VM_ALLOC
kvm_arch_alloc_vm(void)1234 static inline struct kvm *kvm_arch_alloc_vm(void)
1235 {
1236 return kvm_x86_ops->vm_alloc();
1237 }
1238
kvm_arch_free_vm(struct kvm * kvm)1239 static inline void kvm_arch_free_vm(struct kvm *kvm)
1240 {
1241 return kvm_x86_ops->vm_free(kvm);
1242 }
1243
1244 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
kvm_arch_flush_remote_tlb(struct kvm * kvm)1245 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1246 {
1247 if (kvm_x86_ops->tlb_remote_flush &&
1248 !kvm_x86_ops->tlb_remote_flush(kvm))
1249 return 0;
1250 else
1251 return -ENOTSUPP;
1252 }
1253
1254 int kvm_mmu_module_init(void);
1255 void kvm_mmu_module_exit(void);
1256
1257 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1258 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1259 void kvm_mmu_init_vm(struct kvm *kvm);
1260 void kvm_mmu_uninit_vm(struct kvm *kvm);
1261 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1262 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1263 u64 acc_track_mask, u64 me_mask);
1264
1265 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1266 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1267 struct kvm_memory_slot *memslot);
1268 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1269 const struct kvm_memory_slot *memslot);
1270 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1271 struct kvm_memory_slot *memslot);
1272 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1273 struct kvm_memory_slot *memslot);
1274 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1275 struct kvm_memory_slot *memslot);
1276 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1277 struct kvm_memory_slot *slot,
1278 gfn_t gfn_offset, unsigned long mask);
1279 void kvm_mmu_zap_all(struct kvm *kvm);
1280 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1281 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm);
1282 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1283
1284 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1285 bool pdptrs_changed(struct kvm_vcpu *vcpu);
1286
1287 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1288 const void *val, int bytes);
1289
1290 struct kvm_irq_mask_notifier {
1291 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1292 int irq;
1293 struct hlist_node link;
1294 };
1295
1296 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1297 struct kvm_irq_mask_notifier *kimn);
1298 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1299 struct kvm_irq_mask_notifier *kimn);
1300 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1301 bool mask);
1302
1303 extern bool tdp_enabled;
1304
1305 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1306
1307 /* control of guest tsc rate supported? */
1308 extern bool kvm_has_tsc_control;
1309 /* maximum supported tsc_khz for guests */
1310 extern u32 kvm_max_guest_tsc_khz;
1311 /* number of bits of the fractional part of the TSC scaling ratio */
1312 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1313 /* maximum allowed value of TSC scaling ratio */
1314 extern u64 kvm_max_tsc_scaling_ratio;
1315 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1316 extern u64 kvm_default_tsc_scaling_ratio;
1317
1318 extern u64 kvm_mce_cap_supported;
1319
1320 /*
1321 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1322 * userspace I/O) to indicate that the emulation context
1323 * should be resued as is, i.e. skip initialization of
1324 * emulation context, instruction fetch and decode.
1325 *
1326 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1327 * Indicates that only select instructions (tagged with
1328 * EmulateOnUD) should be emulated (to minimize the emulator
1329 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1330 *
1331 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1332 * decode the instruction length. For use *only* by
1333 * kvm_x86_ops->skip_emulated_instruction() implementations.
1334 *
1335 * EMULTYPE_ALLOW_RETRY - Set when the emulator should resume the guest to
1336 * retry native execution under certain conditions.
1337 *
1338 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1339 * triggered by KVM's magic "force emulation" prefix,
1340 * which is opt in via module param (off by default).
1341 * Bypasses EmulateOnUD restriction despite emulating
1342 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1343 * Used to test the full emulator from userspace.
1344 *
1345 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1346 * backdoor emulation, which is opt in via module param.
1347 * VMware backoor emulation handles select instructions
1348 * and reinjects the #GP for all other cases.
1349 */
1350 #define EMULTYPE_NO_DECODE (1 << 0)
1351 #define EMULTYPE_TRAP_UD (1 << 1)
1352 #define EMULTYPE_SKIP (1 << 2)
1353 #define EMULTYPE_ALLOW_RETRY (1 << 3)
1354 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1355 #define EMULTYPE_VMWARE_GP (1 << 5)
1356 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1357 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1358 void *insn, int insn_len);
1359
1360 void kvm_enable_efer_bits(u64);
1361 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1362 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1363 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1364 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1365 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1366
1367 struct x86_emulate_ctxt;
1368
1369 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1370 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1371 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1372 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1373 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1374
1375 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1376 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1377 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1378
1379 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1380 int reason, bool has_error_code, u32 error_code);
1381
1382 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1383 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1384 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1385 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1386 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1387 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1388 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1389 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1390 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1391 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1392
1393 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1394 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1395
1396 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1397 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1398 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1399
1400 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1401 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1402 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1403 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1404 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1405 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1406 gfn_t gfn, void *data, int offset, int len,
1407 u32 access);
1408 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1409 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1410
__kvm_irq_line_state(unsigned long * irq_state,int irq_source_id,int level)1411 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1412 int irq_source_id, int level)
1413 {
1414 /* Logical OR for level trig interrupt */
1415 if (level)
1416 __set_bit(irq_source_id, irq_state);
1417 else
1418 __clear_bit(irq_source_id, irq_state);
1419
1420 return !!(*irq_state);
1421 }
1422
1423 #define KVM_MMU_ROOT_CURRENT BIT(0)
1424 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1425 #define KVM_MMU_ROOTS_ALL (~0UL)
1426
1427 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1428 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1429
1430 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1431
1432 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1433 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1434 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1435 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1436 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1437 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1438 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1439 ulong roots_to_free);
1440 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1441 struct x86_exception *exception);
1442 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1443 struct x86_exception *exception);
1444 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1445 struct x86_exception *exception);
1446 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1447 struct x86_exception *exception);
1448 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1449 struct x86_exception *exception);
1450
1451 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
1452
1453 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1454
1455 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1456 void *insn, int insn_len);
1457 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1458 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1459 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush);
1460
1461 void kvm_enable_tdp(void);
1462 void kvm_disable_tdp(void);
1463
translate_gpa(struct kvm_vcpu * vcpu,gpa_t gpa,u32 access,struct x86_exception * exception)1464 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1465 struct x86_exception *exception)
1466 {
1467 return gpa;
1468 }
1469
page_header(hpa_t shadow_page)1470 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1471 {
1472 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1473
1474 return (struct kvm_mmu_page *)page_private(page);
1475 }
1476
kvm_read_ldt(void)1477 static inline u16 kvm_read_ldt(void)
1478 {
1479 u16 ldt;
1480 asm("sldt %0" : "=g"(ldt));
1481 return ldt;
1482 }
1483
kvm_load_ldt(u16 sel)1484 static inline void kvm_load_ldt(u16 sel)
1485 {
1486 asm("lldt %0" : : "rm"(sel));
1487 }
1488
1489 #ifdef CONFIG_X86_64
read_msr(unsigned long msr)1490 static inline unsigned long read_msr(unsigned long msr)
1491 {
1492 u64 value;
1493
1494 rdmsrl(msr, value);
1495 return value;
1496 }
1497 #endif
1498
get_rdx_init_val(void)1499 static inline u32 get_rdx_init_val(void)
1500 {
1501 return 0x600; /* P6 family */
1502 }
1503
kvm_inject_gp(struct kvm_vcpu * vcpu,u32 error_code)1504 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1505 {
1506 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1507 }
1508
1509 #define TSS_IOPB_BASE_OFFSET 0x66
1510 #define TSS_BASE_SIZE 0x68
1511 #define TSS_IOPB_SIZE (65536 / 8)
1512 #define TSS_REDIRECTION_SIZE (256 / 8)
1513 #define RMODE_TSS_SIZE \
1514 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1515
1516 enum {
1517 TASK_SWITCH_CALL = 0,
1518 TASK_SWITCH_IRET = 1,
1519 TASK_SWITCH_JMP = 2,
1520 TASK_SWITCH_GATE = 3,
1521 };
1522
1523 #define HF_GIF_MASK (1 << 0)
1524 #define HF_HIF_MASK (1 << 1)
1525 #define HF_VINTR_MASK (1 << 2)
1526 #define HF_NMI_MASK (1 << 3)
1527 #define HF_IRET_MASK (1 << 4)
1528 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1529 #define HF_SMM_MASK (1 << 6)
1530 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1531
1532 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1533 #define KVM_ADDRESS_SPACE_NUM 2
1534
1535 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1536 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1537
1538 asmlinkage void kvm_spurious_fault(void);
1539
1540 /*
1541 * Hardware virtualization extension instructions may fault if a
1542 * reboot turns off virtualization while processes are running.
1543 * Usually after catching the fault we just panic; during reboot
1544 * instead the instruction is ignored.
1545 */
1546 #define __kvm_handle_fault_on_reboot(insn) \
1547 "666: \n\t" \
1548 insn "\n\t" \
1549 "jmp 668f \n\t" \
1550 "667: \n\t" \
1551 "call kvm_spurious_fault \n\t" \
1552 "668: \n\t" \
1553 _ASM_EXTABLE(666b, 667b)
1554
1555 #define KVM_ARCH_WANT_MMU_NOTIFIER
1556 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end,
1557 unsigned flags);
1558 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1559 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1560 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1561 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1562 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1563 int kvm_cpu_has_extint(struct kvm_vcpu *v);
1564 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1565 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1566 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1567 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1568
1569 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1570 unsigned long ipi_bitmap_high, u32 min,
1571 unsigned long icr, int op_64_bit);
1572
1573 void kvm_define_shared_msr(unsigned index, u32 msr);
1574 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1575
1576 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1577 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1578
1579 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1580 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1581
1582 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1583 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1584
1585 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1586 struct kvm_async_pf *work);
1587 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1588 struct kvm_async_pf *work);
1589 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1590 struct kvm_async_pf *work);
1591 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1592 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1593
1594 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1595 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1596 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1597
1598 int kvm_is_in_guest(void);
1599
1600 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1601 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1602 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1603 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1604
1605 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1606 struct kvm_vcpu **dest_vcpu);
1607
1608 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1609 struct kvm_lapic_irq *irq);
1610
kvm_irq_is_postable(struct kvm_lapic_irq * irq)1611 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1612 {
1613 /* We can only post Fixed and LowPrio IRQs */
1614 return (irq->delivery_mode == APIC_DM_FIXED ||
1615 irq->delivery_mode == APIC_DM_LOWEST);
1616 }
1617
kvm_arch_vcpu_blocking(struct kvm_vcpu * vcpu)1618 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1619 {
1620 if (kvm_x86_ops->vcpu_blocking)
1621 kvm_x86_ops->vcpu_blocking(vcpu);
1622 }
1623
kvm_arch_vcpu_unblocking(struct kvm_vcpu * vcpu)1624 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1625 {
1626 if (kvm_x86_ops->vcpu_unblocking)
1627 kvm_x86_ops->vcpu_unblocking(vcpu);
1628 }
1629
kvm_arch_vcpu_block_finish(struct kvm_vcpu * vcpu)1630 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1631
kvm_cpu_get_apicid(int mps_cpu)1632 static inline int kvm_cpu_get_apicid(int mps_cpu)
1633 {
1634 #ifdef CONFIG_X86_LOCAL_APIC
1635 return default_cpu_present_to_apicid(mps_cpu);
1636 #else
1637 WARN_ON_ONCE(1);
1638 return BAD_APICID;
1639 #endif
1640 }
1641
1642 #define put_smstate(type, buf, offset, val) \
1643 *(type *)((buf) + (offset) - 0x7e00) = val
1644
1645 #define GET_SMSTATE(type, buf, offset) \
1646 (*(type *)((buf) + (offset) - 0x7e00))
1647
1648 #endif /* _ASM_X86_KVM_HOST_H */
1649