1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/arch/arm/mach-pxa/viper.c
4 *
5 * Support for the Arcom VIPER SBC.
6 *
7 * Author: Ian Campbell
8 * Created: Feb 03, 2003
9 * Copyright: Arcom Control Systems
10 *
11 * Maintained by Marc Zyngier <maz@misterjones.org>
12 * <marc.zyngier@altran.com>
13 *
14 * Based on lubbock.c:
15 * Author: Nicolas Pitre
16 * Created: Jun 15, 2001
17 * Copyright: MontaVista Software Inc.
18 */
19
20 #include <linux/types.h>
21 #include <linux/memory.h>
22 #include <linux/cpu.h>
23 #include <linux/cpufreq.h>
24 #include <linux/delay.h>
25 #include <linux/fs.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/interrupt.h>
29 #include <linux/major.h>
30 #include <linux/module.h>
31 #include <linux/pm.h>
32 #include <linux/sched.h>
33 #include <linux/gpio.h>
34 #include <linux/jiffies.h>
35 #include <linux/platform_data/i2c-gpio.h>
36 #include <linux/gpio/machine.h>
37 #include <linux/platform_data/i2c-pxa.h>
38 #include <linux/serial_8250.h>
39 #include <linux/smc91x.h>
40 #include <linux/pwm.h>
41 #include <linux/pwm_backlight.h>
42 #include <linux/usb/isp116x.h>
43 #include <linux/mtd/mtd.h>
44 #include <linux/mtd/partitions.h>
45 #include <linux/mtd/physmap.h>
46 #include <linux/syscore_ops.h>
47
48 #include "pxa25x.h"
49 #include <mach/audio.h>
50 #include <linux/platform_data/video-pxafb.h>
51 #include <mach/regs-uart.h>
52 #include <linux/platform_data/pcmcia-pxa2xx_viper.h>
53 #include "viper.h"
54
55 #include <asm/setup.h>
56 #include <asm/mach-types.h>
57 #include <asm/irq.h>
58 #include <linux/sizes.h>
59 #include <asm/system_info.h>
60
61 #include <asm/mach/arch.h>
62 #include <asm/mach/map.h>
63 #include <asm/mach/irq.h>
64
65 #include "generic.h"
66 #include "devices.h"
67
68 static unsigned int icr;
69
viper_icr_set_bit(unsigned int bit)70 static void viper_icr_set_bit(unsigned int bit)
71 {
72 icr |= bit;
73 VIPER_ICR = icr;
74 }
75
viper_icr_clear_bit(unsigned int bit)76 static void viper_icr_clear_bit(unsigned int bit)
77 {
78 icr &= ~bit;
79 VIPER_ICR = icr;
80 }
81
82 /* This function is used from the pcmcia module to reset the CF */
viper_cf_reset(int state)83 static void viper_cf_reset(int state)
84 {
85 if (state)
86 viper_icr_set_bit(VIPER_ICR_CF_RST);
87 else
88 viper_icr_clear_bit(VIPER_ICR_CF_RST);
89 }
90
91 static struct arcom_pcmcia_pdata viper_pcmcia_info = {
92 .cd_gpio = VIPER_CF_CD_GPIO,
93 .rdy_gpio = VIPER_CF_RDY_GPIO,
94 .pwr_gpio = VIPER_CF_POWER_GPIO,
95 .reset = viper_cf_reset,
96 };
97
98 static struct platform_device viper_pcmcia_device = {
99 .name = "viper-pcmcia",
100 .id = -1,
101 .dev = {
102 .platform_data = &viper_pcmcia_info,
103 },
104 };
105
106 /*
107 * The CPLD version register was not present on VIPER boards prior to
108 * v2i1. On v1 boards where the version register is not present we
109 * will just read back the previous value from the databus.
110 *
111 * Therefore we do two reads. The first time we write 0 to the
112 * (read-only) register before reading and the second time we write
113 * 0xff first. If the two reads do not match or they read back as 0xff
114 * or 0x00 then we have version 1 hardware.
115 */
viper_hw_version(void)116 static u8 viper_hw_version(void)
117 {
118 u8 v1, v2;
119 unsigned long flags;
120
121 local_irq_save(flags);
122
123 VIPER_VERSION = 0;
124 v1 = VIPER_VERSION;
125 VIPER_VERSION = 0xff;
126 v2 = VIPER_VERSION;
127
128 v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
129
130 local_irq_restore(flags);
131 return v1;
132 }
133
134 /* CPU system core operations. */
viper_cpu_suspend(void)135 static int viper_cpu_suspend(void)
136 {
137 viper_icr_set_bit(VIPER_ICR_R_DIS);
138 return 0;
139 }
140
viper_cpu_resume(void)141 static void viper_cpu_resume(void)
142 {
143 viper_icr_clear_bit(VIPER_ICR_R_DIS);
144 }
145
146 static struct syscore_ops viper_cpu_syscore_ops = {
147 .suspend = viper_cpu_suspend,
148 .resume = viper_cpu_resume,
149 };
150
151 static unsigned int current_voltage_divisor;
152
153 /*
154 * If force is not true then step from existing to new divisor. If
155 * force is true then jump straight to the new divisor. Stepping is
156 * used because if the jump in voltage is too large, the VCC can dip
157 * too low and the regulator cuts out.
158 *
159 * force can be used to initialize the divisor to a know state by
160 * setting the value for the current clock speed, since we are already
161 * running at that speed we know the voltage should be pretty close so
162 * the jump won't be too large
163 */
viper_set_core_cpu_voltage(unsigned long khz,int force)164 static void viper_set_core_cpu_voltage(unsigned long khz, int force)
165 {
166 int i = 0;
167 unsigned int divisor = 0;
168 const char *v;
169
170 if (khz < 200000) {
171 v = "1.0"; divisor = 0xfff;
172 } else if (khz < 300000) {
173 v = "1.1"; divisor = 0xde5;
174 } else {
175 v = "1.3"; divisor = 0x325;
176 }
177
178 pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
179 v, (int)khz / 1000, (int)khz % 1000);
180
181 #define STEP 0x100
182 do {
183 int step;
184
185 if (force)
186 step = divisor;
187 else if (current_voltage_divisor < divisor - STEP)
188 step = current_voltage_divisor + STEP;
189 else if (current_voltage_divisor > divisor + STEP)
190 step = current_voltage_divisor - STEP;
191 else
192 step = divisor;
193 force = 0;
194
195 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
196 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
197
198 for (i = 1 << 11 ; i > 0 ; i >>= 1) {
199 udelay(1);
200
201 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
202 udelay(1);
203
204 gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
205 udelay(1);
206
207 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
208 }
209 udelay(1);
210
211 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
212 udelay(1);
213
214 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
215
216 current_voltage_divisor = step;
217 } while (current_voltage_divisor != divisor);
218 }
219
220 /* Interrupt handling */
221 static unsigned long viper_irq_enabled_mask;
222 static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
223 static const int viper_isa_irq_map[] = {
224 0, /* ISA irq #0, invalid */
225 0, /* ISA irq #1, invalid */
226 0, /* ISA irq #2, invalid */
227 1 << 0, /* ISA irq #3 */
228 1 << 1, /* ISA irq #4 */
229 1 << 2, /* ISA irq #5 */
230 1 << 3, /* ISA irq #6 */
231 1 << 4, /* ISA irq #7 */
232 0, /* ISA irq #8, invalid */
233 1 << 8, /* ISA irq #9 */
234 1 << 5, /* ISA irq #10 */
235 1 << 6, /* ISA irq #11 */
236 1 << 7, /* ISA irq #12 */
237 0, /* ISA irq #13, invalid */
238 1 << 9, /* ISA irq #14 */
239 1 << 10, /* ISA irq #15 */
240 };
241
viper_irq_to_bitmask(unsigned int irq)242 static inline int viper_irq_to_bitmask(unsigned int irq)
243 {
244 return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
245 }
246
viper_bit_to_irq(int bit)247 static inline int viper_bit_to_irq(int bit)
248 {
249 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
250 }
251
viper_ack_irq(struct irq_data * d)252 static void viper_ack_irq(struct irq_data *d)
253 {
254 int viper_irq = viper_irq_to_bitmask(d->irq);
255
256 if (viper_irq & 0xff)
257 VIPER_LO_IRQ_STATUS = viper_irq;
258 else
259 VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
260 }
261
viper_mask_irq(struct irq_data * d)262 static void viper_mask_irq(struct irq_data *d)
263 {
264 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
265 }
266
viper_unmask_irq(struct irq_data * d)267 static void viper_unmask_irq(struct irq_data *d)
268 {
269 viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
270 }
271
viper_irq_pending(void)272 static inline unsigned long viper_irq_pending(void)
273 {
274 return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
275 viper_irq_enabled_mask;
276 }
277
viper_irq_handler(struct irq_desc * desc)278 static void viper_irq_handler(struct irq_desc *desc)
279 {
280 unsigned int irq;
281 unsigned long pending;
282
283 pending = viper_irq_pending();
284 do {
285 /* we're in a chained irq handler,
286 * so ack the interrupt by hand */
287 desc->irq_data.chip->irq_ack(&desc->irq_data);
288
289 if (likely(pending)) {
290 irq = viper_bit_to_irq(__ffs(pending));
291 generic_handle_irq(irq);
292 }
293 pending = viper_irq_pending();
294 } while (pending);
295 }
296
297 static struct irq_chip viper_irq_chip = {
298 .name = "ISA",
299 .irq_ack = viper_ack_irq,
300 .irq_mask = viper_mask_irq,
301 .irq_unmask = viper_unmask_irq
302 };
303
viper_init_irq(void)304 static void __init viper_init_irq(void)
305 {
306 int level;
307 int isa_irq;
308
309 pxa25x_init_irq();
310
311 /* setup ISA IRQs */
312 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
313 isa_irq = viper_bit_to_irq(level);
314 irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
315 handle_edge_irq);
316 irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
317 }
318
319 irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
320 viper_irq_handler);
321 irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
322 }
323
324 /* Flat Panel */
325 static struct pxafb_mode_info fb_mode_info[] = {
326 {
327 .pixclock = 157500,
328
329 .xres = 320,
330 .yres = 240,
331
332 .bpp = 16,
333
334 .hsync_len = 63,
335 .left_margin = 7,
336 .right_margin = 13,
337
338 .vsync_len = 20,
339 .upper_margin = 0,
340 .lower_margin = 0,
341
342 .sync = 0,
343 },
344 };
345
346 static struct pxafb_mach_info fb_info = {
347 .modes = fb_mode_info,
348 .num_modes = 1,
349 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
350 };
351
352 static struct pwm_lookup viper_pwm_lookup[] = {
353 PWM_LOOKUP("pxa25x-pwm.0", 0, "pwm-backlight.0", NULL, 1000000,
354 PWM_POLARITY_NORMAL),
355 };
356
viper_backlight_init(struct device * dev)357 static int viper_backlight_init(struct device *dev)
358 {
359 int ret;
360
361 /* GPIO9 and 10 control FB backlight. Initialise to off */
362 ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
363 if (ret)
364 goto err_request_bckl;
365
366 ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
367 if (ret)
368 goto err_request_lcd;
369
370 ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
371 if (ret)
372 goto err_dir;
373
374 ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
375 if (ret)
376 goto err_dir;
377
378 return 0;
379
380 err_dir:
381 gpio_free(VIPER_LCD_EN_GPIO);
382 err_request_lcd:
383 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
384 err_request_bckl:
385 dev_err(dev, "Failed to setup LCD GPIOs\n");
386
387 return ret;
388 }
389
viper_backlight_notify(struct device * dev,int brightness)390 static int viper_backlight_notify(struct device *dev, int brightness)
391 {
392 gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
393 gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
394
395 return brightness;
396 }
397
viper_backlight_exit(struct device * dev)398 static void viper_backlight_exit(struct device *dev)
399 {
400 gpio_free(VIPER_LCD_EN_GPIO);
401 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
402 }
403
404 static struct platform_pwm_backlight_data viper_backlight_data = {
405 .max_brightness = 100,
406 .dft_brightness = 100,
407 .enable_gpio = -1,
408 .init = viper_backlight_init,
409 .notify = viper_backlight_notify,
410 .exit = viper_backlight_exit,
411 };
412
413 static struct platform_device viper_backlight_device = {
414 .name = "pwm-backlight",
415 .dev = {
416 .parent = &pxa25x_device_pwm0.dev,
417 .platform_data = &viper_backlight_data,
418 },
419 };
420
421 /* Ethernet */
422 static struct resource smc91x_resources[] = {
423 [0] = {
424 .name = "smc91x-regs",
425 .start = VIPER_ETH_PHYS + 0x300,
426 .end = VIPER_ETH_PHYS + 0x30f,
427 .flags = IORESOURCE_MEM,
428 },
429 [1] = {
430 .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
431 .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
432 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
433 },
434 [2] = {
435 .name = "smc91x-data32",
436 .start = VIPER_ETH_DATA_PHYS,
437 .end = VIPER_ETH_DATA_PHYS + 3,
438 .flags = IORESOURCE_MEM,
439 },
440 };
441
442 static struct smc91x_platdata viper_smc91x_info = {
443 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
444 .leda = RPC_LED_100_10,
445 .ledb = RPC_LED_TX_RX,
446 };
447
448 static struct platform_device smc91x_device = {
449 .name = "smc91x",
450 .id = -1,
451 .num_resources = ARRAY_SIZE(smc91x_resources),
452 .resource = smc91x_resources,
453 .dev = {
454 .platform_data = &viper_smc91x_info,
455 },
456 };
457
458 /* i2c */
459 static struct gpiod_lookup_table viper_i2c_gpiod_table = {
460 .dev_id = "i2c-gpio.1",
461 .table = {
462 GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SDA_GPIO,
463 NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
464 GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SCL_GPIO,
465 NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
466 },
467 };
468
469 static struct i2c_gpio_platform_data i2c_bus_data = {
470 .udelay = 10,
471 .timeout = HZ,
472 };
473
474 static struct platform_device i2c_bus_device = {
475 .name = "i2c-gpio",
476 .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
477 .dev = {
478 .platform_data = &i2c_bus_data,
479 }
480 };
481
482 static struct i2c_board_info __initdata viper_i2c_devices[] = {
483 {
484 I2C_BOARD_INFO("ds1338", 0x68),
485 },
486 };
487
488 /*
489 * Serial configuration:
490 * You can either have the standard PXA ports driven by the PXA driver,
491 * or all the ports (PXA + 16850) driven by the 8250 driver.
492 * Choose your poison.
493 */
494
495 static struct resource viper_serial_resources[] = {
496 #ifndef CONFIG_SERIAL_PXA
497 {
498 .start = 0x40100000,
499 .end = 0x4010001f,
500 .flags = IORESOURCE_MEM,
501 },
502 {
503 .start = 0x40200000,
504 .end = 0x4020001f,
505 .flags = IORESOURCE_MEM,
506 },
507 {
508 .start = 0x40700000,
509 .end = 0x4070001f,
510 .flags = IORESOURCE_MEM,
511 },
512 {
513 .start = VIPER_UARTA_PHYS,
514 .end = VIPER_UARTA_PHYS + 0xf,
515 .flags = IORESOURCE_MEM,
516 },
517 {
518 .start = VIPER_UARTB_PHYS,
519 .end = VIPER_UARTB_PHYS + 0xf,
520 .flags = IORESOURCE_MEM,
521 },
522 #else
523 {
524 0,
525 },
526 #endif
527 };
528
529 static struct plat_serial8250_port serial_platform_data[] = {
530 #ifndef CONFIG_SERIAL_PXA
531 /* Internal UARTs */
532 {
533 .membase = (void *)&FFUART,
534 .mapbase = __PREG(FFUART),
535 .irq = IRQ_FFUART,
536 .uartclk = 921600 * 16,
537 .regshift = 2,
538 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
539 .iotype = UPIO_MEM,
540 },
541 {
542 .membase = (void *)&BTUART,
543 .mapbase = __PREG(BTUART),
544 .irq = IRQ_BTUART,
545 .uartclk = 921600 * 16,
546 .regshift = 2,
547 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
548 .iotype = UPIO_MEM,
549 },
550 {
551 .membase = (void *)&STUART,
552 .mapbase = __PREG(STUART),
553 .irq = IRQ_STUART,
554 .uartclk = 921600 * 16,
555 .regshift = 2,
556 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
557 .iotype = UPIO_MEM,
558 },
559 /* External UARTs */
560 {
561 .mapbase = VIPER_UARTA_PHYS,
562 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
563 .irqflags = IRQF_TRIGGER_RISING,
564 .uartclk = 1843200,
565 .regshift = 1,
566 .iotype = UPIO_MEM,
567 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
568 UPF_SKIP_TEST,
569 },
570 {
571 .mapbase = VIPER_UARTB_PHYS,
572 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
573 .irqflags = IRQF_TRIGGER_RISING,
574 .uartclk = 1843200,
575 .regshift = 1,
576 .iotype = UPIO_MEM,
577 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
578 UPF_SKIP_TEST,
579 },
580 #endif
581 { },
582 };
583
584 static struct platform_device serial_device = {
585 .name = "serial8250",
586 .id = 0,
587 .dev = {
588 .platform_data = serial_platform_data,
589 },
590 .num_resources = ARRAY_SIZE(viper_serial_resources),
591 .resource = viper_serial_resources,
592 };
593
594 /* USB */
isp116x_delay(struct device * dev,int delay)595 static void isp116x_delay(struct device *dev, int delay)
596 {
597 ndelay(delay);
598 }
599
600 static struct resource isp116x_resources[] = {
601 [0] = { /* DATA */
602 .start = VIPER_USB_PHYS + 0,
603 .end = VIPER_USB_PHYS + 1,
604 .flags = IORESOURCE_MEM,
605 },
606 [1] = { /* ADDR */
607 .start = VIPER_USB_PHYS + 2,
608 .end = VIPER_USB_PHYS + 3,
609 .flags = IORESOURCE_MEM,
610 },
611 [2] = {
612 .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
613 .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
614 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
615 },
616 };
617
618 /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
619 static struct isp116x_platform_data isp116x_platform_data = {
620 /* Enable internal resistors on downstream ports */
621 .sel15Kres = 1,
622 /* On-chip overcurrent protection */
623 .oc_enable = 1,
624 /* INT output polarity */
625 .int_act_high = 1,
626 /* INT edge or level triggered */
627 .int_edge_triggered = 0,
628
629 /* WAKEUP pin connected - NOT SUPPORTED */
630 /* .remote_wakeup_connected = 0, */
631 /* Wakeup by devices on usb bus enabled */
632 .remote_wakeup_enable = 0,
633 .delay = isp116x_delay,
634 };
635
636 static struct platform_device isp116x_device = {
637 .name = "isp116x-hcd",
638 .id = -1,
639 .num_resources = ARRAY_SIZE(isp116x_resources),
640 .resource = isp116x_resources,
641 .dev = {
642 .platform_data = &isp116x_platform_data,
643 },
644
645 };
646
647 /* MTD */
648 static struct resource mtd_resources[] = {
649 [0] = { /* RedBoot config + filesystem flash */
650 .start = VIPER_FLASH_PHYS,
651 .end = VIPER_FLASH_PHYS + SZ_32M - 1,
652 .flags = IORESOURCE_MEM,
653 },
654 [1] = { /* Boot flash */
655 .start = VIPER_BOOT_PHYS,
656 .end = VIPER_BOOT_PHYS + SZ_1M - 1,
657 .flags = IORESOURCE_MEM,
658 },
659 [2] = { /*
660 * SRAM size is actually 256KB, 8bits, with a sparse mapping
661 * (each byte is on a 16bit boundary).
662 */
663 .start = _VIPER_SRAM_BASE,
664 .end = _VIPER_SRAM_BASE + SZ_512K - 1,
665 .flags = IORESOURCE_MEM,
666 },
667 };
668
669 static struct mtd_partition viper_boot_flash_partition = {
670 .name = "RedBoot",
671 .size = SZ_1M,
672 .offset = 0,
673 .mask_flags = MTD_WRITEABLE, /* force R/O */
674 };
675
676 static struct physmap_flash_data viper_flash_data[] = {
677 [0] = {
678 .width = 2,
679 .parts = NULL,
680 .nr_parts = 0,
681 },
682 [1] = {
683 .width = 2,
684 .parts = &viper_boot_flash_partition,
685 .nr_parts = 1,
686 },
687 };
688
689 static struct platform_device viper_mtd_devices[] = {
690 [0] = {
691 .name = "physmap-flash",
692 .id = 0,
693 .dev = {
694 .platform_data = &viper_flash_data[0],
695 },
696 .resource = &mtd_resources[0],
697 .num_resources = 1,
698 },
699 [1] = {
700 .name = "physmap-flash",
701 .id = 1,
702 .dev = {
703 .platform_data = &viper_flash_data[1],
704 },
705 .resource = &mtd_resources[1],
706 .num_resources = 1,
707 },
708 };
709
710 static struct platform_device *viper_devs[] __initdata = {
711 &smc91x_device,
712 &i2c_bus_device,
713 &serial_device,
714 &isp116x_device,
715 &viper_mtd_devices[0],
716 &viper_mtd_devices[1],
717 &viper_backlight_device,
718 &viper_pcmcia_device,
719 };
720
721 static mfp_cfg_t viper_pin_config[] __initdata = {
722 /* Chip selects */
723 GPIO15_nCS_1,
724 GPIO78_nCS_2,
725 GPIO79_nCS_3,
726 GPIO80_nCS_4,
727 GPIO33_nCS_5,
728
729 /* AC97 */
730 GPIO28_AC97_BITCLK,
731 GPIO29_AC97_SDATA_IN_0,
732 GPIO30_AC97_SDATA_OUT,
733 GPIO31_AC97_SYNC,
734
735 /* FP Backlight */
736 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
737 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
738 GPIO16_PWM0_OUT,
739
740 /* Ethernet PHY Ready */
741 GPIO18_RDY,
742
743 /* Serial shutdown */
744 GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
745
746 /* Compact-Flash / PC104 */
747 GPIO48_nPOE,
748 GPIO49_nPWE,
749 GPIO50_nPIOR,
750 GPIO51_nPIOW,
751 GPIO52_nPCE_1,
752 GPIO53_nPCE_2,
753 GPIO54_nPSKTSEL,
754 GPIO55_nPREG,
755 GPIO56_nPWAIT,
756 GPIO57_nIOIS16,
757 GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
758 GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
759 GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
760
761 /* Integrated UPS control */
762 GPIO20_GPIO, /* VIPER_UPS_GPIO */
763
764 /* Vcc regulator control */
765 GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
766 GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
767 GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
768
769 /* i2c busses */
770 GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
771 GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
772 GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
773 GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
774
775 /* PC/104 Interrupt */
776 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
777 };
778
779 static unsigned long viper_tpm;
780
viper_tpm_setup(char * str)781 static int __init viper_tpm_setup(char *str)
782 {
783 return kstrtoul(str, 10, &viper_tpm) >= 0;
784 }
785
786 __setup("tpm=", viper_tpm_setup);
787
788 struct gpiod_lookup_table viper_tpm_i2c_gpiod_table = {
789 .dev_id = "i2c-gpio.2",
790 .table = {
791 GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SDA_GPIO,
792 NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
793 GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SCL_GPIO,
794 NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
795 },
796 };
797
viper_tpm_init(void)798 static void __init viper_tpm_init(void)
799 {
800 struct platform_device *tpm_device;
801 struct i2c_gpio_platform_data i2c_tpm_data = {
802 .udelay = 10,
803 .timeout = HZ,
804 };
805 char *errstr;
806
807 /* Allocate TPM i2c bus if requested */
808 if (!viper_tpm)
809 return;
810
811 gpiod_add_lookup_table(&viper_tpm_i2c_gpiod_table);
812 tpm_device = platform_device_alloc("i2c-gpio", 2);
813 if (tpm_device) {
814 if (!platform_device_add_data(tpm_device,
815 &i2c_tpm_data,
816 sizeof(i2c_tpm_data))) {
817 if (platform_device_add(tpm_device)) {
818 errstr = "register TPM i2c bus";
819 goto error_free_tpm;
820 }
821 } else {
822 errstr = "allocate TPM i2c bus data";
823 goto error_free_tpm;
824 }
825 } else {
826 errstr = "allocate TPM i2c device";
827 goto error_tpm;
828 }
829
830 return;
831
832 error_free_tpm:
833 kfree(tpm_device);
834 error_tpm:
835 pr_err("viper: Couldn't %s, giving up\n", errstr);
836 }
837
viper_init_vcore_gpios(void)838 static void __init viper_init_vcore_gpios(void)
839 {
840 if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
841 goto err_request_data;
842
843 if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
844 goto err_request_clk;
845
846 if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
847 goto err_request_cs;
848
849 if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
850 gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
851 gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
852 goto err_dir;
853
854 /* c/should assume redboot set the correct level ??? */
855 viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
856
857 return;
858
859 err_dir:
860 gpio_free(VIPER_PSU_nCS_LD_GPIO);
861 err_request_cs:
862 gpio_free(VIPER_PSU_CLK_GPIO);
863 err_request_clk:
864 gpio_free(VIPER_PSU_DATA_GPIO);
865 err_request_data:
866 pr_err("viper: Failed to setup vcore control GPIOs\n");
867 }
868
viper_init_serial_gpio(void)869 static void __init viper_init_serial_gpio(void)
870 {
871 if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
872 goto err_request;
873
874 if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
875 goto err_dir;
876
877 return;
878
879 err_dir:
880 gpio_free(VIPER_UART_SHDN_GPIO);
881 err_request:
882 pr_err("viper: Failed to setup UART shutdown GPIO\n");
883 }
884
885 #ifdef CONFIG_CPU_FREQ
viper_cpufreq_notifier(struct notifier_block * nb,unsigned long val,void * data)886 static int viper_cpufreq_notifier(struct notifier_block *nb,
887 unsigned long val, void *data)
888 {
889 struct cpufreq_freqs *freq = data;
890
891 /* TODO: Adjust timings??? */
892
893 switch (val) {
894 case CPUFREQ_PRECHANGE:
895 if (freq->old < freq->new) {
896 /* we are getting faster so raise the voltage
897 * before we change freq */
898 viper_set_core_cpu_voltage(freq->new, 0);
899 }
900 break;
901 case CPUFREQ_POSTCHANGE:
902 if (freq->old > freq->new) {
903 /* we are slowing down so drop the power
904 * after we change freq */
905 viper_set_core_cpu_voltage(freq->new, 0);
906 }
907 break;
908 default:
909 /* ignore */
910 break;
911 }
912
913 return 0;
914 }
915
916 static struct notifier_block viper_cpufreq_notifier_block = {
917 .notifier_call = viper_cpufreq_notifier
918 };
919
viper_init_cpufreq(void)920 static void __init viper_init_cpufreq(void)
921 {
922 if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
923 CPUFREQ_TRANSITION_NOTIFIER))
924 pr_err("viper: Failed to setup cpufreq notifier\n");
925 }
926 #else
viper_init_cpufreq(void)927 static inline void viper_init_cpufreq(void) {}
928 #endif
929
viper_power_off(void)930 static void viper_power_off(void)
931 {
932 pr_notice("Shutting off UPS\n");
933 gpio_set_value(VIPER_UPS_GPIO, 1);
934 /* Spin to death... */
935 while (1);
936 }
937
viper_init(void)938 static void __init viper_init(void)
939 {
940 u8 version;
941
942 pm_power_off = viper_power_off;
943
944 pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
945
946 pxa_set_ffuart_info(NULL);
947 pxa_set_btuart_info(NULL);
948 pxa_set_stuart_info(NULL);
949
950 /* Wake-up serial console */
951 viper_init_serial_gpio();
952
953 pxa_set_fb_info(NULL, &fb_info);
954
955 /* v1 hardware cannot use the datacs line */
956 version = viper_hw_version();
957 if (version == 0)
958 smc91x_device.num_resources--;
959
960 pxa_set_i2c_info(NULL);
961 gpiod_add_lookup_table(&viper_i2c_gpiod_table);
962 pwm_add_table(viper_pwm_lookup, ARRAY_SIZE(viper_pwm_lookup));
963 platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
964
965 viper_init_vcore_gpios();
966 viper_init_cpufreq();
967
968 register_syscore_ops(&viper_cpu_syscore_ops);
969
970 if (version) {
971 pr_info("viper: hardware v%di%d detected. "
972 "CPLD revision %d.\n",
973 VIPER_BOARD_VERSION(version),
974 VIPER_BOARD_ISSUE(version),
975 VIPER_CPLD_REVISION(version));
976 system_rev = (VIPER_BOARD_VERSION(version) << 8) |
977 (VIPER_BOARD_ISSUE(version) << 4) |
978 VIPER_CPLD_REVISION(version);
979 } else {
980 pr_info("viper: No version register.\n");
981 }
982
983 i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
984
985 viper_tpm_init();
986 pxa_set_ac97_info(NULL);
987 }
988
989 static struct map_desc viper_io_desc[] __initdata = {
990 {
991 .virtual = VIPER_CPLD_BASE,
992 .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
993 .length = 0x00300000,
994 .type = MT_DEVICE,
995 },
996 {
997 .virtual = VIPER_PC104IO_BASE,
998 .pfn = __phys_to_pfn(0x30000000),
999 .length = 0x00800000,
1000 .type = MT_DEVICE,
1001 },
1002 };
1003
viper_map_io(void)1004 static void __init viper_map_io(void)
1005 {
1006 pxa25x_map_io();
1007
1008 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
1009
1010 PCFR |= PCFR_OPDE;
1011 }
1012
1013 MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
1014 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
1015 .atag_offset = 0x100,
1016 .map_io = viper_map_io,
1017 .nr_irqs = PXA_NR_IRQS,
1018 .init_irq = viper_init_irq,
1019 .handle_irq = pxa25x_handle_irq,
1020 .init_time = pxa_timer_init,
1021 .init_machine = viper_init,
1022 .restart = pxa_restart,
1023 MACHINE_END
1024