1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * KVM Microsoft Hyper-V emulation
4 *
5 * derived from arch/x86/kvm/x86.c
6 *
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
11 * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com>
12 *
13 * Authors:
14 * Avi Kivity <avi@qumranet.com>
15 * Yaniv Kamay <yaniv@qumranet.com>
16 * Amit Shah <amit.shah@qumranet.com>
17 * Ben-Ami Yassour <benami@il.ibm.com>
18 * Andrey Smetanin <asmetanin@virtuozzo.com>
19 */
20
21 #include "x86.h"
22 #include "lapic.h"
23 #include "ioapic.h"
24 #include "hyperv.h"
25
26 #include <linux/cpu.h>
27 #include <linux/kvm_host.h>
28 #include <linux/highmem.h>
29 #include <linux/sched/cputime.h>
30 #include <linux/eventfd.h>
31
32 #include <asm/apicdef.h>
33 #include <trace/events/kvm.h>
34
35 #include "trace.h"
36
37 #define KVM_HV_MAX_SPARSE_VCPU_SET_BITS DIV_ROUND_UP(KVM_MAX_VCPUS, 64)
38
39 static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer,
40 bool vcpu_kick);
41
synic_read_sint(struct kvm_vcpu_hv_synic * synic,int sint)42 static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint)
43 {
44 return atomic64_read(&synic->sint[sint]);
45 }
46
synic_get_sint_vector(u64 sint_value)47 static inline int synic_get_sint_vector(u64 sint_value)
48 {
49 if (sint_value & HV_SYNIC_SINT_MASKED)
50 return -1;
51 return sint_value & HV_SYNIC_SINT_VECTOR_MASK;
52 }
53
synic_has_vector_connected(struct kvm_vcpu_hv_synic * synic,int vector)54 static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic,
55 int vector)
56 {
57 int i;
58
59 for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
60 if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
61 return true;
62 }
63 return false;
64 }
65
synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic * synic,int vector)66 static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic,
67 int vector)
68 {
69 int i;
70 u64 sint_value;
71
72 for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
73 sint_value = synic_read_sint(synic, i);
74 if (synic_get_sint_vector(sint_value) == vector &&
75 sint_value & HV_SYNIC_SINT_AUTO_EOI)
76 return true;
77 }
78 return false;
79 }
80
synic_update_vector(struct kvm_vcpu_hv_synic * synic,int vector)81 static void synic_update_vector(struct kvm_vcpu_hv_synic *synic,
82 int vector)
83 {
84 if (vector < HV_SYNIC_FIRST_VALID_VECTOR)
85 return;
86
87 if (synic_has_vector_connected(synic, vector))
88 __set_bit(vector, synic->vec_bitmap);
89 else
90 __clear_bit(vector, synic->vec_bitmap);
91
92 if (synic_has_vector_auto_eoi(synic, vector))
93 __set_bit(vector, synic->auto_eoi_bitmap);
94 else
95 __clear_bit(vector, synic->auto_eoi_bitmap);
96 }
97
synic_set_sint(struct kvm_vcpu_hv_synic * synic,int sint,u64 data,bool host)98 static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint,
99 u64 data, bool host)
100 {
101 int vector, old_vector;
102 bool masked;
103
104 vector = data & HV_SYNIC_SINT_VECTOR_MASK;
105 masked = data & HV_SYNIC_SINT_MASKED;
106
107 /*
108 * Valid vectors are 16-255, however, nested Hyper-V attempts to write
109 * default '0x10000' value on boot and this should not #GP. We need to
110 * allow zero-initing the register from host as well.
111 */
112 if (vector < HV_SYNIC_FIRST_VALID_VECTOR && !host && !masked)
113 return 1;
114 /*
115 * Guest may configure multiple SINTs to use the same vector, so
116 * we maintain a bitmap of vectors handled by synic, and a
117 * bitmap of vectors with auto-eoi behavior. The bitmaps are
118 * updated here, and atomically queried on fast paths.
119 */
120 old_vector = synic_read_sint(synic, sint) & HV_SYNIC_SINT_VECTOR_MASK;
121
122 atomic64_set(&synic->sint[sint], data);
123
124 synic_update_vector(synic, old_vector);
125
126 synic_update_vector(synic, vector);
127
128 /* Load SynIC vectors into EOI exit bitmap */
129 kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic));
130 return 0;
131 }
132
get_vcpu_by_vpidx(struct kvm * kvm,u32 vpidx)133 static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx)
134 {
135 struct kvm_vcpu *vcpu = NULL;
136 int i;
137
138 if (vpidx >= KVM_MAX_VCPUS)
139 return NULL;
140
141 vcpu = kvm_get_vcpu(kvm, vpidx);
142 if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
143 return vcpu;
144 kvm_for_each_vcpu(i, vcpu, kvm)
145 if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
146 return vcpu;
147 return NULL;
148 }
149
synic_get(struct kvm * kvm,u32 vpidx)150 static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx)
151 {
152 struct kvm_vcpu *vcpu;
153 struct kvm_vcpu_hv_synic *synic;
154
155 vcpu = get_vcpu_by_vpidx(kvm, vpidx);
156 if (!vcpu)
157 return NULL;
158 synic = vcpu_to_synic(vcpu);
159 return (synic->active) ? synic : NULL;
160 }
161
kvm_hv_notify_acked_sint(struct kvm_vcpu * vcpu,u32 sint)162 static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint)
163 {
164 struct kvm *kvm = vcpu->kvm;
165 struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
166 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
167 struct kvm_vcpu_hv_stimer *stimer;
168 int gsi, idx;
169
170 trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint);
171
172 /* Try to deliver pending Hyper-V SynIC timers messages */
173 for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) {
174 stimer = &hv_vcpu->stimer[idx];
175 if (stimer->msg_pending && stimer->config.enable &&
176 !stimer->config.direct_mode &&
177 stimer->config.sintx == sint)
178 stimer_mark_pending(stimer, false);
179 }
180
181 idx = srcu_read_lock(&kvm->irq_srcu);
182 gsi = atomic_read(&synic->sint_to_gsi[sint]);
183 if (gsi != -1)
184 kvm_notify_acked_gsi(kvm, gsi);
185 srcu_read_unlock(&kvm->irq_srcu, idx);
186 }
187
synic_exit(struct kvm_vcpu_hv_synic * synic,u32 msr)188 static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr)
189 {
190 struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
191 struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
192
193 hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC;
194 hv_vcpu->exit.u.synic.msr = msr;
195 hv_vcpu->exit.u.synic.control = synic->control;
196 hv_vcpu->exit.u.synic.evt_page = synic->evt_page;
197 hv_vcpu->exit.u.synic.msg_page = synic->msg_page;
198
199 kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
200 }
201
synic_set_msr(struct kvm_vcpu_hv_synic * synic,u32 msr,u64 data,bool host)202 static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
203 u32 msr, u64 data, bool host)
204 {
205 struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
206 int ret;
207
208 if (!synic->active && (!host || data))
209 return 1;
210
211 trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host);
212
213 ret = 0;
214 switch (msr) {
215 case HV_X64_MSR_SCONTROL:
216 synic->control = data;
217 if (!host)
218 synic_exit(synic, msr);
219 break;
220 case HV_X64_MSR_SVERSION:
221 if (!host) {
222 ret = 1;
223 break;
224 }
225 synic->version = data;
226 break;
227 case HV_X64_MSR_SIEFP:
228 if ((data & HV_SYNIC_SIEFP_ENABLE) && !host &&
229 !synic->dont_zero_synic_pages)
230 if (kvm_clear_guest(vcpu->kvm,
231 data & PAGE_MASK, PAGE_SIZE)) {
232 ret = 1;
233 break;
234 }
235 synic->evt_page = data;
236 if (!host)
237 synic_exit(synic, msr);
238 break;
239 case HV_X64_MSR_SIMP:
240 if ((data & HV_SYNIC_SIMP_ENABLE) && !host &&
241 !synic->dont_zero_synic_pages)
242 if (kvm_clear_guest(vcpu->kvm,
243 data & PAGE_MASK, PAGE_SIZE)) {
244 ret = 1;
245 break;
246 }
247 synic->msg_page = data;
248 if (!host)
249 synic_exit(synic, msr);
250 break;
251 case HV_X64_MSR_EOM: {
252 int i;
253
254 if (!synic->active)
255 break;
256
257 for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
258 kvm_hv_notify_acked_sint(vcpu, i);
259 break;
260 }
261 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
262 ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host);
263 break;
264 default:
265 ret = 1;
266 break;
267 }
268 return ret;
269 }
270
synic_get_msr(struct kvm_vcpu_hv_synic * synic,u32 msr,u64 * pdata,bool host)271 static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata,
272 bool host)
273 {
274 int ret;
275
276 if (!synic->active && !host)
277 return 1;
278
279 ret = 0;
280 switch (msr) {
281 case HV_X64_MSR_SCONTROL:
282 *pdata = synic->control;
283 break;
284 case HV_X64_MSR_SVERSION:
285 *pdata = synic->version;
286 break;
287 case HV_X64_MSR_SIEFP:
288 *pdata = synic->evt_page;
289 break;
290 case HV_X64_MSR_SIMP:
291 *pdata = synic->msg_page;
292 break;
293 case HV_X64_MSR_EOM:
294 *pdata = 0;
295 break;
296 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
297 *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]);
298 break;
299 default:
300 ret = 1;
301 break;
302 }
303 return ret;
304 }
305
synic_set_irq(struct kvm_vcpu_hv_synic * synic,u32 sint)306 static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
307 {
308 struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
309 struct kvm_lapic_irq irq;
310 int ret, vector;
311
312 if (KVM_BUG_ON(!lapic_in_kernel(vcpu), vcpu->kvm))
313 return -EINVAL;
314
315 if (sint >= ARRAY_SIZE(synic->sint))
316 return -EINVAL;
317
318 vector = synic_get_sint_vector(synic_read_sint(synic, sint));
319 if (vector < 0)
320 return -ENOENT;
321
322 memset(&irq, 0, sizeof(irq));
323 irq.shorthand = APIC_DEST_SELF;
324 irq.dest_mode = APIC_DEST_PHYSICAL;
325 irq.delivery_mode = APIC_DM_FIXED;
326 irq.vector = vector;
327 irq.level = 1;
328
329 ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL);
330 trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret);
331 return ret;
332 }
333
kvm_hv_synic_set_irq(struct kvm * kvm,u32 vpidx,u32 sint)334 int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint)
335 {
336 struct kvm_vcpu_hv_synic *synic;
337
338 synic = synic_get(kvm, vpidx);
339 if (!synic)
340 return -EINVAL;
341
342 return synic_set_irq(synic, sint);
343 }
344
kvm_hv_synic_send_eoi(struct kvm_vcpu * vcpu,int vector)345 void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
346 {
347 struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
348 int i;
349
350 trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector);
351
352 for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
353 if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
354 kvm_hv_notify_acked_sint(vcpu, i);
355 }
356
kvm_hv_set_sint_gsi(struct kvm * kvm,u32 vpidx,u32 sint,int gsi)357 static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi)
358 {
359 struct kvm_vcpu_hv_synic *synic;
360
361 synic = synic_get(kvm, vpidx);
362 if (!synic)
363 return -EINVAL;
364
365 if (sint >= ARRAY_SIZE(synic->sint_to_gsi))
366 return -EINVAL;
367
368 atomic_set(&synic->sint_to_gsi[sint], gsi);
369 return 0;
370 }
371
kvm_hv_irq_routing_update(struct kvm * kvm)372 void kvm_hv_irq_routing_update(struct kvm *kvm)
373 {
374 struct kvm_irq_routing_table *irq_rt;
375 struct kvm_kernel_irq_routing_entry *e;
376 u32 gsi;
377
378 irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu,
379 lockdep_is_held(&kvm->irq_lock));
380
381 for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) {
382 hlist_for_each_entry(e, &irq_rt->map[gsi], link) {
383 if (e->type == KVM_IRQ_ROUTING_HV_SINT)
384 kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu,
385 e->hv_sint.sint, gsi);
386 }
387 }
388 }
389
synic_init(struct kvm_vcpu_hv_synic * synic)390 static void synic_init(struct kvm_vcpu_hv_synic *synic)
391 {
392 int i;
393
394 memset(synic, 0, sizeof(*synic));
395 synic->version = HV_SYNIC_VERSION_1;
396 for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
397 atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED);
398 atomic_set(&synic->sint_to_gsi[i], -1);
399 }
400 }
401
get_time_ref_counter(struct kvm * kvm)402 static u64 get_time_ref_counter(struct kvm *kvm)
403 {
404 struct kvm_hv *hv = &kvm->arch.hyperv;
405 struct kvm_vcpu *vcpu;
406 u64 tsc;
407
408 /*
409 * The guest has not set up the TSC page or the clock isn't
410 * stable, fall back to get_kvmclock_ns.
411 */
412 if (!hv->tsc_ref.tsc_sequence)
413 return div_u64(get_kvmclock_ns(kvm), 100);
414
415 vcpu = kvm_get_vcpu(kvm, 0);
416 tsc = kvm_read_l1_tsc(vcpu, rdtsc());
417 return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64)
418 + hv->tsc_ref.tsc_offset;
419 }
420
stimer_mark_pending(struct kvm_vcpu_hv_stimer * stimer,bool vcpu_kick)421 static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer,
422 bool vcpu_kick)
423 {
424 struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
425
426 set_bit(stimer->index,
427 vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
428 kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
429 if (vcpu_kick)
430 kvm_vcpu_kick(vcpu);
431 }
432
stimer_cleanup(struct kvm_vcpu_hv_stimer * stimer)433 static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer)
434 {
435 struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
436
437 trace_kvm_hv_stimer_cleanup(stimer_to_vcpu(stimer)->vcpu_id,
438 stimer->index);
439
440 hrtimer_cancel(&stimer->timer);
441 clear_bit(stimer->index,
442 vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
443 stimer->msg_pending = false;
444 stimer->exp_time = 0;
445 }
446
stimer_timer_callback(struct hrtimer * timer)447 static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer)
448 {
449 struct kvm_vcpu_hv_stimer *stimer;
450
451 stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer);
452 trace_kvm_hv_stimer_callback(stimer_to_vcpu(stimer)->vcpu_id,
453 stimer->index);
454 stimer_mark_pending(stimer, true);
455
456 return HRTIMER_NORESTART;
457 }
458
459 /*
460 * stimer_start() assumptions:
461 * a) stimer->count is not equal to 0
462 * b) stimer->config has HV_STIMER_ENABLE flag
463 */
stimer_start(struct kvm_vcpu_hv_stimer * stimer)464 static int stimer_start(struct kvm_vcpu_hv_stimer *stimer)
465 {
466 u64 time_now;
467 ktime_t ktime_now;
468
469 time_now = get_time_ref_counter(stimer_to_vcpu(stimer)->kvm);
470 ktime_now = ktime_get();
471
472 if (stimer->config.periodic) {
473 if (stimer->exp_time) {
474 if (time_now >= stimer->exp_time) {
475 u64 remainder;
476
477 div64_u64_rem(time_now - stimer->exp_time,
478 stimer->count, &remainder);
479 stimer->exp_time =
480 time_now + (stimer->count - remainder);
481 }
482 } else
483 stimer->exp_time = time_now + stimer->count;
484
485 trace_kvm_hv_stimer_start_periodic(
486 stimer_to_vcpu(stimer)->vcpu_id,
487 stimer->index,
488 time_now, stimer->exp_time);
489
490 hrtimer_start(&stimer->timer,
491 ktime_add_ns(ktime_now,
492 100 * (stimer->exp_time - time_now)),
493 HRTIMER_MODE_ABS);
494 return 0;
495 }
496 stimer->exp_time = stimer->count;
497 if (time_now >= stimer->count) {
498 /*
499 * Expire timer according to Hypervisor Top-Level Functional
500 * specification v4(15.3.1):
501 * "If a one shot is enabled and the specified count is in
502 * the past, it will expire immediately."
503 */
504 stimer_mark_pending(stimer, false);
505 return 0;
506 }
507
508 trace_kvm_hv_stimer_start_one_shot(stimer_to_vcpu(stimer)->vcpu_id,
509 stimer->index,
510 time_now, stimer->count);
511
512 hrtimer_start(&stimer->timer,
513 ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)),
514 HRTIMER_MODE_ABS);
515 return 0;
516 }
517
stimer_set_config(struct kvm_vcpu_hv_stimer * stimer,u64 config,bool host)518 static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config,
519 bool host)
520 {
521 union hv_stimer_config new_config = {.as_uint64 = config},
522 old_config = {.as_uint64 = stimer->config.as_uint64};
523 struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
524 struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
525
526 if (!synic->active && (!host || config))
527 return 1;
528
529 trace_kvm_hv_stimer_set_config(stimer_to_vcpu(stimer)->vcpu_id,
530 stimer->index, config, host);
531
532 stimer_cleanup(stimer);
533 if (old_config.enable &&
534 !new_config.direct_mode && new_config.sintx == 0)
535 new_config.enable = 0;
536 stimer->config.as_uint64 = new_config.as_uint64;
537
538 if (stimer->config.enable)
539 stimer_mark_pending(stimer, false);
540
541 return 0;
542 }
543
stimer_set_count(struct kvm_vcpu_hv_stimer * stimer,u64 count,bool host)544 static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count,
545 bool host)
546 {
547 struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
548 struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
549
550 if (!synic->active && (!host || count))
551 return 1;
552
553 trace_kvm_hv_stimer_set_count(stimer_to_vcpu(stimer)->vcpu_id,
554 stimer->index, count, host);
555
556 stimer_cleanup(stimer);
557 stimer->count = count;
558 if (!host) {
559 if (stimer->count == 0)
560 stimer->config.enable = 0;
561 else if (stimer->config.auto_enable)
562 stimer->config.enable = 1;
563 }
564
565 if (stimer->config.enable)
566 stimer_mark_pending(stimer, false);
567
568 return 0;
569 }
570
stimer_get_config(struct kvm_vcpu_hv_stimer * stimer,u64 * pconfig)571 static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig)
572 {
573 *pconfig = stimer->config.as_uint64;
574 return 0;
575 }
576
stimer_get_count(struct kvm_vcpu_hv_stimer * stimer,u64 * pcount)577 static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount)
578 {
579 *pcount = stimer->count;
580 return 0;
581 }
582
synic_deliver_msg(struct kvm_vcpu_hv_synic * synic,u32 sint,struct hv_message * src_msg,bool no_retry)583 static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint,
584 struct hv_message *src_msg, bool no_retry)
585 {
586 struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
587 int msg_off = offsetof(struct hv_message_page, sint_message[sint]);
588 gfn_t msg_page_gfn;
589 struct hv_message_header hv_hdr;
590 int r;
591
592 if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE))
593 return -ENOENT;
594
595 msg_page_gfn = synic->msg_page >> PAGE_SHIFT;
596
597 /*
598 * Strictly following the spec-mandated ordering would assume setting
599 * .msg_pending before checking .message_type. However, this function
600 * is only called in vcpu context so the entire update is atomic from
601 * guest POV and thus the exact order here doesn't matter.
602 */
603 r = kvm_vcpu_read_guest_page(vcpu, msg_page_gfn, &hv_hdr.message_type,
604 msg_off + offsetof(struct hv_message,
605 header.message_type),
606 sizeof(hv_hdr.message_type));
607 if (r < 0)
608 return r;
609
610 if (hv_hdr.message_type != HVMSG_NONE) {
611 if (no_retry)
612 return 0;
613
614 hv_hdr.message_flags.msg_pending = 1;
615 r = kvm_vcpu_write_guest_page(vcpu, msg_page_gfn,
616 &hv_hdr.message_flags,
617 msg_off +
618 offsetof(struct hv_message,
619 header.message_flags),
620 sizeof(hv_hdr.message_flags));
621 if (r < 0)
622 return r;
623 return -EAGAIN;
624 }
625
626 r = kvm_vcpu_write_guest_page(vcpu, msg_page_gfn, src_msg, msg_off,
627 sizeof(src_msg->header) +
628 src_msg->header.payload_size);
629 if (r < 0)
630 return r;
631
632 r = synic_set_irq(synic, sint);
633 if (r < 0)
634 return r;
635 if (r == 0)
636 return -EFAULT;
637 return 0;
638 }
639
stimer_send_msg(struct kvm_vcpu_hv_stimer * stimer)640 static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer)
641 {
642 struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
643 struct hv_message *msg = &stimer->msg;
644 struct hv_timer_message_payload *payload =
645 (struct hv_timer_message_payload *)&msg->u.payload;
646
647 /*
648 * To avoid piling up periodic ticks, don't retry message
649 * delivery for them (within "lazy" lost ticks policy).
650 */
651 bool no_retry = stimer->config.periodic;
652
653 payload->expiration_time = stimer->exp_time;
654 payload->delivery_time = get_time_ref_counter(vcpu->kvm);
655 return synic_deliver_msg(vcpu_to_synic(vcpu),
656 stimer->config.sintx, msg,
657 no_retry);
658 }
659
stimer_notify_direct(struct kvm_vcpu_hv_stimer * stimer)660 static int stimer_notify_direct(struct kvm_vcpu_hv_stimer *stimer)
661 {
662 struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
663 struct kvm_lapic_irq irq = {
664 .delivery_mode = APIC_DM_FIXED,
665 .vector = stimer->config.apic_vector
666 };
667
668 if (lapic_in_kernel(vcpu))
669 return !kvm_apic_set_irq(vcpu, &irq, NULL);
670 return 0;
671 }
672
stimer_expiration(struct kvm_vcpu_hv_stimer * stimer)673 static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer)
674 {
675 int r, direct = stimer->config.direct_mode;
676
677 stimer->msg_pending = true;
678 if (!direct)
679 r = stimer_send_msg(stimer);
680 else
681 r = stimer_notify_direct(stimer);
682 trace_kvm_hv_stimer_expiration(stimer_to_vcpu(stimer)->vcpu_id,
683 stimer->index, direct, r);
684 if (!r) {
685 stimer->msg_pending = false;
686 if (!(stimer->config.periodic))
687 stimer->config.enable = 0;
688 }
689 }
690
kvm_hv_process_stimers(struct kvm_vcpu * vcpu)691 void kvm_hv_process_stimers(struct kvm_vcpu *vcpu)
692 {
693 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
694 struct kvm_vcpu_hv_stimer *stimer;
695 u64 time_now, exp_time;
696 int i;
697
698 for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
699 if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) {
700 stimer = &hv_vcpu->stimer[i];
701 if (stimer->config.enable) {
702 exp_time = stimer->exp_time;
703
704 if (exp_time) {
705 time_now =
706 get_time_ref_counter(vcpu->kvm);
707 if (time_now >= exp_time)
708 stimer_expiration(stimer);
709 }
710
711 if ((stimer->config.enable) &&
712 stimer->count) {
713 if (!stimer->msg_pending)
714 stimer_start(stimer);
715 } else
716 stimer_cleanup(stimer);
717 }
718 }
719 }
720
kvm_hv_vcpu_uninit(struct kvm_vcpu * vcpu)721 void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu)
722 {
723 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
724 int i;
725
726 for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
727 stimer_cleanup(&hv_vcpu->stimer[i]);
728 }
729
kvm_hv_assist_page_enabled(struct kvm_vcpu * vcpu)730 bool kvm_hv_assist_page_enabled(struct kvm_vcpu *vcpu)
731 {
732 if (!(vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE))
733 return false;
734 return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED;
735 }
736 EXPORT_SYMBOL_GPL(kvm_hv_assist_page_enabled);
737
kvm_hv_get_assist_page(struct kvm_vcpu * vcpu,struct hv_vp_assist_page * assist_page)738 bool kvm_hv_get_assist_page(struct kvm_vcpu *vcpu,
739 struct hv_vp_assist_page *assist_page)
740 {
741 if (!kvm_hv_assist_page_enabled(vcpu))
742 return false;
743 return !kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data,
744 assist_page, sizeof(*assist_page));
745 }
746 EXPORT_SYMBOL_GPL(kvm_hv_get_assist_page);
747
stimer_prepare_msg(struct kvm_vcpu_hv_stimer * stimer)748 static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer)
749 {
750 struct hv_message *msg = &stimer->msg;
751 struct hv_timer_message_payload *payload =
752 (struct hv_timer_message_payload *)&msg->u.payload;
753
754 memset(&msg->header, 0, sizeof(msg->header));
755 msg->header.message_type = HVMSG_TIMER_EXPIRED;
756 msg->header.payload_size = sizeof(*payload);
757
758 payload->timer_index = stimer->index;
759 payload->expiration_time = 0;
760 payload->delivery_time = 0;
761 }
762
stimer_init(struct kvm_vcpu_hv_stimer * stimer,int timer_index)763 static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index)
764 {
765 memset(stimer, 0, sizeof(*stimer));
766 stimer->index = timer_index;
767 hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
768 stimer->timer.function = stimer_timer_callback;
769 stimer_prepare_msg(stimer);
770 }
771
kvm_hv_vcpu_init(struct kvm_vcpu * vcpu)772 void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
773 {
774 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
775 int i;
776
777 synic_init(&hv_vcpu->synic);
778
779 bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
780 for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
781 stimer_init(&hv_vcpu->stimer[i], i);
782 }
783
kvm_hv_vcpu_postcreate(struct kvm_vcpu * vcpu)784 void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu)
785 {
786 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
787
788 hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu);
789 }
790
kvm_hv_activate_synic(struct kvm_vcpu * vcpu,bool dont_zero_synic_pages)791 int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages)
792 {
793 struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
794
795 /*
796 * Hyper-V SynIC auto EOI SINT's are
797 * not compatible with APICV, so deactivate APICV
798 */
799 kvm_vcpu_deactivate_apicv(vcpu);
800 synic->active = true;
801 synic->dont_zero_synic_pages = dont_zero_synic_pages;
802 return 0;
803 }
804
kvm_hv_msr_partition_wide(u32 msr)805 static bool kvm_hv_msr_partition_wide(u32 msr)
806 {
807 bool r = false;
808
809 switch (msr) {
810 case HV_X64_MSR_GUEST_OS_ID:
811 case HV_X64_MSR_HYPERCALL:
812 case HV_X64_MSR_REFERENCE_TSC:
813 case HV_X64_MSR_TIME_REF_COUNT:
814 case HV_X64_MSR_CRASH_CTL:
815 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
816 case HV_X64_MSR_RESET:
817 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
818 case HV_X64_MSR_TSC_EMULATION_CONTROL:
819 case HV_X64_MSR_TSC_EMULATION_STATUS:
820 r = true;
821 break;
822 }
823
824 return r;
825 }
826
kvm_hv_msr_get_crash_data(struct kvm_vcpu * vcpu,u32 index,u64 * pdata)827 static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu,
828 u32 index, u64 *pdata)
829 {
830 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
831 size_t size = ARRAY_SIZE(hv->hv_crash_param);
832
833 if (WARN_ON_ONCE(index >= size))
834 return -EINVAL;
835
836 *pdata = hv->hv_crash_param[array_index_nospec(index, size)];
837 return 0;
838 }
839
kvm_hv_msr_get_crash_ctl(struct kvm_vcpu * vcpu,u64 * pdata)840 static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata)
841 {
842 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
843
844 *pdata = hv->hv_crash_ctl;
845 return 0;
846 }
847
kvm_hv_msr_set_crash_ctl(struct kvm_vcpu * vcpu,u64 data,bool host)848 static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host)
849 {
850 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
851
852 if (host)
853 hv->hv_crash_ctl = data & HV_CRASH_CTL_CRASH_NOTIFY;
854
855 if (!host && (data & HV_CRASH_CTL_CRASH_NOTIFY)) {
856
857 vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n",
858 hv->hv_crash_param[0],
859 hv->hv_crash_param[1],
860 hv->hv_crash_param[2],
861 hv->hv_crash_param[3],
862 hv->hv_crash_param[4]);
863
864 /* Send notification about crash to user space */
865 kvm_make_request(KVM_REQ_HV_CRASH, vcpu);
866 }
867
868 return 0;
869 }
870
kvm_hv_msr_set_crash_data(struct kvm_vcpu * vcpu,u32 index,u64 data)871 static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu,
872 u32 index, u64 data)
873 {
874 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
875 size_t size = ARRAY_SIZE(hv->hv_crash_param);
876
877 if (WARN_ON_ONCE(index >= size))
878 return -EINVAL;
879
880 hv->hv_crash_param[array_index_nospec(index, size)] = data;
881 return 0;
882 }
883
884 /*
885 * The kvmclock and Hyper-V TSC page use similar formulas, and converting
886 * between them is possible:
887 *
888 * kvmclock formula:
889 * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32)
890 * + system_time
891 *
892 * Hyper-V formula:
893 * nsec/100 = ticks * scale / 2^64 + offset
894 *
895 * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula.
896 * By dividing the kvmclock formula by 100 and equating what's left we get:
897 * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
898 * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100
899 * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100
900 *
901 * Now expand the kvmclock formula and divide by 100:
902 * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32)
903 * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32)
904 * + system_time
905 * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
906 * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100
907 * + system_time / 100
908 *
909 * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64:
910 * nsec/100 = ticks * scale / 2^64
911 * - tsc_timestamp * scale / 2^64
912 * + system_time / 100
913 *
914 * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out:
915 * offset = system_time / 100 - tsc_timestamp * scale / 2^64
916 *
917 * These two equivalencies are implemented in this function.
918 */
compute_tsc_page_parameters(struct pvclock_vcpu_time_info * hv_clock,HV_REFERENCE_TSC_PAGE * tsc_ref)919 static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock,
920 HV_REFERENCE_TSC_PAGE *tsc_ref)
921 {
922 u64 max_mul;
923
924 if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT))
925 return false;
926
927 /*
928 * check if scale would overflow, if so we use the time ref counter
929 * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64
930 * tsc_to_system_mul / 100 >= 2^(32-tsc_shift)
931 * tsc_to_system_mul >= 100 * 2^(32-tsc_shift)
932 */
933 max_mul = 100ull << (32 - hv_clock->tsc_shift);
934 if (hv_clock->tsc_to_system_mul >= max_mul)
935 return false;
936
937 /*
938 * Otherwise compute the scale and offset according to the formulas
939 * derived above.
940 */
941 tsc_ref->tsc_scale =
942 mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift),
943 hv_clock->tsc_to_system_mul,
944 100);
945
946 tsc_ref->tsc_offset = hv_clock->system_time;
947 do_div(tsc_ref->tsc_offset, 100);
948 tsc_ref->tsc_offset -=
949 mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64);
950 return true;
951 }
952
kvm_hv_setup_tsc_page(struct kvm * kvm,struct pvclock_vcpu_time_info * hv_clock)953 void kvm_hv_setup_tsc_page(struct kvm *kvm,
954 struct pvclock_vcpu_time_info *hv_clock)
955 {
956 struct kvm_hv *hv = &kvm->arch.hyperv;
957 u32 tsc_seq;
958 u64 gfn;
959
960 BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence));
961 BUILD_BUG_ON(offsetof(HV_REFERENCE_TSC_PAGE, tsc_sequence) != 0);
962
963 if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
964 return;
965
966 mutex_lock(&kvm->arch.hyperv.hv_lock);
967 if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
968 goto out_unlock;
969
970 gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
971 /*
972 * Because the TSC parameters only vary when there is a
973 * change in the master clock, do not bother with caching.
974 */
975 if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn),
976 &tsc_seq, sizeof(tsc_seq))))
977 goto out_unlock;
978
979 /*
980 * While we're computing and writing the parameters, force the
981 * guest to use the time reference count MSR.
982 */
983 hv->tsc_ref.tsc_sequence = 0;
984 if (kvm_write_guest(kvm, gfn_to_gpa(gfn),
985 &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)))
986 goto out_unlock;
987
988 if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref))
989 goto out_unlock;
990
991 /* Ensure sequence is zero before writing the rest of the struct. */
992 smp_wmb();
993 if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref)))
994 goto out_unlock;
995
996 /*
997 * Now switch to the TSC page mechanism by writing the sequence.
998 */
999 tsc_seq++;
1000 if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0)
1001 tsc_seq = 1;
1002
1003 /* Write the struct entirely before the non-zero sequence. */
1004 smp_wmb();
1005
1006 hv->tsc_ref.tsc_sequence = tsc_seq;
1007 kvm_write_guest(kvm, gfn_to_gpa(gfn),
1008 &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence));
1009 out_unlock:
1010 mutex_unlock(&kvm->arch.hyperv.hv_lock);
1011 }
1012
kvm_hv_set_msr_pw(struct kvm_vcpu * vcpu,u32 msr,u64 data,bool host)1013 static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
1014 bool host)
1015 {
1016 struct kvm *kvm = vcpu->kvm;
1017 struct kvm_hv *hv = &kvm->arch.hyperv;
1018
1019 switch (msr) {
1020 case HV_X64_MSR_GUEST_OS_ID:
1021 hv->hv_guest_os_id = data;
1022 /* setting guest os id to zero disables hypercall page */
1023 if (!hv->hv_guest_os_id)
1024 hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1025 break;
1026 case HV_X64_MSR_HYPERCALL: {
1027 u64 gfn;
1028 unsigned long addr;
1029 u8 instructions[4];
1030
1031 /* if guest os id is not set hypercall should remain disabled */
1032 if (!hv->hv_guest_os_id)
1033 break;
1034 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1035 hv->hv_hypercall = data;
1036 break;
1037 }
1038 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1039 addr = gfn_to_hva(kvm, gfn);
1040 if (kvm_is_error_hva(addr))
1041 return 1;
1042 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1043 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1044 if (__copy_to_user((void __user *)addr, instructions, 4))
1045 return 1;
1046 hv->hv_hypercall = data;
1047 mark_page_dirty(kvm, gfn);
1048 break;
1049 }
1050 case HV_X64_MSR_REFERENCE_TSC:
1051 hv->hv_tsc_page = data;
1052 if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)
1053 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1054 break;
1055 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
1056 return kvm_hv_msr_set_crash_data(vcpu,
1057 msr - HV_X64_MSR_CRASH_P0,
1058 data);
1059 case HV_X64_MSR_CRASH_CTL:
1060 return kvm_hv_msr_set_crash_ctl(vcpu, data, host);
1061 case HV_X64_MSR_RESET:
1062 if (data == 1) {
1063 vcpu_debug(vcpu, "hyper-v reset requested\n");
1064 kvm_make_request(KVM_REQ_HV_RESET, vcpu);
1065 }
1066 break;
1067 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
1068 hv->hv_reenlightenment_control = data;
1069 break;
1070 case HV_X64_MSR_TSC_EMULATION_CONTROL:
1071 hv->hv_tsc_emulation_control = data;
1072 break;
1073 case HV_X64_MSR_TSC_EMULATION_STATUS:
1074 hv->hv_tsc_emulation_status = data;
1075 break;
1076 case HV_X64_MSR_TIME_REF_COUNT:
1077 /* read-only, but still ignore it if host-initiated */
1078 if (!host)
1079 return 1;
1080 break;
1081 default:
1082 vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
1083 msr, data);
1084 return 1;
1085 }
1086 return 0;
1087 }
1088
1089 /* Calculate cpu time spent by current task in 100ns units */
current_task_runtime_100ns(void)1090 static u64 current_task_runtime_100ns(void)
1091 {
1092 u64 utime, stime;
1093
1094 task_cputime_adjusted(current, &utime, &stime);
1095
1096 return div_u64(utime + stime, 100);
1097 }
1098
kvm_hv_set_msr(struct kvm_vcpu * vcpu,u32 msr,u64 data,bool host)1099 static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
1100 {
1101 struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
1102
1103 switch (msr) {
1104 case HV_X64_MSR_VP_INDEX: {
1105 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
1106 int vcpu_idx = kvm_vcpu_get_idx(vcpu);
1107 u32 new_vp_index = (u32)data;
1108
1109 if (!host || new_vp_index >= KVM_MAX_VCPUS)
1110 return 1;
1111
1112 if (new_vp_index == hv_vcpu->vp_index)
1113 return 0;
1114
1115 /*
1116 * The VP index is initialized to vcpu_index by
1117 * kvm_hv_vcpu_postcreate so they initially match. Now the
1118 * VP index is changing, adjust num_mismatched_vp_indexes if
1119 * it now matches or no longer matches vcpu_idx.
1120 */
1121 if (hv_vcpu->vp_index == vcpu_idx)
1122 atomic_inc(&hv->num_mismatched_vp_indexes);
1123 else if (new_vp_index == vcpu_idx)
1124 atomic_dec(&hv->num_mismatched_vp_indexes);
1125
1126 hv_vcpu->vp_index = new_vp_index;
1127 break;
1128 }
1129 case HV_X64_MSR_VP_ASSIST_PAGE: {
1130 u64 gfn;
1131 unsigned long addr;
1132
1133 if (!(data & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE)) {
1134 hv_vcpu->hv_vapic = data;
1135 if (kvm_lapic_enable_pv_eoi(vcpu, 0, 0))
1136 return 1;
1137 break;
1138 }
1139 gfn = data >> HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT;
1140 addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
1141 if (kvm_is_error_hva(addr))
1142 return 1;
1143
1144 /*
1145 * Clear apic_assist portion of f(struct hv_vp_assist_page
1146 * only, there can be valuable data in the rest which needs
1147 * to be preserved e.g. on migration.
1148 */
1149 if (__clear_user((void __user *)addr, sizeof(u32)))
1150 return 1;
1151 hv_vcpu->hv_vapic = data;
1152 kvm_vcpu_mark_page_dirty(vcpu, gfn);
1153 if (kvm_lapic_enable_pv_eoi(vcpu,
1154 gfn_to_gpa(gfn) | KVM_MSR_ENABLED,
1155 sizeof(struct hv_vp_assist_page)))
1156 return 1;
1157 break;
1158 }
1159 case HV_X64_MSR_EOI:
1160 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1161 case HV_X64_MSR_ICR:
1162 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1163 case HV_X64_MSR_TPR:
1164 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1165 case HV_X64_MSR_VP_RUNTIME:
1166 if (!host)
1167 return 1;
1168 hv_vcpu->runtime_offset = data - current_task_runtime_100ns();
1169 break;
1170 case HV_X64_MSR_SCONTROL:
1171 case HV_X64_MSR_SVERSION:
1172 case HV_X64_MSR_SIEFP:
1173 case HV_X64_MSR_SIMP:
1174 case HV_X64_MSR_EOM:
1175 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
1176 return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host);
1177 case HV_X64_MSR_STIMER0_CONFIG:
1178 case HV_X64_MSR_STIMER1_CONFIG:
1179 case HV_X64_MSR_STIMER2_CONFIG:
1180 case HV_X64_MSR_STIMER3_CONFIG: {
1181 int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
1182
1183 return stimer_set_config(vcpu_to_stimer(vcpu, timer_index),
1184 data, host);
1185 }
1186 case HV_X64_MSR_STIMER0_COUNT:
1187 case HV_X64_MSR_STIMER1_COUNT:
1188 case HV_X64_MSR_STIMER2_COUNT:
1189 case HV_X64_MSR_STIMER3_COUNT: {
1190 int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
1191
1192 return stimer_set_count(vcpu_to_stimer(vcpu, timer_index),
1193 data, host);
1194 }
1195 case HV_X64_MSR_TSC_FREQUENCY:
1196 case HV_X64_MSR_APIC_FREQUENCY:
1197 /* read-only, but still ignore it if host-initiated */
1198 if (!host)
1199 return 1;
1200 break;
1201 default:
1202 vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
1203 msr, data);
1204 return 1;
1205 }
1206
1207 return 0;
1208 }
1209
kvm_hv_get_msr_pw(struct kvm_vcpu * vcpu,u32 msr,u64 * pdata)1210 static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1211 {
1212 u64 data = 0;
1213 struct kvm *kvm = vcpu->kvm;
1214 struct kvm_hv *hv = &kvm->arch.hyperv;
1215
1216 switch (msr) {
1217 case HV_X64_MSR_GUEST_OS_ID:
1218 data = hv->hv_guest_os_id;
1219 break;
1220 case HV_X64_MSR_HYPERCALL:
1221 data = hv->hv_hypercall;
1222 break;
1223 case HV_X64_MSR_TIME_REF_COUNT:
1224 data = get_time_ref_counter(kvm);
1225 break;
1226 case HV_X64_MSR_REFERENCE_TSC:
1227 data = hv->hv_tsc_page;
1228 break;
1229 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
1230 return kvm_hv_msr_get_crash_data(vcpu,
1231 msr - HV_X64_MSR_CRASH_P0,
1232 pdata);
1233 case HV_X64_MSR_CRASH_CTL:
1234 return kvm_hv_msr_get_crash_ctl(vcpu, pdata);
1235 case HV_X64_MSR_RESET:
1236 data = 0;
1237 break;
1238 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
1239 data = hv->hv_reenlightenment_control;
1240 break;
1241 case HV_X64_MSR_TSC_EMULATION_CONTROL:
1242 data = hv->hv_tsc_emulation_control;
1243 break;
1244 case HV_X64_MSR_TSC_EMULATION_STATUS:
1245 data = hv->hv_tsc_emulation_status;
1246 break;
1247 default:
1248 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1249 return 1;
1250 }
1251
1252 *pdata = data;
1253 return 0;
1254 }
1255
kvm_hv_get_msr(struct kvm_vcpu * vcpu,u32 msr,u64 * pdata,bool host)1256 static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,
1257 bool host)
1258 {
1259 u64 data = 0;
1260 struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
1261
1262 switch (msr) {
1263 case HV_X64_MSR_VP_INDEX:
1264 data = hv_vcpu->vp_index;
1265 break;
1266 case HV_X64_MSR_EOI:
1267 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1268 case HV_X64_MSR_ICR:
1269 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1270 case HV_X64_MSR_TPR:
1271 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1272 case HV_X64_MSR_VP_ASSIST_PAGE:
1273 data = hv_vcpu->hv_vapic;
1274 break;
1275 case HV_X64_MSR_VP_RUNTIME:
1276 data = current_task_runtime_100ns() + hv_vcpu->runtime_offset;
1277 break;
1278 case HV_X64_MSR_SCONTROL:
1279 case HV_X64_MSR_SVERSION:
1280 case HV_X64_MSR_SIEFP:
1281 case HV_X64_MSR_SIMP:
1282 case HV_X64_MSR_EOM:
1283 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
1284 return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata, host);
1285 case HV_X64_MSR_STIMER0_CONFIG:
1286 case HV_X64_MSR_STIMER1_CONFIG:
1287 case HV_X64_MSR_STIMER2_CONFIG:
1288 case HV_X64_MSR_STIMER3_CONFIG: {
1289 int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
1290
1291 return stimer_get_config(vcpu_to_stimer(vcpu, timer_index),
1292 pdata);
1293 }
1294 case HV_X64_MSR_STIMER0_COUNT:
1295 case HV_X64_MSR_STIMER1_COUNT:
1296 case HV_X64_MSR_STIMER2_COUNT:
1297 case HV_X64_MSR_STIMER3_COUNT: {
1298 int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
1299
1300 return stimer_get_count(vcpu_to_stimer(vcpu, timer_index),
1301 pdata);
1302 }
1303 case HV_X64_MSR_TSC_FREQUENCY:
1304 data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
1305 break;
1306 case HV_X64_MSR_APIC_FREQUENCY:
1307 data = APIC_BUS_FREQUENCY;
1308 break;
1309 default:
1310 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1311 return 1;
1312 }
1313 *pdata = data;
1314 return 0;
1315 }
1316
kvm_hv_set_msr_common(struct kvm_vcpu * vcpu,u32 msr,u64 data,bool host)1317 int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
1318 {
1319 if (kvm_hv_msr_partition_wide(msr)) {
1320 int r;
1321
1322 mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
1323 r = kvm_hv_set_msr_pw(vcpu, msr, data, host);
1324 mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
1325 return r;
1326 } else
1327 return kvm_hv_set_msr(vcpu, msr, data, host);
1328 }
1329
kvm_hv_get_msr_common(struct kvm_vcpu * vcpu,u32 msr,u64 * pdata,bool host)1330 int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
1331 {
1332 if (kvm_hv_msr_partition_wide(msr)) {
1333 int r;
1334
1335 mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
1336 r = kvm_hv_get_msr_pw(vcpu, msr, pdata);
1337 mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
1338 return r;
1339 } else
1340 return kvm_hv_get_msr(vcpu, msr, pdata, host);
1341 }
1342
sparse_set_to_vcpu_mask(struct kvm * kvm,u64 * sparse_banks,u64 valid_bank_mask,u64 * vp_bitmap,unsigned long * vcpu_bitmap)1343 static __always_inline unsigned long *sparse_set_to_vcpu_mask(
1344 struct kvm *kvm, u64 *sparse_banks, u64 valid_bank_mask,
1345 u64 *vp_bitmap, unsigned long *vcpu_bitmap)
1346 {
1347 struct kvm_hv *hv = &kvm->arch.hyperv;
1348 struct kvm_vcpu *vcpu;
1349 int i, bank, sbank = 0;
1350
1351 memset(vp_bitmap, 0,
1352 KVM_HV_MAX_SPARSE_VCPU_SET_BITS * sizeof(*vp_bitmap));
1353 for_each_set_bit(bank, (unsigned long *)&valid_bank_mask,
1354 KVM_HV_MAX_SPARSE_VCPU_SET_BITS)
1355 vp_bitmap[bank] = sparse_banks[sbank++];
1356
1357 if (likely(!atomic_read(&hv->num_mismatched_vp_indexes))) {
1358 /* for all vcpus vp_index == vcpu_idx */
1359 return (unsigned long *)vp_bitmap;
1360 }
1361
1362 bitmap_zero(vcpu_bitmap, KVM_MAX_VCPUS);
1363 kvm_for_each_vcpu(i, vcpu, kvm) {
1364 if (test_bit(vcpu_to_hv_vcpu(vcpu)->vp_index,
1365 (unsigned long *)vp_bitmap))
1366 __set_bit(i, vcpu_bitmap);
1367 }
1368 return vcpu_bitmap;
1369 }
1370
kvm_hv_flush_tlb(struct kvm_vcpu * current_vcpu,u64 ingpa,u16 rep_cnt,bool ex)1371 static u64 kvm_hv_flush_tlb(struct kvm_vcpu *current_vcpu, u64 ingpa,
1372 u16 rep_cnt, bool ex)
1373 {
1374 struct kvm *kvm = current_vcpu->kvm;
1375 struct kvm_vcpu_hv *hv_vcpu = ¤t_vcpu->arch.hyperv;
1376 struct hv_tlb_flush_ex flush_ex;
1377 struct hv_tlb_flush flush;
1378 u64 vp_bitmap[KVM_HV_MAX_SPARSE_VCPU_SET_BITS];
1379 DECLARE_BITMAP(vcpu_bitmap, KVM_MAX_VCPUS);
1380 unsigned long *vcpu_mask;
1381 u64 valid_bank_mask;
1382 u64 sparse_banks[64];
1383 int sparse_banks_len;
1384 bool all_cpus;
1385
1386 if (!ex) {
1387 if (unlikely(kvm_read_guest(kvm, ingpa, &flush, sizeof(flush))))
1388 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1389
1390 trace_kvm_hv_flush_tlb(flush.processor_mask,
1391 flush.address_space, flush.flags);
1392
1393 valid_bank_mask = BIT_ULL(0);
1394 sparse_banks[0] = flush.processor_mask;
1395
1396 /*
1397 * Work around possible WS2012 bug: it sends hypercalls
1398 * with processor_mask = 0x0 and HV_FLUSH_ALL_PROCESSORS clear,
1399 * while also expecting us to flush something and crashing if
1400 * we don't. Let's treat processor_mask == 0 same as
1401 * HV_FLUSH_ALL_PROCESSORS.
1402 */
1403 all_cpus = (flush.flags & HV_FLUSH_ALL_PROCESSORS) ||
1404 flush.processor_mask == 0;
1405 } else {
1406 if (unlikely(kvm_read_guest(kvm, ingpa, &flush_ex,
1407 sizeof(flush_ex))))
1408 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1409
1410 trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask,
1411 flush_ex.hv_vp_set.format,
1412 flush_ex.address_space,
1413 flush_ex.flags);
1414
1415 valid_bank_mask = flush_ex.hv_vp_set.valid_bank_mask;
1416 all_cpus = flush_ex.hv_vp_set.format !=
1417 HV_GENERIC_SET_SPARSE_4K;
1418
1419 sparse_banks_len =
1420 bitmap_weight((unsigned long *)&valid_bank_mask, 64) *
1421 sizeof(sparse_banks[0]);
1422
1423 if (!sparse_banks_len && !all_cpus)
1424 goto ret_success;
1425
1426 if (!all_cpus &&
1427 kvm_read_guest(kvm,
1428 ingpa + offsetof(struct hv_tlb_flush_ex,
1429 hv_vp_set.bank_contents),
1430 sparse_banks,
1431 sparse_banks_len))
1432 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1433 }
1434
1435 cpumask_clear(&hv_vcpu->tlb_flush);
1436
1437 vcpu_mask = all_cpus ? NULL :
1438 sparse_set_to_vcpu_mask(kvm, sparse_banks, valid_bank_mask,
1439 vp_bitmap, vcpu_bitmap);
1440
1441 /*
1442 * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we can't
1443 * analyze it here, flush TLB regardless of the specified address space.
1444 */
1445 kvm_make_vcpus_request_mask(kvm,
1446 KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP,
1447 vcpu_mask, &hv_vcpu->tlb_flush);
1448
1449 ret_success:
1450 /* We always do full TLB flush, set rep_done = rep_cnt. */
1451 return (u64)HV_STATUS_SUCCESS |
1452 ((u64)rep_cnt << HV_HYPERCALL_REP_COMP_OFFSET);
1453 }
1454
kvm_send_ipi_to_many(struct kvm * kvm,u32 vector,unsigned long * vcpu_bitmap)1455 static void kvm_send_ipi_to_many(struct kvm *kvm, u32 vector,
1456 unsigned long *vcpu_bitmap)
1457 {
1458 struct kvm_lapic_irq irq = {
1459 .delivery_mode = APIC_DM_FIXED,
1460 .vector = vector
1461 };
1462 struct kvm_vcpu *vcpu;
1463 int i;
1464
1465 kvm_for_each_vcpu(i, vcpu, kvm) {
1466 if (vcpu_bitmap && !test_bit(i, vcpu_bitmap))
1467 continue;
1468
1469 /* We fail only when APIC is disabled */
1470 kvm_apic_set_irq(vcpu, &irq, NULL);
1471 }
1472 }
1473
kvm_hv_send_ipi(struct kvm_vcpu * current_vcpu,u64 ingpa,u64 outgpa,bool ex,bool fast)1474 static u64 kvm_hv_send_ipi(struct kvm_vcpu *current_vcpu, u64 ingpa, u64 outgpa,
1475 bool ex, bool fast)
1476 {
1477 struct kvm *kvm = current_vcpu->kvm;
1478 struct hv_send_ipi_ex send_ipi_ex;
1479 struct hv_send_ipi send_ipi;
1480 u64 vp_bitmap[KVM_HV_MAX_SPARSE_VCPU_SET_BITS];
1481 DECLARE_BITMAP(vcpu_bitmap, KVM_MAX_VCPUS);
1482 unsigned long *vcpu_mask;
1483 unsigned long valid_bank_mask;
1484 u64 sparse_banks[64];
1485 int sparse_banks_len;
1486 u32 vector;
1487 bool all_cpus;
1488
1489 if (!ex) {
1490 if (!fast) {
1491 if (unlikely(kvm_read_guest(kvm, ingpa, &send_ipi,
1492 sizeof(send_ipi))))
1493 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1494 sparse_banks[0] = send_ipi.cpu_mask;
1495 vector = send_ipi.vector;
1496 } else {
1497 /* 'reserved' part of hv_send_ipi should be 0 */
1498 if (unlikely(ingpa >> 32 != 0))
1499 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1500 sparse_banks[0] = outgpa;
1501 vector = (u32)ingpa;
1502 }
1503 all_cpus = false;
1504 valid_bank_mask = BIT_ULL(0);
1505
1506 trace_kvm_hv_send_ipi(vector, sparse_banks[0]);
1507 } else {
1508 if (unlikely(kvm_read_guest(kvm, ingpa, &send_ipi_ex,
1509 sizeof(send_ipi_ex))))
1510 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1511
1512 trace_kvm_hv_send_ipi_ex(send_ipi_ex.vector,
1513 send_ipi_ex.vp_set.format,
1514 send_ipi_ex.vp_set.valid_bank_mask);
1515
1516 vector = send_ipi_ex.vector;
1517 valid_bank_mask = send_ipi_ex.vp_set.valid_bank_mask;
1518 sparse_banks_len = bitmap_weight(&valid_bank_mask, 64) *
1519 sizeof(sparse_banks[0]);
1520
1521 all_cpus = send_ipi_ex.vp_set.format == HV_GENERIC_SET_ALL;
1522
1523 if (all_cpus)
1524 goto check_and_send_ipi;
1525
1526 if (!sparse_banks_len)
1527 goto ret_success;
1528
1529 if (kvm_read_guest(kvm,
1530 ingpa + offsetof(struct hv_send_ipi_ex,
1531 vp_set.bank_contents),
1532 sparse_banks,
1533 sparse_banks_len))
1534 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1535 }
1536
1537 check_and_send_ipi:
1538 if ((vector < HV_IPI_LOW_VECTOR) || (vector > HV_IPI_HIGH_VECTOR))
1539 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1540
1541 vcpu_mask = all_cpus ? NULL :
1542 sparse_set_to_vcpu_mask(kvm, sparse_banks, valid_bank_mask,
1543 vp_bitmap, vcpu_bitmap);
1544
1545 kvm_send_ipi_to_many(kvm, vector, vcpu_mask);
1546
1547 ret_success:
1548 return HV_STATUS_SUCCESS;
1549 }
1550
kvm_hv_hypercall_enabled(struct kvm * kvm)1551 bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1552 {
1553 return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE;
1554 }
1555
kvm_hv_hypercall_set_result(struct kvm_vcpu * vcpu,u64 result)1556 static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result)
1557 {
1558 bool longmode;
1559
1560 longmode = is_64_bit_mode(vcpu);
1561 if (longmode)
1562 kvm_rax_write(vcpu, result);
1563 else {
1564 kvm_rdx_write(vcpu, result >> 32);
1565 kvm_rax_write(vcpu, result & 0xffffffff);
1566 }
1567 }
1568
kvm_hv_hypercall_complete(struct kvm_vcpu * vcpu,u64 result)1569 static int kvm_hv_hypercall_complete(struct kvm_vcpu *vcpu, u64 result)
1570 {
1571 kvm_hv_hypercall_set_result(vcpu, result);
1572 ++vcpu->stat.hypercalls;
1573 return kvm_skip_emulated_instruction(vcpu);
1574 }
1575
kvm_hv_hypercall_complete_userspace(struct kvm_vcpu * vcpu)1576 static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu)
1577 {
1578 return kvm_hv_hypercall_complete(vcpu, vcpu->run->hyperv.u.hcall.result);
1579 }
1580
kvm_hvcall_signal_event(struct kvm_vcpu * vcpu,bool fast,u64 param)1581 static u16 kvm_hvcall_signal_event(struct kvm_vcpu *vcpu, bool fast, u64 param)
1582 {
1583 struct eventfd_ctx *eventfd;
1584
1585 if (unlikely(!fast)) {
1586 int ret;
1587 gpa_t gpa = param;
1588
1589 if ((gpa & (__alignof__(param) - 1)) ||
1590 offset_in_page(gpa) + sizeof(param) > PAGE_SIZE)
1591 return HV_STATUS_INVALID_ALIGNMENT;
1592
1593 ret = kvm_vcpu_read_guest(vcpu, gpa, ¶m, sizeof(param));
1594 if (ret < 0)
1595 return HV_STATUS_INVALID_ALIGNMENT;
1596 }
1597
1598 /*
1599 * Per spec, bits 32-47 contain the extra "flag number". However, we
1600 * have no use for it, and in all known usecases it is zero, so just
1601 * report lookup failure if it isn't.
1602 */
1603 if (param & 0xffff00000000ULL)
1604 return HV_STATUS_INVALID_PORT_ID;
1605 /* remaining bits are reserved-zero */
1606 if (param & ~KVM_HYPERV_CONN_ID_MASK)
1607 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1608
1609 /* the eventfd is protected by vcpu->kvm->srcu, but conn_to_evt isn't */
1610 rcu_read_lock();
1611 eventfd = idr_find(&vcpu->kvm->arch.hyperv.conn_to_evt, param);
1612 rcu_read_unlock();
1613 if (!eventfd)
1614 return HV_STATUS_INVALID_PORT_ID;
1615
1616 eventfd_signal(eventfd, 1);
1617 return HV_STATUS_SUCCESS;
1618 }
1619
kvm_hv_hypercall(struct kvm_vcpu * vcpu)1620 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
1621 {
1622 u64 param, ingpa, outgpa, ret = HV_STATUS_SUCCESS;
1623 uint16_t code, rep_idx, rep_cnt;
1624 bool fast, rep;
1625
1626 /*
1627 * hypercall generates UD from non zero cpl and real mode
1628 * per HYPER-V spec
1629 */
1630 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
1631 kvm_queue_exception(vcpu, UD_VECTOR);
1632 return 1;
1633 }
1634
1635 #ifdef CONFIG_X86_64
1636 if (is_64_bit_mode(vcpu)) {
1637 param = kvm_rcx_read(vcpu);
1638 ingpa = kvm_rdx_read(vcpu);
1639 outgpa = kvm_r8_read(vcpu);
1640 } else
1641 #endif
1642 {
1643 param = ((u64)kvm_rdx_read(vcpu) << 32) |
1644 (kvm_rax_read(vcpu) & 0xffffffff);
1645 ingpa = ((u64)kvm_rbx_read(vcpu) << 32) |
1646 (kvm_rcx_read(vcpu) & 0xffffffff);
1647 outgpa = ((u64)kvm_rdi_read(vcpu) << 32) |
1648 (kvm_rsi_read(vcpu) & 0xffffffff);
1649 }
1650
1651 code = param & 0xffff;
1652 fast = !!(param & HV_HYPERCALL_FAST_BIT);
1653 rep_cnt = (param >> HV_HYPERCALL_REP_COMP_OFFSET) & 0xfff;
1654 rep_idx = (param >> HV_HYPERCALL_REP_START_OFFSET) & 0xfff;
1655 rep = !!(rep_cnt || rep_idx);
1656
1657 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
1658
1659 switch (code) {
1660 case HVCALL_NOTIFY_LONG_SPIN_WAIT:
1661 if (unlikely(rep)) {
1662 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1663 break;
1664 }
1665 kvm_vcpu_on_spin(vcpu, true);
1666 break;
1667 case HVCALL_SIGNAL_EVENT:
1668 if (unlikely(rep)) {
1669 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1670 break;
1671 }
1672 ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
1673 if (ret != HV_STATUS_INVALID_PORT_ID)
1674 break;
1675 /* fall through - maybe userspace knows this conn_id. */
1676 case HVCALL_POST_MESSAGE:
1677 /* don't bother userspace if it has no way to handle it */
1678 if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) {
1679 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1680 break;
1681 }
1682 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
1683 vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL;
1684 vcpu->run->hyperv.u.hcall.input = param;
1685 vcpu->run->hyperv.u.hcall.params[0] = ingpa;
1686 vcpu->run->hyperv.u.hcall.params[1] = outgpa;
1687 vcpu->arch.complete_userspace_io =
1688 kvm_hv_hypercall_complete_userspace;
1689 return 0;
1690 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST:
1691 if (unlikely(fast || !rep_cnt || rep_idx)) {
1692 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1693 break;
1694 }
1695 ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
1696 break;
1697 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE:
1698 if (unlikely(fast || rep)) {
1699 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1700 break;
1701 }
1702 ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
1703 break;
1704 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX:
1705 if (unlikely(fast || !rep_cnt || rep_idx)) {
1706 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1707 break;
1708 }
1709 ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
1710 break;
1711 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX:
1712 if (unlikely(fast || rep)) {
1713 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1714 break;
1715 }
1716 ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
1717 break;
1718 case HVCALL_SEND_IPI:
1719 if (unlikely(rep)) {
1720 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1721 break;
1722 }
1723 ret = kvm_hv_send_ipi(vcpu, ingpa, outgpa, false, fast);
1724 break;
1725 case HVCALL_SEND_IPI_EX:
1726 if (unlikely(fast || rep)) {
1727 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1728 break;
1729 }
1730 ret = kvm_hv_send_ipi(vcpu, ingpa, outgpa, true, false);
1731 break;
1732 default:
1733 ret = HV_STATUS_INVALID_HYPERCALL_CODE;
1734 break;
1735 }
1736
1737 return kvm_hv_hypercall_complete(vcpu, ret);
1738 }
1739
kvm_hv_init_vm(struct kvm * kvm)1740 void kvm_hv_init_vm(struct kvm *kvm)
1741 {
1742 mutex_init(&kvm->arch.hyperv.hv_lock);
1743 idr_init(&kvm->arch.hyperv.conn_to_evt);
1744 }
1745
kvm_hv_destroy_vm(struct kvm * kvm)1746 void kvm_hv_destroy_vm(struct kvm *kvm)
1747 {
1748 struct eventfd_ctx *eventfd;
1749 int i;
1750
1751 idr_for_each_entry(&kvm->arch.hyperv.conn_to_evt, eventfd, i)
1752 eventfd_ctx_put(eventfd);
1753 idr_destroy(&kvm->arch.hyperv.conn_to_evt);
1754 }
1755
kvm_hv_eventfd_assign(struct kvm * kvm,u32 conn_id,int fd)1756 static int kvm_hv_eventfd_assign(struct kvm *kvm, u32 conn_id, int fd)
1757 {
1758 struct kvm_hv *hv = &kvm->arch.hyperv;
1759 struct eventfd_ctx *eventfd;
1760 int ret;
1761
1762 eventfd = eventfd_ctx_fdget(fd);
1763 if (IS_ERR(eventfd))
1764 return PTR_ERR(eventfd);
1765
1766 mutex_lock(&hv->hv_lock);
1767 ret = idr_alloc(&hv->conn_to_evt, eventfd, conn_id, conn_id + 1,
1768 GFP_KERNEL_ACCOUNT);
1769 mutex_unlock(&hv->hv_lock);
1770
1771 if (ret >= 0)
1772 return 0;
1773
1774 if (ret == -ENOSPC)
1775 ret = -EEXIST;
1776 eventfd_ctx_put(eventfd);
1777 return ret;
1778 }
1779
kvm_hv_eventfd_deassign(struct kvm * kvm,u32 conn_id)1780 static int kvm_hv_eventfd_deassign(struct kvm *kvm, u32 conn_id)
1781 {
1782 struct kvm_hv *hv = &kvm->arch.hyperv;
1783 struct eventfd_ctx *eventfd;
1784
1785 mutex_lock(&hv->hv_lock);
1786 eventfd = idr_remove(&hv->conn_to_evt, conn_id);
1787 mutex_unlock(&hv->hv_lock);
1788
1789 if (!eventfd)
1790 return -ENOENT;
1791
1792 synchronize_srcu(&kvm->srcu);
1793 eventfd_ctx_put(eventfd);
1794 return 0;
1795 }
1796
kvm_vm_ioctl_hv_eventfd(struct kvm * kvm,struct kvm_hyperv_eventfd * args)1797 int kvm_vm_ioctl_hv_eventfd(struct kvm *kvm, struct kvm_hyperv_eventfd *args)
1798 {
1799 if ((args->flags & ~KVM_HYPERV_EVENTFD_DEASSIGN) ||
1800 (args->conn_id & ~KVM_HYPERV_CONN_ID_MASK))
1801 return -EINVAL;
1802
1803 if (args->flags == KVM_HYPERV_EVENTFD_DEASSIGN)
1804 return kvm_hv_eventfd_deassign(kvm, args->conn_id);
1805 return kvm_hv_eventfd_assign(kvm, args->conn_id, args->fd);
1806 }
1807
kvm_vcpu_ioctl_get_hv_cpuid(struct kvm_vcpu * vcpu,struct kvm_cpuid2 * cpuid,struct kvm_cpuid_entry2 __user * entries)1808 int kvm_vcpu_ioctl_get_hv_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid2 *cpuid,
1809 struct kvm_cpuid_entry2 __user *entries)
1810 {
1811 uint16_t evmcs_ver = 0;
1812 struct kvm_cpuid_entry2 cpuid_entries[] = {
1813 { .function = HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS },
1814 { .function = HYPERV_CPUID_INTERFACE },
1815 { .function = HYPERV_CPUID_VERSION },
1816 { .function = HYPERV_CPUID_FEATURES },
1817 { .function = HYPERV_CPUID_ENLIGHTMENT_INFO },
1818 { .function = HYPERV_CPUID_IMPLEMENT_LIMITS },
1819 { .function = HYPERV_CPUID_NESTED_FEATURES },
1820 };
1821 int i, nent = ARRAY_SIZE(cpuid_entries);
1822
1823 if (kvm_x86_ops->nested_get_evmcs_version)
1824 evmcs_ver = kvm_x86_ops->nested_get_evmcs_version(vcpu);
1825
1826 /* Skip NESTED_FEATURES if eVMCS is not supported */
1827 if (!evmcs_ver)
1828 --nent;
1829
1830 if (cpuid->nent < nent)
1831 return -E2BIG;
1832
1833 if (cpuid->nent > nent)
1834 cpuid->nent = nent;
1835
1836 for (i = 0; i < nent; i++) {
1837 struct kvm_cpuid_entry2 *ent = &cpuid_entries[i];
1838 u32 signature[3];
1839
1840 switch (ent->function) {
1841 case HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS:
1842 memcpy(signature, "Linux KVM Hv", 12);
1843
1844 ent->eax = HYPERV_CPUID_NESTED_FEATURES;
1845 ent->ebx = signature[0];
1846 ent->ecx = signature[1];
1847 ent->edx = signature[2];
1848 break;
1849
1850 case HYPERV_CPUID_INTERFACE:
1851 memcpy(signature, "Hv#1\0\0\0\0\0\0\0\0", 12);
1852 ent->eax = signature[0];
1853 break;
1854
1855 case HYPERV_CPUID_VERSION:
1856 /*
1857 * We implement some Hyper-V 2016 functions so let's use
1858 * this version.
1859 */
1860 ent->eax = 0x00003839;
1861 ent->ebx = 0x000A0000;
1862 break;
1863
1864 case HYPERV_CPUID_FEATURES:
1865 ent->eax |= HV_X64_MSR_VP_RUNTIME_AVAILABLE;
1866 ent->eax |= HV_MSR_TIME_REF_COUNT_AVAILABLE;
1867 ent->eax |= HV_X64_MSR_SYNIC_AVAILABLE;
1868 ent->eax |= HV_MSR_SYNTIMER_AVAILABLE;
1869 ent->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE;
1870 ent->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
1871 ent->eax |= HV_X64_MSR_VP_INDEX_AVAILABLE;
1872 ent->eax |= HV_X64_MSR_RESET_AVAILABLE;
1873 ent->eax |= HV_MSR_REFERENCE_TSC_AVAILABLE;
1874 ent->eax |= HV_X64_ACCESS_FREQUENCY_MSRS;
1875 ent->eax |= HV_X64_ACCESS_REENLIGHTENMENT;
1876
1877 ent->ebx |= HV_X64_POST_MESSAGES;
1878 ent->ebx |= HV_X64_SIGNAL_EVENTS;
1879
1880 ent->edx |= HV_FEATURE_FREQUENCY_MSRS_AVAILABLE;
1881 ent->edx |= HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;
1882
1883 /*
1884 * Direct Synthetic timers only make sense with in-kernel
1885 * LAPIC
1886 */
1887 if (lapic_in_kernel(vcpu))
1888 ent->edx |= HV_STIMER_DIRECT_MODE_AVAILABLE;
1889
1890 break;
1891
1892 case HYPERV_CPUID_ENLIGHTMENT_INFO:
1893 ent->eax |= HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
1894 ent->eax |= HV_X64_APIC_ACCESS_RECOMMENDED;
1895 ent->eax |= HV_X64_RELAXED_TIMING_RECOMMENDED;
1896 ent->eax |= HV_X64_CLUSTER_IPI_RECOMMENDED;
1897 ent->eax |= HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED;
1898 if (evmcs_ver)
1899 ent->eax |= HV_X64_ENLIGHTENED_VMCS_RECOMMENDED;
1900 if (!cpu_smt_possible())
1901 ent->eax |= HV_X64_NO_NONARCH_CORESHARING;
1902 /*
1903 * Default number of spinlock retry attempts, matches
1904 * HyperV 2016.
1905 */
1906 ent->ebx = 0x00000FFF;
1907
1908 break;
1909
1910 case HYPERV_CPUID_IMPLEMENT_LIMITS:
1911 /* Maximum number of virtual processors */
1912 ent->eax = KVM_MAX_VCPUS;
1913 /*
1914 * Maximum number of logical processors, matches
1915 * HyperV 2016.
1916 */
1917 ent->ebx = 64;
1918
1919 break;
1920
1921 case HYPERV_CPUID_NESTED_FEATURES:
1922 ent->eax = evmcs_ver;
1923
1924 break;
1925
1926 default:
1927 break;
1928 }
1929 }
1930
1931 if (copy_to_user(entries, cpuid_entries,
1932 nent * sizeof(struct kvm_cpuid_entry2)))
1933 return -EFAULT;
1934
1935 return 0;
1936 }
1937