1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2001 Dave Engebretsen IBM Corporation
4 */
5
6 #include <linux/sched.h>
7 #include <linux/interrupt.h>
8 #include <linux/irq.h>
9 #include <linux/of.h>
10 #include <linux/fs.h>
11 #include <linux/reboot.h>
12 #include <linux/irq_work.h>
13
14 #include <asm/machdep.h>
15 #include <asm/rtas.h>
16 #include <asm/firmware.h>
17 #include <asm/mce.h>
18
19 #include "pseries.h"
20
21 static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
22 static DEFINE_SPINLOCK(ras_log_buf_lock);
23
24 static int ras_check_exception_token;
25
26 static void mce_process_errlog_event(struct irq_work *work);
27 static struct irq_work mce_errlog_process_work = {
28 .func = mce_process_errlog_event,
29 };
30
31 #define EPOW_SENSOR_TOKEN 9
32 #define EPOW_SENSOR_INDEX 0
33
34 /* EPOW events counter variable */
35 static int num_epow_events;
36
37 static irqreturn_t ras_hotplug_interrupt(int irq, void *dev_id);
38 static irqreturn_t ras_epow_interrupt(int irq, void *dev_id);
39 static irqreturn_t ras_error_interrupt(int irq, void *dev_id);
40
41 /* RTAS pseries MCE errorlog section. */
42 struct pseries_mc_errorlog {
43 __be32 fru_id;
44 __be32 proc_id;
45 u8 error_type;
46 /*
47 * sub_err_type (1 byte). Bit fields depends on error_type
48 *
49 * MSB0
50 * |
51 * V
52 * 01234567
53 * XXXXXXXX
54 *
55 * For error_type == MC_ERROR_TYPE_UE
56 * XXXXXXXX
57 * X 1: Permanent or Transient UE.
58 * X 1: Effective address provided.
59 * X 1: Logical address provided.
60 * XX 2: Reserved.
61 * XXX 3: Type of UE error.
62 *
63 * For error_type != MC_ERROR_TYPE_UE
64 * XXXXXXXX
65 * X 1: Effective address provided.
66 * XXXXX 5: Reserved.
67 * XX 2: Type of SLB/ERAT/TLB error.
68 */
69 u8 sub_err_type;
70 u8 reserved_1[6];
71 __be64 effective_address;
72 __be64 logical_address;
73 } __packed;
74
75 /* RTAS pseries MCE error types */
76 #define MC_ERROR_TYPE_UE 0x00
77 #define MC_ERROR_TYPE_SLB 0x01
78 #define MC_ERROR_TYPE_ERAT 0x02
79 #define MC_ERROR_TYPE_UNKNOWN 0x03
80 #define MC_ERROR_TYPE_TLB 0x04
81 #define MC_ERROR_TYPE_D_CACHE 0x05
82 #define MC_ERROR_TYPE_I_CACHE 0x07
83
84 /* RTAS pseries MCE error sub types */
85 #define MC_ERROR_UE_INDETERMINATE 0
86 #define MC_ERROR_UE_IFETCH 1
87 #define MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH 2
88 #define MC_ERROR_UE_LOAD_STORE 3
89 #define MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE 4
90
91 #define UE_EFFECTIVE_ADDR_PROVIDED 0x40
92 #define UE_LOGICAL_ADDR_PROVIDED 0x20
93
94 #define MC_ERROR_SLB_PARITY 0
95 #define MC_ERROR_SLB_MULTIHIT 1
96 #define MC_ERROR_SLB_INDETERMINATE 2
97
98 #define MC_ERROR_ERAT_PARITY 1
99 #define MC_ERROR_ERAT_MULTIHIT 2
100 #define MC_ERROR_ERAT_INDETERMINATE 3
101
102 #define MC_ERROR_TLB_PARITY 1
103 #define MC_ERROR_TLB_MULTIHIT 2
104 #define MC_ERROR_TLB_INDETERMINATE 3
105
rtas_mc_error_sub_type(const struct pseries_mc_errorlog * mlog)106 static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog)
107 {
108 switch (mlog->error_type) {
109 case MC_ERROR_TYPE_UE:
110 return (mlog->sub_err_type & 0x07);
111 case MC_ERROR_TYPE_SLB:
112 case MC_ERROR_TYPE_ERAT:
113 case MC_ERROR_TYPE_TLB:
114 return (mlog->sub_err_type & 0x03);
115 default:
116 return 0;
117 }
118 }
119
120 /*
121 * Enable the hotplug interrupt late because processing them may touch other
122 * devices or systems (e.g. hugepages) that have not been initialized at the
123 * subsys stage.
124 */
init_ras_hotplug_IRQ(void)125 int __init init_ras_hotplug_IRQ(void)
126 {
127 struct device_node *np;
128
129 /* Hotplug Events */
130 np = of_find_node_by_path("/event-sources/hot-plug-events");
131 if (np != NULL) {
132 if (dlpar_workqueue_init() == 0)
133 request_event_sources_irqs(np, ras_hotplug_interrupt,
134 "RAS_HOTPLUG");
135 of_node_put(np);
136 }
137
138 return 0;
139 }
140 machine_late_initcall(pseries, init_ras_hotplug_IRQ);
141
142 /*
143 * Initialize handlers for the set of interrupts caused by hardware errors
144 * and power system events.
145 */
init_ras_IRQ(void)146 static int __init init_ras_IRQ(void)
147 {
148 struct device_node *np;
149
150 ras_check_exception_token = rtas_token("check-exception");
151
152 /* Internal Errors */
153 np = of_find_node_by_path("/event-sources/internal-errors");
154 if (np != NULL) {
155 request_event_sources_irqs(np, ras_error_interrupt,
156 "RAS_ERROR");
157 of_node_put(np);
158 }
159
160 /* EPOW Events */
161 np = of_find_node_by_path("/event-sources/epow-events");
162 if (np != NULL) {
163 request_event_sources_irqs(np, ras_epow_interrupt, "RAS_EPOW");
164 of_node_put(np);
165 }
166
167 return 0;
168 }
169 machine_subsys_initcall(pseries, init_ras_IRQ);
170
171 #define EPOW_SHUTDOWN_NORMAL 1
172 #define EPOW_SHUTDOWN_ON_UPS 2
173 #define EPOW_SHUTDOWN_LOSS_OF_CRITICAL_FUNCTIONS 3
174 #define EPOW_SHUTDOWN_AMBIENT_TEMPERATURE_TOO_HIGH 4
175
handle_system_shutdown(char event_modifier)176 static void handle_system_shutdown(char event_modifier)
177 {
178 switch (event_modifier) {
179 case EPOW_SHUTDOWN_NORMAL:
180 pr_emerg("Power off requested\n");
181 orderly_poweroff(true);
182 break;
183
184 case EPOW_SHUTDOWN_ON_UPS:
185 pr_emerg("Loss of system power detected. System is running on"
186 " UPS/battery. Check RTAS error log for details\n");
187 break;
188
189 case EPOW_SHUTDOWN_LOSS_OF_CRITICAL_FUNCTIONS:
190 pr_emerg("Loss of system critical functions detected. Check"
191 " RTAS error log for details\n");
192 orderly_poweroff(true);
193 break;
194
195 case EPOW_SHUTDOWN_AMBIENT_TEMPERATURE_TOO_HIGH:
196 pr_emerg("High ambient temperature detected. Check RTAS"
197 " error log for details\n");
198 orderly_poweroff(true);
199 break;
200
201 default:
202 pr_err("Unknown power/cooling shutdown event (modifier = %d)\n",
203 event_modifier);
204 }
205 }
206
207 struct epow_errorlog {
208 unsigned char sensor_value;
209 unsigned char event_modifier;
210 unsigned char extended_modifier;
211 unsigned char reserved;
212 unsigned char platform_reason;
213 };
214
215 #define EPOW_RESET 0
216 #define EPOW_WARN_COOLING 1
217 #define EPOW_WARN_POWER 2
218 #define EPOW_SYSTEM_SHUTDOWN 3
219 #define EPOW_SYSTEM_HALT 4
220 #define EPOW_MAIN_ENCLOSURE 5
221 #define EPOW_POWER_OFF 7
222
rtas_parse_epow_errlog(struct rtas_error_log * log)223 static void rtas_parse_epow_errlog(struct rtas_error_log *log)
224 {
225 struct pseries_errorlog *pseries_log;
226 struct epow_errorlog *epow_log;
227 char action_code;
228 char modifier;
229
230 pseries_log = get_pseries_errorlog(log, PSERIES_ELOG_SECT_ID_EPOW);
231 if (pseries_log == NULL)
232 return;
233
234 epow_log = (struct epow_errorlog *)pseries_log->data;
235 action_code = epow_log->sensor_value & 0xF; /* bottom 4 bits */
236 modifier = epow_log->event_modifier & 0xF; /* bottom 4 bits */
237
238 switch (action_code) {
239 case EPOW_RESET:
240 if (num_epow_events) {
241 pr_info("Non critical power/cooling issue cleared\n");
242 num_epow_events--;
243 }
244 break;
245
246 case EPOW_WARN_COOLING:
247 pr_info("Non-critical cooling issue detected. Check RTAS error"
248 " log for details\n");
249 break;
250
251 case EPOW_WARN_POWER:
252 pr_info("Non-critical power issue detected. Check RTAS error"
253 " log for details\n");
254 break;
255
256 case EPOW_SYSTEM_SHUTDOWN:
257 handle_system_shutdown(epow_log->event_modifier);
258 break;
259
260 case EPOW_SYSTEM_HALT:
261 pr_emerg("Critical power/cooling issue detected. Check RTAS"
262 " error log for details. Powering off.\n");
263 orderly_poweroff(true);
264 break;
265
266 case EPOW_MAIN_ENCLOSURE:
267 case EPOW_POWER_OFF:
268 pr_emerg("System about to lose power. Check RTAS error log "
269 " for details. Powering off immediately.\n");
270 emergency_sync();
271 kernel_power_off();
272 break;
273
274 default:
275 pr_err("Unknown power/cooling event (action code = %d)\n",
276 action_code);
277 }
278
279 /* Increment epow events counter variable */
280 if (action_code != EPOW_RESET)
281 num_epow_events++;
282 }
283
ras_hotplug_interrupt(int irq,void * dev_id)284 static irqreturn_t ras_hotplug_interrupt(int irq, void *dev_id)
285 {
286 struct pseries_errorlog *pseries_log;
287 struct pseries_hp_errorlog *hp_elog;
288
289 spin_lock(&ras_log_buf_lock);
290
291 rtas_call(ras_check_exception_token, 6, 1, NULL,
292 RTAS_VECTOR_EXTERNAL_INTERRUPT, virq_to_hw(irq),
293 RTAS_HOTPLUG_EVENTS, 0, __pa(&ras_log_buf),
294 rtas_get_error_log_max());
295
296 pseries_log = get_pseries_errorlog((struct rtas_error_log *)ras_log_buf,
297 PSERIES_ELOG_SECT_ID_HOTPLUG);
298 hp_elog = (struct pseries_hp_errorlog *)pseries_log->data;
299
300 /*
301 * Since PCI hotplug is not currently supported on pseries, put PCI
302 * hotplug events on the ras_log_buf to be handled by rtas_errd.
303 */
304 if (hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_MEM ||
305 hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_CPU ||
306 hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_PMEM)
307 queue_hotplug_event(hp_elog);
308 else
309 log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
310
311 spin_unlock(&ras_log_buf_lock);
312 return IRQ_HANDLED;
313 }
314
315 /* Handle environmental and power warning (EPOW) interrupts. */
ras_epow_interrupt(int irq,void * dev_id)316 static irqreturn_t ras_epow_interrupt(int irq, void *dev_id)
317 {
318 int status;
319 int state;
320 int critical;
321
322 status = rtas_get_sensor_fast(EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX,
323 &state);
324
325 if (state > 3)
326 critical = 1; /* Time Critical */
327 else
328 critical = 0;
329
330 spin_lock(&ras_log_buf_lock);
331
332 status = rtas_call(ras_check_exception_token, 6, 1, NULL,
333 RTAS_VECTOR_EXTERNAL_INTERRUPT,
334 virq_to_hw(irq),
335 RTAS_EPOW_WARNING,
336 critical, __pa(&ras_log_buf),
337 rtas_get_error_log_max());
338
339 log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
340
341 rtas_parse_epow_errlog((struct rtas_error_log *)ras_log_buf);
342
343 spin_unlock(&ras_log_buf_lock);
344 return IRQ_HANDLED;
345 }
346
347 /*
348 * Handle hardware error interrupts.
349 *
350 * RTAS check-exception is called to collect data on the exception. If
351 * the error is deemed recoverable, we log a warning and return.
352 * For nonrecoverable errors, an error is logged and we stop all processing
353 * as quickly as possible in order to prevent propagation of the failure.
354 */
ras_error_interrupt(int irq,void * dev_id)355 static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
356 {
357 struct rtas_error_log *rtas_elog;
358 int status;
359 int fatal;
360
361 spin_lock(&ras_log_buf_lock);
362
363 status = rtas_call(ras_check_exception_token, 6, 1, NULL,
364 RTAS_VECTOR_EXTERNAL_INTERRUPT,
365 virq_to_hw(irq),
366 RTAS_INTERNAL_ERROR, 1 /* Time Critical */,
367 __pa(&ras_log_buf),
368 rtas_get_error_log_max());
369
370 rtas_elog = (struct rtas_error_log *)ras_log_buf;
371
372 if (status == 0 &&
373 rtas_error_severity(rtas_elog) >= RTAS_SEVERITY_ERROR_SYNC)
374 fatal = 1;
375 else
376 fatal = 0;
377
378 /* format and print the extended information */
379 log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal);
380
381 if (fatal) {
382 pr_emerg("Fatal hardware error detected. Check RTAS error"
383 " log for details. Powering off immediately\n");
384 emergency_sync();
385 kernel_power_off();
386 } else {
387 pr_err("Recoverable hardware error detected\n");
388 }
389
390 spin_unlock(&ras_log_buf_lock);
391 return IRQ_HANDLED;
392 }
393
394 /*
395 * Some versions of FWNMI place the buffer inside the 4kB page starting at
396 * 0x7000. Other versions place it inside the rtas buffer. We check both.
397 * Minimum size of the buffer is 16 bytes.
398 */
399 #define VALID_FWNMI_BUFFER(A) \
400 ((((A) >= 0x7000) && ((A) <= 0x8000 - 16)) || \
401 (((A) >= rtas.base) && ((A) <= (rtas.base + rtas.size - 16))))
402
fwnmi_get_errlog(void)403 static inline struct rtas_error_log *fwnmi_get_errlog(void)
404 {
405 return (struct rtas_error_log *)local_paca->mce_data_buf;
406 }
407
408 /*
409 * Get the error information for errors coming through the
410 * FWNMI vectors. The pt_regs' r3 will be updated to reflect
411 * the actual r3 if possible, and a ptr to the error log entry
412 * will be returned if found.
413 *
414 * Use one buffer mce_data_buf per cpu to store RTAS error.
415 *
416 * The mce_data_buf does not have any locks or protection around it,
417 * if a second machine check comes in, or a system reset is done
418 * before we have logged the error, then we will get corruption in the
419 * error log. This is preferable over holding off on calling
420 * ibm,nmi-interlock which would result in us checkstopping if a
421 * second machine check did come in.
422 */
fwnmi_get_errinfo(struct pt_regs * regs)423 static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
424 {
425 unsigned long *savep;
426 struct rtas_error_log *h;
427
428 /* Mask top two bits */
429 regs->gpr[3] &= ~(0x3UL << 62);
430
431 if (!VALID_FWNMI_BUFFER(regs->gpr[3])) {
432 printk(KERN_ERR "FWNMI: corrupt r3 0x%016lx\n", regs->gpr[3]);
433 return NULL;
434 }
435
436 savep = __va(regs->gpr[3]);
437 regs->gpr[3] = be64_to_cpu(savep[0]); /* restore original r3 */
438
439 h = (struct rtas_error_log *)&savep[1];
440 /* Use the per cpu buffer from paca to store rtas error log */
441 memset(local_paca->mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
442 if (!rtas_error_extended(h)) {
443 memcpy(local_paca->mce_data_buf, h, sizeof(__u64));
444 } else {
445 int len, error_log_length;
446
447 error_log_length = 8 + rtas_error_extended_log_length(h);
448 len = min_t(int, error_log_length, RTAS_ERROR_LOG_MAX);
449 memcpy(local_paca->mce_data_buf, h, len);
450 }
451
452 return (struct rtas_error_log *)local_paca->mce_data_buf;
453 }
454
455 /* Call this when done with the data returned by FWNMI_get_errinfo.
456 * It will release the saved data area for other CPUs in the
457 * partition to receive FWNMI errors.
458 */
fwnmi_release_errinfo(void)459 static void fwnmi_release_errinfo(void)
460 {
461 int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
462 if (ret != 0)
463 printk(KERN_ERR "FWNMI: nmi-interlock failed: %d\n", ret);
464 }
465
pSeries_system_reset_exception(struct pt_regs * regs)466 int pSeries_system_reset_exception(struct pt_regs *regs)
467 {
468 #ifdef __LITTLE_ENDIAN__
469 /*
470 * Some firmware byteswaps SRR registers and gives incorrect SRR1. Try
471 * to detect the bad SRR1 pattern here. Flip the NIP back to correct
472 * endian for reporting purposes. Unfortunately the MSR can't be fixed,
473 * so clear it. It will be missing MSR_RI so we won't try to recover.
474 */
475 if ((be64_to_cpu(regs->msr) &
476 (MSR_LE|MSR_RI|MSR_DR|MSR_IR|MSR_ME|MSR_PR|
477 MSR_ILE|MSR_HV|MSR_SF)) == (MSR_DR|MSR_SF)) {
478 regs->nip = be64_to_cpu((__be64)regs->nip);
479 regs->msr = 0;
480 }
481 #endif
482
483 if (fwnmi_active) {
484 struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs);
485 if (errhdr) {
486 /* XXX Should look at FWNMI information */
487 }
488 fwnmi_release_errinfo();
489 }
490
491 if (smp_handle_nmi_ipi(regs))
492 return 1;
493
494 return 0; /* need to perform reset */
495 }
496
mce_handle_err_realmode(int disposition,u8 error_type)497 static int mce_handle_err_realmode(int disposition, u8 error_type)
498 {
499 #ifdef CONFIG_PPC_BOOK3S_64
500 if (disposition == RTAS_DISP_NOT_RECOVERED) {
501 switch (error_type) {
502 case MC_ERROR_TYPE_SLB:
503 case MC_ERROR_TYPE_ERAT:
504 /*
505 * Store the old slb content in paca before flushing.
506 * Print this when we go to virtual mode.
507 * There are chances that we may hit MCE again if there
508 * is a parity error on the SLB entry we trying to read
509 * for saving. Hence limit the slb saving to single
510 * level of recursion.
511 */
512 if (local_paca->in_mce == 1)
513 slb_save_contents(local_paca->mce_faulty_slbs);
514 flush_and_reload_slb();
515 disposition = RTAS_DISP_FULLY_RECOVERED;
516 break;
517 default:
518 break;
519 }
520 } else if (disposition == RTAS_DISP_LIMITED_RECOVERY) {
521 /* Platform corrected itself but could be degraded */
522 pr_err("MCE: limited recovery, system may be degraded\n");
523 disposition = RTAS_DISP_FULLY_RECOVERED;
524 }
525 #endif
526 return disposition;
527 }
528
mce_handle_err_virtmode(struct pt_regs * regs,struct rtas_error_log * errp,struct pseries_mc_errorlog * mce_log,int disposition)529 static int mce_handle_err_virtmode(struct pt_regs *regs,
530 struct rtas_error_log *errp,
531 struct pseries_mc_errorlog *mce_log,
532 int disposition)
533 {
534 struct mce_error_info mce_err = { 0 };
535 int initiator = rtas_error_initiator(errp);
536 int severity = rtas_error_severity(errp);
537 unsigned long eaddr = 0, paddr = 0;
538 u8 error_type, err_sub_type;
539
540 if (!mce_log)
541 goto out;
542
543 error_type = mce_log->error_type;
544 err_sub_type = rtas_mc_error_sub_type(mce_log);
545
546 if (initiator == RTAS_INITIATOR_UNKNOWN)
547 mce_err.initiator = MCE_INITIATOR_UNKNOWN;
548 else if (initiator == RTAS_INITIATOR_CPU)
549 mce_err.initiator = MCE_INITIATOR_CPU;
550 else if (initiator == RTAS_INITIATOR_PCI)
551 mce_err.initiator = MCE_INITIATOR_PCI;
552 else if (initiator == RTAS_INITIATOR_ISA)
553 mce_err.initiator = MCE_INITIATOR_ISA;
554 else if (initiator == RTAS_INITIATOR_MEMORY)
555 mce_err.initiator = MCE_INITIATOR_MEMORY;
556 else if (initiator == RTAS_INITIATOR_POWERMGM)
557 mce_err.initiator = MCE_INITIATOR_POWERMGM;
558 else
559 mce_err.initiator = MCE_INITIATOR_UNKNOWN;
560
561 if (severity == RTAS_SEVERITY_NO_ERROR)
562 mce_err.severity = MCE_SEV_NO_ERROR;
563 else if (severity == RTAS_SEVERITY_EVENT)
564 mce_err.severity = MCE_SEV_WARNING;
565 else if (severity == RTAS_SEVERITY_WARNING)
566 mce_err.severity = MCE_SEV_WARNING;
567 else if (severity == RTAS_SEVERITY_ERROR_SYNC)
568 mce_err.severity = MCE_SEV_SEVERE;
569 else if (severity == RTAS_SEVERITY_ERROR)
570 mce_err.severity = MCE_SEV_SEVERE;
571 else if (severity == RTAS_SEVERITY_FATAL)
572 mce_err.severity = MCE_SEV_FATAL;
573 else
574 mce_err.severity = MCE_SEV_FATAL;
575
576 if (severity <= RTAS_SEVERITY_ERROR_SYNC)
577 mce_err.sync_error = true;
578 else
579 mce_err.sync_error = false;
580
581 mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN;
582 mce_err.error_class = MCE_ECLASS_UNKNOWN;
583
584 switch (error_type) {
585 case MC_ERROR_TYPE_UE:
586 mce_err.error_type = MCE_ERROR_TYPE_UE;
587 switch (err_sub_type) {
588 case MC_ERROR_UE_IFETCH:
589 mce_err.u.ue_error_type = MCE_UE_ERROR_IFETCH;
590 break;
591 case MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH:
592 mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH;
593 break;
594 case MC_ERROR_UE_LOAD_STORE:
595 mce_err.u.ue_error_type = MCE_UE_ERROR_LOAD_STORE;
596 break;
597 case MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE:
598 mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE;
599 break;
600 case MC_ERROR_UE_INDETERMINATE:
601 default:
602 mce_err.u.ue_error_type = MCE_UE_ERROR_INDETERMINATE;
603 break;
604 }
605 if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED)
606 eaddr = be64_to_cpu(mce_log->effective_address);
607
608 if (mce_log->sub_err_type & UE_LOGICAL_ADDR_PROVIDED) {
609 paddr = be64_to_cpu(mce_log->logical_address);
610 } else if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED) {
611 unsigned long pfn;
612
613 pfn = addr_to_pfn(regs, eaddr);
614 if (pfn != ULONG_MAX)
615 paddr = pfn << PAGE_SHIFT;
616 }
617
618 break;
619 case MC_ERROR_TYPE_SLB:
620 mce_err.error_type = MCE_ERROR_TYPE_SLB;
621 switch (err_sub_type) {
622 case MC_ERROR_SLB_PARITY:
623 mce_err.u.slb_error_type = MCE_SLB_ERROR_PARITY;
624 break;
625 case MC_ERROR_SLB_MULTIHIT:
626 mce_err.u.slb_error_type = MCE_SLB_ERROR_MULTIHIT;
627 break;
628 case MC_ERROR_SLB_INDETERMINATE:
629 default:
630 mce_err.u.slb_error_type = MCE_SLB_ERROR_INDETERMINATE;
631 break;
632 }
633 if (mce_log->sub_err_type & 0x80)
634 eaddr = be64_to_cpu(mce_log->effective_address);
635 break;
636 case MC_ERROR_TYPE_ERAT:
637 mce_err.error_type = MCE_ERROR_TYPE_ERAT;
638 switch (err_sub_type) {
639 case MC_ERROR_ERAT_PARITY:
640 mce_err.u.erat_error_type = MCE_ERAT_ERROR_PARITY;
641 break;
642 case MC_ERROR_ERAT_MULTIHIT:
643 mce_err.u.erat_error_type = MCE_ERAT_ERROR_MULTIHIT;
644 break;
645 case MC_ERROR_ERAT_INDETERMINATE:
646 default:
647 mce_err.u.erat_error_type = MCE_ERAT_ERROR_INDETERMINATE;
648 break;
649 }
650 if (mce_log->sub_err_type & 0x80)
651 eaddr = be64_to_cpu(mce_log->effective_address);
652 break;
653 case MC_ERROR_TYPE_TLB:
654 mce_err.error_type = MCE_ERROR_TYPE_TLB;
655 switch (err_sub_type) {
656 case MC_ERROR_TLB_PARITY:
657 mce_err.u.tlb_error_type = MCE_TLB_ERROR_PARITY;
658 break;
659 case MC_ERROR_TLB_MULTIHIT:
660 mce_err.u.tlb_error_type = MCE_TLB_ERROR_MULTIHIT;
661 break;
662 case MC_ERROR_TLB_INDETERMINATE:
663 default:
664 mce_err.u.tlb_error_type = MCE_TLB_ERROR_INDETERMINATE;
665 break;
666 }
667 if (mce_log->sub_err_type & 0x80)
668 eaddr = be64_to_cpu(mce_log->effective_address);
669 break;
670 case MC_ERROR_TYPE_D_CACHE:
671 mce_err.error_type = MCE_ERROR_TYPE_DCACHE;
672 break;
673 case MC_ERROR_TYPE_I_CACHE:
674 mce_err.error_type = MCE_ERROR_TYPE_DCACHE;
675 break;
676 case MC_ERROR_TYPE_UNKNOWN:
677 default:
678 mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN;
679 break;
680 }
681 out:
682 save_mce_event(regs, disposition == RTAS_DISP_FULLY_RECOVERED,
683 &mce_err, regs->nip, eaddr, paddr);
684 return disposition;
685 }
686
mce_handle_error(struct pt_regs * regs,struct rtas_error_log * errp)687 static int mce_handle_error(struct pt_regs *regs, struct rtas_error_log *errp)
688 {
689 struct pseries_errorlog *pseries_log;
690 struct pseries_mc_errorlog *mce_log = NULL;
691 int disposition = rtas_error_disposition(errp);
692 u8 error_type;
693
694 if (!rtas_error_extended(errp))
695 goto out;
696
697 pseries_log = get_pseries_errorlog(errp, PSERIES_ELOG_SECT_ID_MCE);
698 if (!pseries_log)
699 goto out;
700
701 mce_log = (struct pseries_mc_errorlog *)pseries_log->data;
702 error_type = mce_log->error_type;
703
704 disposition = mce_handle_err_realmode(disposition, error_type);
705
706 /*
707 * Enable translation as we will be accessing per-cpu variables
708 * in save_mce_event() which may fall outside RMO region, also
709 * leave it enabled because subsequently we will be queuing work
710 * to workqueues where again per-cpu variables accessed, besides
711 * fwnmi_release_errinfo() crashes when called in realmode on
712 * pseries.
713 * Note: All the realmode handling like flushing SLB entries for
714 * SLB multihit is done by now.
715 */
716 out:
717 mtmsr(mfmsr() | MSR_IR | MSR_DR);
718 disposition = mce_handle_err_virtmode(regs, errp, mce_log,
719 disposition);
720 return disposition;
721 }
722
723 /*
724 * Process MCE rtas errlog event.
725 */
mce_process_errlog_event(struct irq_work * work)726 static void mce_process_errlog_event(struct irq_work *work)
727 {
728 struct rtas_error_log *err;
729
730 err = fwnmi_get_errlog();
731 log_error((char *)err, ERR_TYPE_RTAS_LOG, 0);
732 }
733
734 /*
735 * See if we can recover from a machine check exception.
736 * This is only called on power4 (or above) and only via
737 * the Firmware Non-Maskable Interrupts (fwnmi) handler
738 * which provides the error analysis for us.
739 *
740 * Return 1 if corrected (or delivered a signal).
741 * Return 0 if there is nothing we can do.
742 */
recover_mce(struct pt_regs * regs,struct machine_check_event * evt)743 static int recover_mce(struct pt_regs *regs, struct machine_check_event *evt)
744 {
745 int recovered = 0;
746
747 if (!(regs->msr & MSR_RI)) {
748 /* If MSR_RI isn't set, we cannot recover */
749 pr_err("Machine check interrupt unrecoverable: MSR(RI=0)\n");
750 recovered = 0;
751 } else if (evt->disposition == MCE_DISPOSITION_RECOVERED) {
752 /* Platform corrected itself */
753 recovered = 1;
754 } else if (evt->severity == MCE_SEV_FATAL) {
755 /* Fatal machine check */
756 pr_err("Machine check interrupt is fatal\n");
757 recovered = 0;
758 }
759
760 if (!recovered && evt->sync_error) {
761 /*
762 * Try to kill processes if we get a synchronous machine check
763 * (e.g., one caused by execution of this instruction). This
764 * will devolve into a panic if we try to kill init or are in
765 * an interrupt etc.
766 *
767 * TODO: Queue up this address for hwpoisioning later.
768 * TODO: This is not quite right for d-side machine
769 * checks ->nip is not necessarily the important
770 * address.
771 */
772 if ((user_mode(regs))) {
773 _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip);
774 recovered = 1;
775 } else if (die_will_crash()) {
776 /*
777 * die() would kill the kernel, so better to go via
778 * the platform reboot code that will log the
779 * machine check.
780 */
781 recovered = 0;
782 } else {
783 die("Machine check", regs, SIGBUS);
784 recovered = 1;
785 }
786 }
787
788 return recovered;
789 }
790
791 /*
792 * Handle a machine check.
793 *
794 * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi)
795 * should be present. If so the handler which called us tells us if the
796 * error was recovered (never true if RI=0).
797 *
798 * On hardware prior to Power 4 these exceptions were asynchronous which
799 * means we can't tell exactly where it occurred and so we can't recover.
800 */
pSeries_machine_check_exception(struct pt_regs * regs)801 int pSeries_machine_check_exception(struct pt_regs *regs)
802 {
803 struct machine_check_event evt;
804
805 if (!get_mce_event(&evt, MCE_EVENT_RELEASE))
806 return 0;
807
808 /* Print things out */
809 if (evt.version != MCE_V1) {
810 pr_err("Machine Check Exception, Unknown event version %d !\n",
811 evt.version);
812 return 0;
813 }
814 machine_check_print_event_info(&evt, user_mode(regs), false);
815
816 if (recover_mce(regs, &evt))
817 return 1;
818
819 return 0;
820 }
821
pseries_machine_check_realmode(struct pt_regs * regs)822 long pseries_machine_check_realmode(struct pt_regs *regs)
823 {
824 struct rtas_error_log *errp;
825 int disposition;
826
827 if (fwnmi_active) {
828 errp = fwnmi_get_errinfo(regs);
829 /*
830 * Call to fwnmi_release_errinfo() in real mode causes kernel
831 * to panic. Hence we will call it as soon as we go into
832 * virtual mode.
833 */
834 disposition = mce_handle_error(regs, errp);
835 fwnmi_release_errinfo();
836
837 /* Queue irq work to log this rtas event later. */
838 irq_work_queue(&mce_errlog_process_work);
839
840 if (disposition == RTAS_DISP_FULLY_RECOVERED)
841 return 1;
842 }
843
844 return 0;
845 }
846