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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *  SMP related functions
4  *
5  *    Copyright IBM Corp. 1999, 2012
6  *    Author(s): Denis Joseph Barrow,
7  *		 Martin Schwidefsky <schwidefsky@de.ibm.com>,
8  *		 Heiko Carstens <heiko.carstens@de.ibm.com>,
9  *
10  *  based on other smp stuff by
11  *    (c) 1995 Alan Cox, CymruNET Ltd  <alan@cymru.net>
12  *    (c) 1998 Ingo Molnar
13  *
14  * The code outside of smp.c uses logical cpu numbers, only smp.c does
15  * the translation of logical to physical cpu ids. All new code that
16  * operates on physical cpu numbers needs to go into smp.c.
17  */
18 
19 #define KMSG_COMPONENT "cpu"
20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21 
22 #include <linux/workqueue.h>
23 #include <linux/memblock.h>
24 #include <linux/export.h>
25 #include <linux/init.h>
26 #include <linux/mm.h>
27 #include <linux/err.h>
28 #include <linux/spinlock.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/delay.h>
31 #include <linux/interrupt.h>
32 #include <linux/irqflags.h>
33 #include <linux/cpu.h>
34 #include <linux/slab.h>
35 #include <linux/sched/hotplug.h>
36 #include <linux/sched/task_stack.h>
37 #include <linux/crash_dump.h>
38 #include <linux/kprobes.h>
39 #include <asm/asm-offsets.h>
40 #include <asm/diag.h>
41 #include <asm/switch_to.h>
42 #include <asm/facility.h>
43 #include <asm/ipl.h>
44 #include <asm/setup.h>
45 #include <asm/irq.h>
46 #include <asm/tlbflush.h>
47 #include <asm/vtimer.h>
48 #include <asm/lowcore.h>
49 #include <asm/sclp.h>
50 #include <asm/vdso.h>
51 #include <asm/debug.h>
52 #include <asm/os_info.h>
53 #include <asm/sigp.h>
54 #include <asm/idle.h>
55 #include <asm/nmi.h>
56 #include <asm/stacktrace.h>
57 #include <asm/topology.h>
58 #include "entry.h"
59 
60 enum {
61 	ec_schedule = 0,
62 	ec_call_function_single,
63 	ec_stop_cpu,
64 };
65 
66 enum {
67 	CPU_STATE_STANDBY,
68 	CPU_STATE_CONFIGURED,
69 };
70 
71 static DEFINE_PER_CPU(struct cpu *, cpu_device);
72 
73 struct pcpu {
74 	struct lowcore *lowcore;	/* lowcore page(s) for the cpu */
75 	unsigned long ec_mask;		/* bit mask for ec_xxx functions */
76 	unsigned long ec_clk;		/* sigp timestamp for ec_xxx */
77 	signed char state;		/* physical cpu state */
78 	signed char polarization;	/* physical polarization */
79 	u16 address;			/* physical cpu address */
80 };
81 
82 static u8 boot_core_type;
83 static struct pcpu pcpu_devices[NR_CPUS];
84 
85 unsigned int smp_cpu_mt_shift;
86 EXPORT_SYMBOL(smp_cpu_mt_shift);
87 
88 unsigned int smp_cpu_mtid;
89 EXPORT_SYMBOL(smp_cpu_mtid);
90 
91 #ifdef CONFIG_CRASH_DUMP
92 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
93 #endif
94 
95 static unsigned int smp_max_threads __initdata = -1U;
96 
early_nosmt(char * s)97 static int __init early_nosmt(char *s)
98 {
99 	smp_max_threads = 1;
100 	return 0;
101 }
102 early_param("nosmt", early_nosmt);
103 
early_smt(char * s)104 static int __init early_smt(char *s)
105 {
106 	get_option(&s, &smp_max_threads);
107 	return 0;
108 }
109 early_param("smt", early_smt);
110 
111 /*
112  * The smp_cpu_state_mutex must be held when changing the state or polarization
113  * member of a pcpu data structure within the pcpu_devices arreay.
114  */
115 DEFINE_MUTEX(smp_cpu_state_mutex);
116 
117 /*
118  * Signal processor helper functions.
119  */
__pcpu_sigp_relax(u16 addr,u8 order,unsigned long parm)120 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
121 {
122 	int cc;
123 
124 	while (1) {
125 		cc = __pcpu_sigp(addr, order, parm, NULL);
126 		if (cc != SIGP_CC_BUSY)
127 			return cc;
128 		cpu_relax();
129 	}
130 }
131 
pcpu_sigp_retry(struct pcpu * pcpu,u8 order,u32 parm)132 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
133 {
134 	int cc, retry;
135 
136 	for (retry = 0; ; retry++) {
137 		cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
138 		if (cc != SIGP_CC_BUSY)
139 			break;
140 		if (retry >= 3)
141 			udelay(10);
142 	}
143 	return cc;
144 }
145 
pcpu_stopped(struct pcpu * pcpu)146 static inline int pcpu_stopped(struct pcpu *pcpu)
147 {
148 	u32 status;
149 
150 	if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
151 			0, &status) != SIGP_CC_STATUS_STORED)
152 		return 0;
153 	return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
154 }
155 
pcpu_running(struct pcpu * pcpu)156 static inline int pcpu_running(struct pcpu *pcpu)
157 {
158 	if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
159 			0, NULL) != SIGP_CC_STATUS_STORED)
160 		return 1;
161 	/* Status stored condition code is equivalent to cpu not running. */
162 	return 0;
163 }
164 
165 /*
166  * Find struct pcpu by cpu address.
167  */
pcpu_find_address(const struct cpumask * mask,u16 address)168 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
169 {
170 	int cpu;
171 
172 	for_each_cpu(cpu, mask)
173 		if (pcpu_devices[cpu].address == address)
174 			return pcpu_devices + cpu;
175 	return NULL;
176 }
177 
pcpu_ec_call(struct pcpu * pcpu,int ec_bit)178 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
179 {
180 	int order;
181 
182 	if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
183 		return;
184 	order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
185 	pcpu->ec_clk = get_tod_clock_fast();
186 	pcpu_sigp_retry(pcpu, order, 0);
187 }
188 
pcpu_alloc_lowcore(struct pcpu * pcpu,int cpu)189 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
190 {
191 	unsigned long async_stack, nodat_stack;
192 	struct lowcore *lc;
193 
194 	if (pcpu != &pcpu_devices[0]) {
195 		pcpu->lowcore =	(struct lowcore *)
196 			__get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
197 		nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
198 		if (!pcpu->lowcore || !nodat_stack)
199 			goto out;
200 	} else {
201 		nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET;
202 	}
203 	async_stack = stack_alloc();
204 	if (!async_stack)
205 		goto out;
206 	lc = pcpu->lowcore;
207 	memcpy(lc, &S390_lowcore, 512);
208 	memset((char *) lc + 512, 0, sizeof(*lc) - 512);
209 	lc->async_stack = async_stack + STACK_INIT_OFFSET;
210 	lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
211 	lc->cpu_nr = cpu;
212 	lc->spinlock_lockval = arch_spin_lockval(cpu);
213 	lc->spinlock_index = 0;
214 	lc->br_r1_trampoline = 0x07f1;	/* br %r1 */
215 	lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW);
216 	lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW);
217 	if (nmi_alloc_per_cpu(lc))
218 		goto out_async;
219 	if (vdso_alloc_per_cpu(lc))
220 		goto out_mcesa;
221 	lowcore_ptr[cpu] = lc;
222 	pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
223 	return 0;
224 
225 out_mcesa:
226 	nmi_free_per_cpu(lc);
227 out_async:
228 	stack_free(async_stack);
229 out:
230 	if (pcpu != &pcpu_devices[0]) {
231 		free_pages(nodat_stack, THREAD_SIZE_ORDER);
232 		free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
233 	}
234 	return -ENOMEM;
235 }
236 
pcpu_free_lowcore(struct pcpu * pcpu)237 static void pcpu_free_lowcore(struct pcpu *pcpu)
238 {
239 	unsigned long async_stack, nodat_stack, lowcore;
240 
241 	nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET;
242 	async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET;
243 	lowcore = (unsigned long) pcpu->lowcore;
244 
245 	pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
246 	lowcore_ptr[pcpu - pcpu_devices] = NULL;
247 	vdso_free_per_cpu(pcpu->lowcore);
248 	nmi_free_per_cpu(pcpu->lowcore);
249 	stack_free(async_stack);
250 	if (pcpu == &pcpu_devices[0])
251 		return;
252 	free_pages(nodat_stack, THREAD_SIZE_ORDER);
253 	free_pages(lowcore, LC_ORDER);
254 }
255 
pcpu_prepare_secondary(struct pcpu * pcpu,int cpu)256 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
257 {
258 	struct lowcore *lc = pcpu->lowcore;
259 
260 	cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
261 	cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
262 	lc->cpu_nr = cpu;
263 	lc->spinlock_lockval = arch_spin_lockval(cpu);
264 	lc->spinlock_index = 0;
265 	lc->percpu_offset = __per_cpu_offset[cpu];
266 	lc->kernel_asce = S390_lowcore.kernel_asce;
267 	lc->user_asce = S390_lowcore.kernel_asce;
268 	lc->machine_flags = S390_lowcore.machine_flags;
269 	lc->user_timer = lc->system_timer =
270 		lc->steal_timer = lc->avg_steal_timer = 0;
271 	__ctl_store(lc->cregs_save_area, 0, 15);
272 	lc->cregs_save_area[1] = lc->kernel_asce;
273 	lc->cregs_save_area[7] = lc->vdso_asce;
274 	save_access_regs((unsigned int *) lc->access_regs_save_area);
275 	memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
276 	       sizeof(lc->stfle_fac_list));
277 	memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list,
278 	       sizeof(lc->alt_stfle_fac_list));
279 	arch_spin_lock_setup(cpu);
280 }
281 
pcpu_attach_task(struct pcpu * pcpu,struct task_struct * tsk)282 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
283 {
284 	struct lowcore *lc = pcpu->lowcore;
285 
286 	lc->kernel_stack = (unsigned long) task_stack_page(tsk)
287 		+ THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
288 	lc->current_task = (unsigned long) tsk;
289 	lc->lpp = LPP_MAGIC;
290 	lc->current_pid = tsk->pid;
291 	lc->user_timer = tsk->thread.user_timer;
292 	lc->guest_timer = tsk->thread.guest_timer;
293 	lc->system_timer = tsk->thread.system_timer;
294 	lc->hardirq_timer = tsk->thread.hardirq_timer;
295 	lc->softirq_timer = tsk->thread.softirq_timer;
296 	lc->steal_timer = 0;
297 }
298 
pcpu_start_fn(struct pcpu * pcpu,void (* func)(void *),void * data)299 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
300 {
301 	struct lowcore *lc = pcpu->lowcore;
302 
303 	lc->restart_stack = lc->nodat_stack;
304 	lc->restart_fn = (unsigned long) func;
305 	lc->restart_data = (unsigned long) data;
306 	lc->restart_source = -1UL;
307 	pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
308 }
309 
310 /*
311  * Call function via PSW restart on pcpu and stop the current cpu.
312  */
__pcpu_delegate(void (* func)(void *),void * data)313 static void __pcpu_delegate(void (*func)(void*), void *data)
314 {
315 	func(data);	/* should not return */
316 }
317 
pcpu_delegate(struct pcpu * pcpu,void (* func)(void *),void * data,unsigned long stack)318 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu,
319 						void (*func)(void *),
320 						void *data, unsigned long stack)
321 {
322 	struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
323 	unsigned long source_cpu = stap();
324 
325 	__load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
326 	if (pcpu->address == source_cpu)
327 		CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data);
328 	/* Stop target cpu (if func returns this stops the current cpu). */
329 	pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
330 	/* Restart func on the target cpu and stop the current cpu. */
331 	mem_assign_absolute(lc->restart_stack, stack);
332 	mem_assign_absolute(lc->restart_fn, (unsigned long) func);
333 	mem_assign_absolute(lc->restart_data, (unsigned long) data);
334 	mem_assign_absolute(lc->restart_source, source_cpu);
335 	__bpon();
336 	asm volatile(
337 		"0:	sigp	0,%0,%2	# sigp restart to target cpu\n"
338 		"	brc	2,0b	# busy, try again\n"
339 		"1:	sigp	0,%1,%3	# sigp stop to current cpu\n"
340 		"	brc	2,1b	# busy, try again\n"
341 		: : "d" (pcpu->address), "d" (source_cpu),
342 		    "K" (SIGP_RESTART), "K" (SIGP_STOP)
343 		: "0", "1", "cc");
344 	for (;;) ;
345 }
346 
347 /*
348  * Enable additional logical cpus for multi-threading.
349  */
pcpu_set_smt(unsigned int mtid)350 static int pcpu_set_smt(unsigned int mtid)
351 {
352 	int cc;
353 
354 	if (smp_cpu_mtid == mtid)
355 		return 0;
356 	cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
357 	if (cc == 0) {
358 		smp_cpu_mtid = mtid;
359 		smp_cpu_mt_shift = 0;
360 		while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
361 			smp_cpu_mt_shift++;
362 		pcpu_devices[0].address = stap();
363 	}
364 	return cc;
365 }
366 
367 /*
368  * Call function on an online CPU.
369  */
smp_call_online_cpu(void (* func)(void *),void * data)370 void smp_call_online_cpu(void (*func)(void *), void *data)
371 {
372 	struct pcpu *pcpu;
373 
374 	/* Use the current cpu if it is online. */
375 	pcpu = pcpu_find_address(cpu_online_mask, stap());
376 	if (!pcpu)
377 		/* Use the first online cpu. */
378 		pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
379 	pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
380 }
381 
382 /*
383  * Call function on the ipl CPU.
384  */
smp_call_ipl_cpu(void (* func)(void *),void * data)385 void smp_call_ipl_cpu(void (*func)(void *), void *data)
386 {
387 	struct lowcore *lc = pcpu_devices->lowcore;
388 
389 	if (pcpu_devices[0].address == stap())
390 		lc = &S390_lowcore;
391 
392 	pcpu_delegate(&pcpu_devices[0], func, data,
393 		      lc->nodat_stack);
394 }
395 
smp_find_processor_id(u16 address)396 int smp_find_processor_id(u16 address)
397 {
398 	int cpu;
399 
400 	for_each_present_cpu(cpu)
401 		if (pcpu_devices[cpu].address == address)
402 			return cpu;
403 	return -1;
404 }
405 
arch_vcpu_is_preempted(int cpu)406 bool notrace arch_vcpu_is_preempted(int cpu)
407 {
408 	if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
409 		return false;
410 	if (pcpu_running(pcpu_devices + cpu))
411 		return false;
412 	return true;
413 }
414 EXPORT_SYMBOL(arch_vcpu_is_preempted);
415 
smp_yield_cpu(int cpu)416 void notrace smp_yield_cpu(int cpu)
417 {
418 	if (MACHINE_HAS_DIAG9C) {
419 		diag_stat_inc_norecursion(DIAG_STAT_X09C);
420 		asm volatile("diag %0,0,0x9c"
421 			     : : "d" (pcpu_devices[cpu].address));
422 	} else if (MACHINE_HAS_DIAG44 && !smp_cpu_mtid) {
423 		diag_stat_inc_norecursion(DIAG_STAT_X044);
424 		asm volatile("diag 0,0,0x44");
425 	}
426 }
427 
428 /*
429  * Send cpus emergency shutdown signal. This gives the cpus the
430  * opportunity to complete outstanding interrupts.
431  */
smp_emergency_stop(void)432 void notrace smp_emergency_stop(void)
433 {
434 	cpumask_t cpumask;
435 	u64 end;
436 	int cpu;
437 
438 	cpumask_copy(&cpumask, cpu_online_mask);
439 	cpumask_clear_cpu(smp_processor_id(), &cpumask);
440 
441 	end = get_tod_clock() + (1000000UL << 12);
442 	for_each_cpu(cpu, &cpumask) {
443 		struct pcpu *pcpu = pcpu_devices + cpu;
444 		set_bit(ec_stop_cpu, &pcpu->ec_mask);
445 		while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
446 				   0, NULL) == SIGP_CC_BUSY &&
447 		       get_tod_clock() < end)
448 			cpu_relax();
449 	}
450 	while (get_tod_clock() < end) {
451 		for_each_cpu(cpu, &cpumask)
452 			if (pcpu_stopped(pcpu_devices + cpu))
453 				cpumask_clear_cpu(cpu, &cpumask);
454 		if (cpumask_empty(&cpumask))
455 			break;
456 		cpu_relax();
457 	}
458 }
459 NOKPROBE_SYMBOL(smp_emergency_stop);
460 
461 /*
462  * Stop all cpus but the current one.
463  */
smp_send_stop(void)464 void smp_send_stop(void)
465 {
466 	int cpu;
467 
468 	/* Disable all interrupts/machine checks */
469 	__load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
470 	trace_hardirqs_off();
471 
472 	debug_set_critical();
473 
474 	if (oops_in_progress)
475 		smp_emergency_stop();
476 
477 	/* stop all processors */
478 	for_each_online_cpu(cpu) {
479 		if (cpu == smp_processor_id())
480 			continue;
481 		pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
482 		while (!pcpu_stopped(pcpu_devices + cpu))
483 			cpu_relax();
484 	}
485 }
486 
487 /*
488  * This is the main routine where commands issued by other
489  * cpus are handled.
490  */
smp_handle_ext_call(void)491 static void smp_handle_ext_call(void)
492 {
493 	unsigned long bits;
494 
495 	/* handle bit signal external calls */
496 	bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
497 	if (test_bit(ec_stop_cpu, &bits))
498 		smp_stop_cpu();
499 	if (test_bit(ec_schedule, &bits))
500 		scheduler_ipi();
501 	if (test_bit(ec_call_function_single, &bits))
502 		generic_smp_call_function_single_interrupt();
503 }
504 
do_ext_call_interrupt(struct ext_code ext_code,unsigned int param32,unsigned long param64)505 static void do_ext_call_interrupt(struct ext_code ext_code,
506 				  unsigned int param32, unsigned long param64)
507 {
508 	inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
509 	smp_handle_ext_call();
510 }
511 
arch_send_call_function_ipi_mask(const struct cpumask * mask)512 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
513 {
514 	int cpu;
515 
516 	for_each_cpu(cpu, mask)
517 		pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
518 }
519 
arch_send_call_function_single_ipi(int cpu)520 void arch_send_call_function_single_ipi(int cpu)
521 {
522 	pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
523 }
524 
525 /*
526  * this function sends a 'reschedule' IPI to another CPU.
527  * it goes straight through and wastes no time serializing
528  * anything. Worst case is that we lose a reschedule ...
529  */
smp_send_reschedule(int cpu)530 void smp_send_reschedule(int cpu)
531 {
532 	pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
533 }
534 
535 /*
536  * parameter area for the set/clear control bit callbacks
537  */
538 struct ec_creg_mask_parms {
539 	unsigned long orval;
540 	unsigned long andval;
541 	int cr;
542 };
543 
544 /*
545  * callback for setting/clearing control bits
546  */
smp_ctl_bit_callback(void * info)547 static void smp_ctl_bit_callback(void *info)
548 {
549 	struct ec_creg_mask_parms *pp = info;
550 	unsigned long cregs[16];
551 
552 	__ctl_store(cregs, 0, 15);
553 	cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
554 	__ctl_load(cregs, 0, 15);
555 }
556 
557 /*
558  * Set a bit in a control register of all cpus
559  */
smp_ctl_set_bit(int cr,int bit)560 void smp_ctl_set_bit(int cr, int bit)
561 {
562 	struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
563 
564 	on_each_cpu(smp_ctl_bit_callback, &parms, 1);
565 }
566 EXPORT_SYMBOL(smp_ctl_set_bit);
567 
568 /*
569  * Clear a bit in a control register of all cpus
570  */
smp_ctl_clear_bit(int cr,int bit)571 void smp_ctl_clear_bit(int cr, int bit)
572 {
573 	struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
574 
575 	on_each_cpu(smp_ctl_bit_callback, &parms, 1);
576 }
577 EXPORT_SYMBOL(smp_ctl_clear_bit);
578 
579 #ifdef CONFIG_CRASH_DUMP
580 
smp_store_status(int cpu)581 int smp_store_status(int cpu)
582 {
583 	struct pcpu *pcpu = pcpu_devices + cpu;
584 	unsigned long pa;
585 
586 	pa = __pa(&pcpu->lowcore->floating_pt_save_area);
587 	if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
588 			      pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
589 		return -EIO;
590 	if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
591 		return 0;
592 	pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK);
593 	if (MACHINE_HAS_GS)
594 		pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK;
595 	if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
596 			      pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
597 		return -EIO;
598 	return 0;
599 }
600 
601 /*
602  * Collect CPU state of the previous, crashed system.
603  * There are four cases:
604  * 1) standard zfcp dump
605  *    condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
606  *    The state for all CPUs except the boot CPU needs to be collected
607  *    with sigp stop-and-store-status. The boot CPU state is located in
608  *    the absolute lowcore of the memory stored in the HSA. The zcore code
609  *    will copy the boot CPU state from the HSA.
610  * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
611  *    condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
612  *    The state for all CPUs except the boot CPU needs to be collected
613  *    with sigp stop-and-store-status. The firmware or the boot-loader
614  *    stored the registers of the boot CPU in the absolute lowcore in the
615  *    memory of the old system.
616  * 3) kdump and the old kernel did not store the CPU state,
617  *    or stand-alone kdump for DASD
618  *    condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
619  *    The state for all CPUs except the boot CPU needs to be collected
620  *    with sigp stop-and-store-status. The kexec code or the boot-loader
621  *    stored the registers of the boot CPU in the memory of the old system.
622  * 4) kdump and the old kernel stored the CPU state
623  *    condition: OLDMEM_BASE != NULL && is_kdump_kernel()
624  *    This case does not exist for s390 anymore, setup_arch explicitly
625  *    deactivates the elfcorehdr= kernel parameter
626  */
smp_save_cpu_vxrs(struct save_area * sa,u16 addr,bool is_boot_cpu,unsigned long page)627 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
628 				     bool is_boot_cpu, unsigned long page)
629 {
630 	__vector128 *vxrs = (__vector128 *) page;
631 
632 	if (is_boot_cpu)
633 		vxrs = boot_cpu_vector_save_area;
634 	else
635 		__pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
636 	save_area_add_vxrs(sa, vxrs);
637 }
638 
smp_save_cpu_regs(struct save_area * sa,u16 addr,bool is_boot_cpu,unsigned long page)639 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
640 				     bool is_boot_cpu, unsigned long page)
641 {
642 	void *regs = (void *) page;
643 
644 	if (is_boot_cpu)
645 		copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
646 	else
647 		__pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
648 	save_area_add_regs(sa, regs);
649 }
650 
smp_save_dump_cpus(void)651 void __init smp_save_dump_cpus(void)
652 {
653 	int addr, boot_cpu_addr, max_cpu_addr;
654 	struct save_area *sa;
655 	unsigned long page;
656 	bool is_boot_cpu;
657 
658 	if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
659 		/* No previous system present, normal boot. */
660 		return;
661 	/* Allocate a page as dumping area for the store status sigps */
662 	page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31);
663 	if (!page)
664 		panic("ERROR: Failed to allocate %lx bytes below %lx\n",
665 		      PAGE_SIZE, 1UL << 31);
666 
667 	/* Set multi-threading state to the previous system. */
668 	pcpu_set_smt(sclp.mtid_prev);
669 	boot_cpu_addr = stap();
670 	max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
671 	for (addr = 0; addr <= max_cpu_addr; addr++) {
672 		if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
673 		    SIGP_CC_NOT_OPERATIONAL)
674 			continue;
675 		is_boot_cpu = (addr == boot_cpu_addr);
676 		/* Allocate save area */
677 		sa = save_area_alloc(is_boot_cpu);
678 		if (!sa)
679 			panic("could not allocate memory for save area\n");
680 		if (MACHINE_HAS_VX)
681 			/* Get the vector registers */
682 			smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
683 		/*
684 		 * For a zfcp dump OLDMEM_BASE == NULL and the registers
685 		 * of the boot CPU are stored in the HSA. To retrieve
686 		 * these registers an SCLP request is required which is
687 		 * done by drivers/s390/char/zcore.c:init_cpu_info()
688 		 */
689 		if (!is_boot_cpu || OLDMEM_BASE)
690 			/* Get the CPU registers */
691 			smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
692 	}
693 	memblock_free(page, PAGE_SIZE);
694 	diag_dma_ops.diag308_reset();
695 	pcpu_set_smt(0);
696 }
697 #endif /* CONFIG_CRASH_DUMP */
698 
smp_cpu_set_polarization(int cpu,int val)699 void smp_cpu_set_polarization(int cpu, int val)
700 {
701 	pcpu_devices[cpu].polarization = val;
702 }
703 
smp_cpu_get_polarization(int cpu)704 int smp_cpu_get_polarization(int cpu)
705 {
706 	return pcpu_devices[cpu].polarization;
707 }
708 
smp_get_core_info(struct sclp_core_info * info,int early)709 static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
710 {
711 	static int use_sigp_detection;
712 	int address;
713 
714 	if (use_sigp_detection || sclp_get_core_info(info, early)) {
715 		use_sigp_detection = 1;
716 		for (address = 0;
717 		     address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
718 		     address += (1U << smp_cpu_mt_shift)) {
719 			if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
720 			    SIGP_CC_NOT_OPERATIONAL)
721 				continue;
722 			info->core[info->configured].core_id =
723 				address >> smp_cpu_mt_shift;
724 			info->configured++;
725 		}
726 		info->combined = info->configured;
727 	}
728 }
729 
730 static int smp_add_present_cpu(int cpu);
731 
smp_add_core(struct sclp_core_entry * core,cpumask_t * avail,bool configured,bool early)732 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
733 			bool configured, bool early)
734 {
735 	struct pcpu *pcpu;
736 	int cpu, nr, i;
737 	u16 address;
738 
739 	nr = 0;
740 	if (sclp.has_core_type && core->type != boot_core_type)
741 		return nr;
742 	cpu = cpumask_first(avail);
743 	address = core->core_id << smp_cpu_mt_shift;
744 	for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
745 		if (pcpu_find_address(cpu_present_mask, address + i))
746 			continue;
747 		pcpu = pcpu_devices + cpu;
748 		pcpu->address = address + i;
749 		if (configured)
750 			pcpu->state = CPU_STATE_CONFIGURED;
751 		else
752 			pcpu->state = CPU_STATE_STANDBY;
753 		smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
754 		set_cpu_present(cpu, true);
755 		if (!early && smp_add_present_cpu(cpu) != 0)
756 			set_cpu_present(cpu, false);
757 		else
758 			nr++;
759 		cpumask_clear_cpu(cpu, avail);
760 		cpu = cpumask_next(cpu, avail);
761 	}
762 	return nr;
763 }
764 
__smp_rescan_cpus(struct sclp_core_info * info,bool early)765 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
766 {
767 	struct sclp_core_entry *core;
768 	static cpumask_t avail;
769 	bool configured;
770 	u16 core_id;
771 	int nr, i;
772 
773 	nr = 0;
774 	cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
775 	/*
776 	 * Add IPL core first (which got logical CPU number 0) to make sure
777 	 * that all SMT threads get subsequent logical CPU numbers.
778 	 */
779 	if (early) {
780 		core_id = pcpu_devices[0].address >> smp_cpu_mt_shift;
781 		for (i = 0; i < info->configured; i++) {
782 			core = &info->core[i];
783 			if (core->core_id == core_id) {
784 				nr += smp_add_core(core, &avail, true, early);
785 				break;
786 			}
787 		}
788 	}
789 	for (i = 0; i < info->combined; i++) {
790 		configured = i < info->configured;
791 		nr += smp_add_core(&info->core[i], &avail, configured, early);
792 	}
793 	return nr;
794 }
795 
smp_detect_cpus(void)796 void __init smp_detect_cpus(void)
797 {
798 	unsigned int cpu, mtid, c_cpus, s_cpus;
799 	struct sclp_core_info *info;
800 	u16 address;
801 
802 	/* Get CPU information */
803 	info = memblock_alloc(sizeof(*info), 8);
804 	if (!info)
805 		panic("%s: Failed to allocate %zu bytes align=0x%x\n",
806 		      __func__, sizeof(*info), 8);
807 	smp_get_core_info(info, 1);
808 	/* Find boot CPU type */
809 	if (sclp.has_core_type) {
810 		address = stap();
811 		for (cpu = 0; cpu < info->combined; cpu++)
812 			if (info->core[cpu].core_id == address) {
813 				/* The boot cpu dictates the cpu type. */
814 				boot_core_type = info->core[cpu].type;
815 				break;
816 			}
817 		if (cpu >= info->combined)
818 			panic("Could not find boot CPU type");
819 	}
820 
821 	/* Set multi-threading state for the current system */
822 	mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
823 	mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
824 	pcpu_set_smt(mtid);
825 
826 	/* Print number of CPUs */
827 	c_cpus = s_cpus = 0;
828 	for (cpu = 0; cpu < info->combined; cpu++) {
829 		if (sclp.has_core_type &&
830 		    info->core[cpu].type != boot_core_type)
831 			continue;
832 		if (cpu < info->configured)
833 			c_cpus += smp_cpu_mtid + 1;
834 		else
835 			s_cpus += smp_cpu_mtid + 1;
836 	}
837 	pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
838 
839 	/* Add CPUs present at boot */
840 	get_online_cpus();
841 	__smp_rescan_cpus(info, true);
842 	put_online_cpus();
843 	memblock_free_early((unsigned long)info, sizeof(*info));
844 }
845 
smp_init_secondary(void)846 static void smp_init_secondary(void)
847 {
848 	int cpu = raw_smp_processor_id();
849 
850 	S390_lowcore.last_update_clock = get_tod_clock();
851 	restore_access_regs(S390_lowcore.access_regs_save_area);
852 	set_cpu_flag(CIF_ASCE_PRIMARY);
853 	set_cpu_flag(CIF_ASCE_SECONDARY);
854 	cpu_init();
855 	rcu_cpu_starting(cpu);
856 	preempt_disable();
857 	init_cpu_timer();
858 	vtime_init();
859 	pfault_init();
860 	notify_cpu_starting(smp_processor_id());
861 	if (topology_cpu_dedicated(cpu))
862 		set_cpu_flag(CIF_DEDICATED_CPU);
863 	else
864 		clear_cpu_flag(CIF_DEDICATED_CPU);
865 	set_cpu_online(smp_processor_id(), true);
866 	inc_irq_stat(CPU_RST);
867 	local_irq_enable();
868 	cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
869 }
870 
871 /*
872  *	Activate a secondary processor.
873  */
smp_start_secondary(void * cpuvoid)874 static void __no_sanitize_address smp_start_secondary(void *cpuvoid)
875 {
876 	S390_lowcore.restart_stack = (unsigned long) restart_stack;
877 	S390_lowcore.restart_fn = (unsigned long) do_restart;
878 	S390_lowcore.restart_data = 0;
879 	S390_lowcore.restart_source = -1UL;
880 	__ctl_load(S390_lowcore.cregs_save_area, 0, 15);
881 	__load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
882 	CALL_ON_STACK_NORETURN(smp_init_secondary, S390_lowcore.kernel_stack);
883 }
884 
885 /* Upping and downing of CPUs */
__cpu_up(unsigned int cpu,struct task_struct * tidle)886 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
887 {
888 	struct pcpu *pcpu = pcpu_devices + cpu;
889 	int rc;
890 
891 	if (pcpu->state != CPU_STATE_CONFIGURED)
892 		return -EIO;
893 	if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
894 	    SIGP_CC_ORDER_CODE_ACCEPTED)
895 		return -EIO;
896 
897 	rc = pcpu_alloc_lowcore(pcpu, cpu);
898 	if (rc)
899 		return rc;
900 	pcpu_prepare_secondary(pcpu, cpu);
901 	pcpu_attach_task(pcpu, tidle);
902 	pcpu_start_fn(pcpu, smp_start_secondary, NULL);
903 	/* Wait until cpu puts itself in the online & active maps */
904 	while (!cpu_online(cpu))
905 		cpu_relax();
906 	return 0;
907 }
908 
909 static unsigned int setup_possible_cpus __initdata;
910 
_setup_possible_cpus(char * s)911 static int __init _setup_possible_cpus(char *s)
912 {
913 	get_option(&s, &setup_possible_cpus);
914 	return 0;
915 }
916 early_param("possible_cpus", _setup_possible_cpus);
917 
__cpu_disable(void)918 int __cpu_disable(void)
919 {
920 	unsigned long cregs[16];
921 
922 	/* Handle possible pending IPIs */
923 	smp_handle_ext_call();
924 	set_cpu_online(smp_processor_id(), false);
925 	/* Disable pseudo page faults on this cpu. */
926 	pfault_fini();
927 	/* Disable interrupt sources via control register. */
928 	__ctl_store(cregs, 0, 15);
929 	cregs[0]  &= ~0x0000ee70UL;	/* disable all external interrupts */
930 	cregs[6]  &= ~0xff000000UL;	/* disable all I/O interrupts */
931 	cregs[14] &= ~0x1f000000UL;	/* disable most machine checks */
932 	__ctl_load(cregs, 0, 15);
933 	clear_cpu_flag(CIF_NOHZ_DELAY);
934 	return 0;
935 }
936 
__cpu_die(unsigned int cpu)937 void __cpu_die(unsigned int cpu)
938 {
939 	struct pcpu *pcpu;
940 
941 	/* Wait until target cpu is down */
942 	pcpu = pcpu_devices + cpu;
943 	while (!pcpu_stopped(pcpu))
944 		cpu_relax();
945 	pcpu_free_lowcore(pcpu);
946 	cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
947 	cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
948 }
949 
cpu_die(void)950 void __noreturn cpu_die(void)
951 {
952 	idle_task_exit();
953 	__bpon();
954 	pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
955 	for (;;) ;
956 }
957 
smp_fill_possible_mask(void)958 void __init smp_fill_possible_mask(void)
959 {
960 	unsigned int possible, sclp_max, cpu;
961 
962 	sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
963 	sclp_max = min(smp_max_threads, sclp_max);
964 	sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
965 	possible = setup_possible_cpus ?: nr_cpu_ids;
966 	possible = min(possible, sclp_max);
967 	for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
968 		set_cpu_possible(cpu, true);
969 }
970 
smp_prepare_cpus(unsigned int max_cpus)971 void __init smp_prepare_cpus(unsigned int max_cpus)
972 {
973 	/* request the 0x1201 emergency signal external interrupt */
974 	if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
975 		panic("Couldn't request external interrupt 0x1201");
976 	/* request the 0x1202 external call external interrupt */
977 	if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
978 		panic("Couldn't request external interrupt 0x1202");
979 }
980 
smp_prepare_boot_cpu(void)981 void __init smp_prepare_boot_cpu(void)
982 {
983 	struct pcpu *pcpu = pcpu_devices;
984 
985 	WARN_ON(!cpu_present(0) || !cpu_online(0));
986 	pcpu->state = CPU_STATE_CONFIGURED;
987 	pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
988 	S390_lowcore.percpu_offset = __per_cpu_offset[0];
989 	smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
990 }
991 
smp_cpus_done(unsigned int max_cpus)992 void __init smp_cpus_done(unsigned int max_cpus)
993 {
994 }
995 
smp_setup_processor_id(void)996 void __init smp_setup_processor_id(void)
997 {
998 	pcpu_devices[0].address = stap();
999 	S390_lowcore.cpu_nr = 0;
1000 	S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
1001 	S390_lowcore.spinlock_index = 0;
1002 }
1003 
1004 /*
1005  * the frequency of the profiling timer can be changed
1006  * by writing a multiplier value into /proc/profile.
1007  *
1008  * usually you want to run this on all CPUs ;)
1009  */
setup_profiling_timer(unsigned int multiplier)1010 int setup_profiling_timer(unsigned int multiplier)
1011 {
1012 	return 0;
1013 }
1014 
cpu_configure_show(struct device * dev,struct device_attribute * attr,char * buf)1015 static ssize_t cpu_configure_show(struct device *dev,
1016 				  struct device_attribute *attr, char *buf)
1017 {
1018 	ssize_t count;
1019 
1020 	mutex_lock(&smp_cpu_state_mutex);
1021 	count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
1022 	mutex_unlock(&smp_cpu_state_mutex);
1023 	return count;
1024 }
1025 
cpu_configure_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1026 static ssize_t cpu_configure_store(struct device *dev,
1027 				   struct device_attribute *attr,
1028 				   const char *buf, size_t count)
1029 {
1030 	struct pcpu *pcpu;
1031 	int cpu, val, rc, i;
1032 	char delim;
1033 
1034 	if (sscanf(buf, "%d %c", &val, &delim) != 1)
1035 		return -EINVAL;
1036 	if (val != 0 && val != 1)
1037 		return -EINVAL;
1038 	get_online_cpus();
1039 	mutex_lock(&smp_cpu_state_mutex);
1040 	rc = -EBUSY;
1041 	/* disallow configuration changes of online cpus and cpu 0 */
1042 	cpu = dev->id;
1043 	cpu = smp_get_base_cpu(cpu);
1044 	if (cpu == 0)
1045 		goto out;
1046 	for (i = 0; i <= smp_cpu_mtid; i++)
1047 		if (cpu_online(cpu + i))
1048 			goto out;
1049 	pcpu = pcpu_devices + cpu;
1050 	rc = 0;
1051 	switch (val) {
1052 	case 0:
1053 		if (pcpu->state != CPU_STATE_CONFIGURED)
1054 			break;
1055 		rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1056 		if (rc)
1057 			break;
1058 		for (i = 0; i <= smp_cpu_mtid; i++) {
1059 			if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1060 				continue;
1061 			pcpu[i].state = CPU_STATE_STANDBY;
1062 			smp_cpu_set_polarization(cpu + i,
1063 						 POLARIZATION_UNKNOWN);
1064 		}
1065 		topology_expect_change();
1066 		break;
1067 	case 1:
1068 		if (pcpu->state != CPU_STATE_STANDBY)
1069 			break;
1070 		rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1071 		if (rc)
1072 			break;
1073 		for (i = 0; i <= smp_cpu_mtid; i++) {
1074 			if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1075 				continue;
1076 			pcpu[i].state = CPU_STATE_CONFIGURED;
1077 			smp_cpu_set_polarization(cpu + i,
1078 						 POLARIZATION_UNKNOWN);
1079 		}
1080 		topology_expect_change();
1081 		break;
1082 	default:
1083 		break;
1084 	}
1085 out:
1086 	mutex_unlock(&smp_cpu_state_mutex);
1087 	put_online_cpus();
1088 	return rc ? rc : count;
1089 }
1090 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1091 
show_cpu_address(struct device * dev,struct device_attribute * attr,char * buf)1092 static ssize_t show_cpu_address(struct device *dev,
1093 				struct device_attribute *attr, char *buf)
1094 {
1095 	return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1096 }
1097 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1098 
1099 static struct attribute *cpu_common_attrs[] = {
1100 	&dev_attr_configure.attr,
1101 	&dev_attr_address.attr,
1102 	NULL,
1103 };
1104 
1105 static struct attribute_group cpu_common_attr_group = {
1106 	.attrs = cpu_common_attrs,
1107 };
1108 
1109 static struct attribute *cpu_online_attrs[] = {
1110 	&dev_attr_idle_count.attr,
1111 	&dev_attr_idle_time_us.attr,
1112 	NULL,
1113 };
1114 
1115 static struct attribute_group cpu_online_attr_group = {
1116 	.attrs = cpu_online_attrs,
1117 };
1118 
smp_cpu_online(unsigned int cpu)1119 static int smp_cpu_online(unsigned int cpu)
1120 {
1121 	struct device *s = &per_cpu(cpu_device, cpu)->dev;
1122 
1123 	return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1124 }
smp_cpu_pre_down(unsigned int cpu)1125 static int smp_cpu_pre_down(unsigned int cpu)
1126 {
1127 	struct device *s = &per_cpu(cpu_device, cpu)->dev;
1128 
1129 	sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1130 	return 0;
1131 }
1132 
smp_add_present_cpu(int cpu)1133 static int smp_add_present_cpu(int cpu)
1134 {
1135 	struct device *s;
1136 	struct cpu *c;
1137 	int rc;
1138 
1139 	c = kzalloc(sizeof(*c), GFP_KERNEL);
1140 	if (!c)
1141 		return -ENOMEM;
1142 	per_cpu(cpu_device, cpu) = c;
1143 	s = &c->dev;
1144 	c->hotpluggable = 1;
1145 	rc = register_cpu(c, cpu);
1146 	if (rc)
1147 		goto out;
1148 	rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1149 	if (rc)
1150 		goto out_cpu;
1151 	rc = topology_cpu_init(c);
1152 	if (rc)
1153 		goto out_topology;
1154 	return 0;
1155 
1156 out_topology:
1157 	sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1158 out_cpu:
1159 	unregister_cpu(c);
1160 out:
1161 	return rc;
1162 }
1163 
smp_rescan_cpus(void)1164 int __ref smp_rescan_cpus(void)
1165 {
1166 	struct sclp_core_info *info;
1167 	int nr;
1168 
1169 	info = kzalloc(sizeof(*info), GFP_KERNEL);
1170 	if (!info)
1171 		return -ENOMEM;
1172 	smp_get_core_info(info, 0);
1173 	get_online_cpus();
1174 	mutex_lock(&smp_cpu_state_mutex);
1175 	nr = __smp_rescan_cpus(info, false);
1176 	mutex_unlock(&smp_cpu_state_mutex);
1177 	put_online_cpus();
1178 	kfree(info);
1179 	if (nr)
1180 		topology_schedule_update();
1181 	return 0;
1182 }
1183 
rescan_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1184 static ssize_t __ref rescan_store(struct device *dev,
1185 				  struct device_attribute *attr,
1186 				  const char *buf,
1187 				  size_t count)
1188 {
1189 	int rc;
1190 
1191 	rc = lock_device_hotplug_sysfs();
1192 	if (rc)
1193 		return rc;
1194 	rc = smp_rescan_cpus();
1195 	unlock_device_hotplug();
1196 	return rc ? rc : count;
1197 }
1198 static DEVICE_ATTR_WO(rescan);
1199 
s390_smp_init(void)1200 static int __init s390_smp_init(void)
1201 {
1202 	int cpu, rc = 0;
1203 
1204 	rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1205 	if (rc)
1206 		return rc;
1207 	for_each_present_cpu(cpu) {
1208 		rc = smp_add_present_cpu(cpu);
1209 		if (rc)
1210 			goto out;
1211 	}
1212 
1213 	rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1214 			       smp_cpu_online, smp_cpu_pre_down);
1215 	rc = rc <= 0 ? rc : 0;
1216 out:
1217 	return rc;
1218 }
1219 subsys_initcall(s390_smp_init);
1220