1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Based on arch/arm/include/asm/processor.h
4 *
5 * Copyright (C) 1995-1999 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 */
8 #ifndef __ASM_PROCESSOR_H
9 #define __ASM_PROCESSOR_H
10
11 #define KERNEL_DS UL(-1)
12 #define USER_DS ((UL(1) << MAX_USER_VA_BITS) - 1)
13
14 /*
15 * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
16 * no point in shifting all network buffers by 2 bytes just to make some IP
17 * header fields appear aligned in memory, potentially sacrificing some DMA
18 * performance on some platforms.
19 */
20 #define NET_IP_ALIGN 0
21
22 #ifndef __ASSEMBLY__
23
24 #include <linux/build_bug.h>
25 #include <linux/cache.h>
26 #include <linux/init.h>
27 #include <linux/stddef.h>
28 #include <linux/string.h>
29 #include <linux/android_vendor.h>
30
31 #include <vdso/processor.h>
32
33 #include <asm/alternative.h>
34 #include <asm/cpufeature.h>
35 #include <asm/hw_breakpoint.h>
36 #include <asm/lse.h>
37 #include <asm/pgtable-hwdef.h>
38 #include <asm/pointer_auth.h>
39 #include <asm/ptrace.h>
40 #include <asm/types.h>
41
42 /*
43 * TASK_SIZE - the maximum size of a user space task.
44 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
45 */
46
47 #define DEFAULT_MAP_WINDOW_64 (UL(1) << VA_BITS_MIN)
48 #define TASK_SIZE_64 (UL(1) << vabits_actual)
49
50 #ifdef CONFIG_COMPAT
51 #if defined(CONFIG_ARM64_64K_PAGES) && defined(CONFIG_KUSER_HELPERS)
52 /*
53 * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
54 * by the compat vectors page.
55 */
56 #define TASK_SIZE_32 UL(0x100000000)
57 #else
58 #define TASK_SIZE_32 (UL(0x100000000) - PAGE_SIZE)
59 #endif /* CONFIG_ARM64_64K_PAGES */
60 #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
61 TASK_SIZE_32 : TASK_SIZE_64)
62 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
63 TASK_SIZE_32 : TASK_SIZE_64)
64 #define DEFAULT_MAP_WINDOW (test_thread_flag(TIF_32BIT) ? \
65 TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
66 #else
67 #define TASK_SIZE TASK_SIZE_64
68 #define DEFAULT_MAP_WINDOW DEFAULT_MAP_WINDOW_64
69 #endif /* CONFIG_COMPAT */
70
71 #ifdef CONFIG_ARM64_FORCE_52BIT
72 #define STACK_TOP_MAX TASK_SIZE_64
73 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4))
74 #else
75 #define STACK_TOP_MAX DEFAULT_MAP_WINDOW_64
76 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
77 #endif /* CONFIG_ARM64_FORCE_52BIT */
78
79 #ifdef CONFIG_COMPAT
80 #define AARCH32_VECTORS_BASE 0xffff0000
81 #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
82 AARCH32_VECTORS_BASE : STACK_TOP_MAX)
83 #else
84 #define STACK_TOP STACK_TOP_MAX
85 #endif /* CONFIG_COMPAT */
86
87 #ifndef CONFIG_ARM64_FORCE_52BIT
88 #define arch_get_mmap_end(addr) ((addr > DEFAULT_MAP_WINDOW) ? TASK_SIZE :\
89 DEFAULT_MAP_WINDOW)
90
91 #define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
92 base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
93 base)
94 #endif /* CONFIG_ARM64_FORCE_52BIT */
95
96 extern phys_addr_t arm64_dma_phys_limit;
97 #define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
98
99 struct debug_info {
100 #ifdef CONFIG_HAVE_HW_BREAKPOINT
101 /* Have we suspended stepping by a debugger? */
102 int suspended_step;
103 /* Allow breakpoints and watchpoints to be disabled for this thread. */
104 int bps_disabled;
105 int wps_disabled;
106 /* Hardware breakpoints pinned to this task. */
107 struct perf_event *hbp_break[ARM_MAX_BRP];
108 struct perf_event *hbp_watch[ARM_MAX_WRP];
109 #endif
110 };
111
112 struct cpu_context {
113 unsigned long x19;
114 unsigned long x20;
115 unsigned long x21;
116 unsigned long x22;
117 unsigned long x23;
118 unsigned long x24;
119 unsigned long x25;
120 unsigned long x26;
121 unsigned long x27;
122 unsigned long x28;
123 unsigned long fp;
124 unsigned long sp;
125 unsigned long pc;
126 };
127
128 struct thread_struct {
129 struct cpu_context cpu_context; /* cpu context */
130
131 /*
132 * Whitelisted fields for hardened usercopy:
133 * Maintainers must ensure manually that this contains no
134 * implicit padding.
135 */
136 struct {
137 unsigned long tp_value; /* TLS register */
138 unsigned long tp2_value;
139 struct user_fpsimd_state fpsimd_state;
140 } uw;
141
142 ANDROID_VENDOR_DATA(1);
143
144 unsigned int fpsimd_cpu;
145 void *sve_state; /* SVE registers, if any */
146 unsigned int sve_vl; /* SVE vector length */
147 unsigned int sve_vl_onexec; /* SVE vl after next exec */
148 unsigned long fault_address; /* fault info */
149 unsigned long fault_code; /* ESR_EL1 value */
150 struct debug_info debug; /* debugging */
151 #ifdef CONFIG_ARM64_PTR_AUTH
152 struct ptrauth_keys keys_user;
153 #endif
154 };
155
arch_thread_struct_whitelist(unsigned long * offset,unsigned long * size)156 static inline void arch_thread_struct_whitelist(unsigned long *offset,
157 unsigned long *size)
158 {
159 /* Verify that there is no padding among the whitelisted fields: */
160 BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
161 sizeof_field(struct thread_struct, uw.tp_value) +
162 sizeof_field(struct thread_struct, uw.tp2_value) +
163 sizeof_field(struct thread_struct, uw.fpsimd_state));
164
165 *offset = offsetof(struct thread_struct, uw);
166 *size = sizeof_field(struct thread_struct, uw);
167 }
168
169 #ifdef CONFIG_COMPAT
170 #define task_user_tls(t) \
171 ({ \
172 unsigned long *__tls; \
173 if (is_compat_thread(task_thread_info(t))) \
174 __tls = &(t)->thread.uw.tp2_value; \
175 else \
176 __tls = &(t)->thread.uw.tp_value; \
177 __tls; \
178 })
179 #else
180 #define task_user_tls(t) (&(t)->thread.uw.tp_value)
181 #endif
182
183 /* Sync TPIDR_EL0 back to thread_struct for current */
184 void tls_preserve_current_state(void);
185
186 #define INIT_THREAD { \
187 .fpsimd_cpu = NR_CPUS, \
188 }
189
start_thread_common(struct pt_regs * regs,unsigned long pc)190 static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
191 {
192 s32 previous_syscall = regs->syscallno;
193 memset(regs, 0, sizeof(*regs));
194 regs->syscallno = previous_syscall;
195 regs->pc = pc;
196
197 if (system_uses_irq_prio_masking())
198 regs->pmr_save = GIC_PRIO_IRQON;
199 }
200
set_ssbs_bit(struct pt_regs * regs)201 static inline void set_ssbs_bit(struct pt_regs *regs)
202 {
203 regs->pstate |= PSR_SSBS_BIT;
204 }
205
set_compat_ssbs_bit(struct pt_regs * regs)206 static inline void set_compat_ssbs_bit(struct pt_regs *regs)
207 {
208 regs->pstate |= PSR_AA32_SSBS_BIT;
209 }
210
start_thread(struct pt_regs * regs,unsigned long pc,unsigned long sp)211 static inline void start_thread(struct pt_regs *regs, unsigned long pc,
212 unsigned long sp)
213 {
214 start_thread_common(regs, pc);
215 regs->pstate = PSR_MODE_EL0t;
216
217 if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
218 set_ssbs_bit(regs);
219
220 regs->sp = sp;
221 }
222
223 #ifdef CONFIG_COMPAT
compat_start_thread(struct pt_regs * regs,unsigned long pc,unsigned long sp)224 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
225 unsigned long sp)
226 {
227 start_thread_common(regs, pc);
228 regs->pstate = PSR_AA32_MODE_USR;
229 if (pc & 1)
230 regs->pstate |= PSR_AA32_T_BIT;
231
232 #ifdef __AARCH64EB__
233 regs->pstate |= PSR_AA32_E_BIT;
234 #endif
235
236 if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
237 set_compat_ssbs_bit(regs);
238
239 regs->compat_sp = sp;
240 }
241 #endif
242
243 /* Forward declaration, a strange C thing */
244 struct task_struct;
245
246 /* Free all resources held by a thread. */
247 extern void release_thread(struct task_struct *);
248
249 unsigned long get_wchan(struct task_struct *p);
250
251 /* Thread switching */
252 extern struct task_struct *cpu_switch_to(struct task_struct *prev,
253 struct task_struct *next);
254
255 #define task_pt_regs(p) \
256 ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
257
258 #define KSTK_EIP(tsk) ((unsigned long)task_pt_regs(tsk)->pc)
259 #define KSTK_ESP(tsk) user_stack_pointer(task_pt_regs(tsk))
260
261 /*
262 * Prefetching support
263 */
264 #define ARCH_HAS_PREFETCH
prefetch(const void * ptr)265 static inline void prefetch(const void *ptr)
266 {
267 asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
268 }
269
270 #define ARCH_HAS_PREFETCHW
prefetchw(const void * ptr)271 static inline void prefetchw(const void *ptr)
272 {
273 asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
274 }
275
276 #define ARCH_HAS_SPINLOCK_PREFETCH
spin_lock_prefetch(const void * ptr)277 static inline void spin_lock_prefetch(const void *ptr)
278 {
279 asm volatile(ARM64_LSE_ATOMIC_INSN(
280 "prfm pstl1strm, %a0",
281 "nop") : : "p" (ptr));
282 }
283
284 extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
285 extern void __init minsigstksz_setup(void);
286
287 /*
288 * Not at the top of the file due to a direct #include cycle between
289 * <asm/fpsimd.h> and <asm/processor.h>. Deferring this #include
290 * ensures that contents of processor.h are visible to fpsimd.h even if
291 * processor.h is included first.
292 *
293 * These prctl helpers are the only things in this file that require
294 * fpsimd.h. The core code expects them to be in this header.
295 */
296 #include <asm/fpsimd.h>
297
298 /* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
299 #define SVE_SET_VL(arg) sve_set_current_vl(arg)
300 #define SVE_GET_VL() sve_get_current_vl()
301
302 /* PR_PAC_RESET_KEYS prctl */
303 #define PAC_RESET_KEYS(tsk, arg) ptrauth_prctl_reset_keys(tsk, arg)
304
305 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
306 /* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
307 long set_tagged_addr_ctrl(unsigned long arg);
308 long get_tagged_addr_ctrl(void);
309 #define SET_TAGGED_ADDR_CTRL(arg) set_tagged_addr_ctrl(arg)
310 #define GET_TAGGED_ADDR_CTRL() get_tagged_addr_ctrl()
311 #endif
312
313 /*
314 * For CONFIG_GCC_PLUGIN_STACKLEAK
315 *
316 * These need to be macros because otherwise we get stuck in a nightmare
317 * of header definitions for the use of task_stack_page.
318 */
319
320 #define current_top_of_stack() \
321 ({ \
322 struct stack_info _info; \
323 BUG_ON(!on_accessible_stack(current, current_stack_pointer, &_info)); \
324 _info.high; \
325 })
326 #define on_thread_stack() (on_task_stack(current, current_stack_pointer, NULL))
327
328 #endif /* __ASSEMBLY__ */
329 #endif /* __ASM_PROCESSOR_H */
330