1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Declarations of procedures and variables shared between files
4 * in arch/ppc/mm/.
5 *
6 * Derived from arch/ppc/mm/init.c:
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *
9 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
10 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
11 * Copyright (C) 1996 Paul Mackerras
12 *
13 * Derived from "arch/i386/mm/init.c"
14 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
15 */
16 #include <linux/mm.h>
17 #include <asm/mmu.h>
18
19 #ifdef CONFIG_PPC_MMU_NOHASH
20 #include <asm/trace.h>
21
22 /*
23 * On 40x and 8xx, we directly inline tlbia and tlbivax
24 */
25 #if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx)
_tlbil_all(void)26 static inline void _tlbil_all(void)
27 {
28 asm volatile ("sync; tlbia; isync" : : : "memory");
29 trace_tlbia(MMU_NO_CONTEXT);
30 }
_tlbil_pid(unsigned int pid)31 static inline void _tlbil_pid(unsigned int pid)
32 {
33 asm volatile ("sync; tlbia; isync" : : : "memory");
34 trace_tlbia(pid);
35 }
36 #define _tlbil_pid_noind(pid) _tlbil_pid(pid)
37
38 #else /* CONFIG_40x || CONFIG_PPC_8xx */
39 extern void _tlbil_all(void);
40 extern void _tlbil_pid(unsigned int pid);
41 #ifdef CONFIG_PPC_BOOK3E
42 extern void _tlbil_pid_noind(unsigned int pid);
43 #else
44 #define _tlbil_pid_noind(pid) _tlbil_pid(pid)
45 #endif
46 #endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */
47
48 /*
49 * On 8xx, we directly inline tlbie, on others, it's extern
50 */
51 #ifdef CONFIG_PPC_8xx
_tlbil_va(unsigned long address,unsigned int pid,unsigned int tsize,unsigned int ind)52 static inline void _tlbil_va(unsigned long address, unsigned int pid,
53 unsigned int tsize, unsigned int ind)
54 {
55 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
56 trace_tlbie(0, 0, address, pid, 0, 0, 0);
57 }
58 #elif defined(CONFIG_PPC_BOOK3E)
59 extern void _tlbil_va(unsigned long address, unsigned int pid,
60 unsigned int tsize, unsigned int ind);
61 #else
62 extern void __tlbil_va(unsigned long address, unsigned int pid);
_tlbil_va(unsigned long address,unsigned int pid,unsigned int tsize,unsigned int ind)63 static inline void _tlbil_va(unsigned long address, unsigned int pid,
64 unsigned int tsize, unsigned int ind)
65 {
66 __tlbil_va(address, pid);
67 }
68 #endif /* CONFIG_PPC_8xx */
69
70 #if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x)
71 extern void _tlbivax_bcast(unsigned long address, unsigned int pid,
72 unsigned int tsize, unsigned int ind);
73 #else
_tlbivax_bcast(unsigned long address,unsigned int pid,unsigned int tsize,unsigned int ind)74 static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
75 unsigned int tsize, unsigned int ind)
76 {
77 BUG();
78 }
79 #endif
80
print_system_hash_info(void)81 static inline void print_system_hash_info(void) {}
82
83 #else /* CONFIG_PPC_MMU_NOHASH */
84
85 extern void _tlbie(unsigned long address);
86 extern void _tlbia(void);
87
88 void print_system_hash_info(void);
89
90 #endif /* CONFIG_PPC_MMU_NOHASH */
91
92 #ifdef CONFIG_PPC32
93
94 void hash_preload(struct mm_struct *mm, unsigned long ea);
95
96 extern void mapin_ram(void);
97 extern void setbat(int index, unsigned long virt, phys_addr_t phys,
98 unsigned int size, pgprot_t prot);
99
100 extern int __map_without_bats;
101 extern unsigned int rtas_data, rtas_size;
102
103 struct hash_pte;
104 extern struct hash_pte *Hash;
105 extern u8 early_hash[];
106
107 #endif /* CONFIG_PPC32 */
108
109 extern unsigned long __max_low_memory;
110 extern phys_addr_t __initial_memory_limit_addr;
111 extern phys_addr_t total_memory;
112 extern phys_addr_t total_lowmem;
113 extern phys_addr_t memstart_addr;
114 extern phys_addr_t lowmem_end_addr;
115
116 #ifdef CONFIG_WII
117 extern unsigned long wii_hole_start;
118 extern unsigned long wii_hole_size;
119
120 extern unsigned long wii_mmu_mapin_mem2(unsigned long top);
121 extern void wii_memory_fixups(void);
122 #endif
123
124 /* ...and now those things that may be slightly different between processor
125 * architectures. -- Dan
126 */
127 #ifdef CONFIG_PPC32
128 extern void MMU_init_hw(void);
129 void MMU_init_hw_patch(void);
130 unsigned long mmu_mapin_ram(unsigned long base, unsigned long top);
131 #endif
132
133 #ifdef CONFIG_PPC_FSL_BOOK3E
134 extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
135 bool dryrun);
136 extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
137 phys_addr_t phys);
138 #ifdef CONFIG_PPC32
139 extern void adjust_total_lowmem(void);
140 extern int switch_to_as1(void);
141 extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
142 #endif
143 extern void loadcam_entry(unsigned int index);
144 extern void loadcam_multi(int first_idx, int num, int tmp_idx);
145
146 struct tlbcam {
147 u32 MAS0;
148 u32 MAS1;
149 unsigned long MAS2;
150 u32 MAS3;
151 u32 MAS7;
152 };
153 #endif
154
155 #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
156 /* 6xx have BATS */
157 /* FSL_BOOKE have TLBCAM */
158 /* 8xx have LTLB */
159 phys_addr_t v_block_mapped(unsigned long va);
160 unsigned long p_block_mapped(phys_addr_t pa);
161 #else
v_block_mapped(unsigned long va)162 static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
p_block_mapped(phys_addr_t pa)163 static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
164 #endif
165
166 #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx)
167 void mmu_mark_initmem_nx(void);
168 void mmu_mark_rodata_ro(void);
169 #else
mmu_mark_initmem_nx(void)170 static inline void mmu_mark_initmem_nx(void) { }
mmu_mark_rodata_ro(void)171 static inline void mmu_mark_rodata_ro(void) { }
172 #endif
173