1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * wm8974.c -- WM8974 ALSA Soc Audio driver
4 *
5 * Copyright 2006-2009 Wolfson Microelectronics PLC.
6 *
7 * Author: Liam Girdwood <Liam.Girdwood@wolfsonmicro.com>
8 */
9
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
14 #include <linux/pm.h>
15 #include <linux/i2c.h>
16 #include <linux/regmap.h>
17 #include <linux/slab.h>
18 #include <sound/core.h>
19 #include <sound/pcm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 #include <sound/initval.h>
23 #include <sound/tlv.h>
24
25 #include "wm8974.h"
26
27 struct wm8974_priv {
28 unsigned int mclk;
29 unsigned int fs;
30 };
31
32 static const struct reg_default wm8974_reg_defaults[] = {
33 { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 },
34 { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 },
35 { 8, 0x0000 }, { 9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff },
36 { 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff },
37 { 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c },
38 { 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 },
39 { 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 },
40 { 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 },
41 { 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 },
42 { 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 },
43 { 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 },
44 { 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 },
45 { 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 },
46 { 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 },
47 { 56, 0x0000 },
48 };
49
50 #define WM8974_POWER1_BIASEN 0x08
51 #define WM8974_POWER1_BUFIOEN 0x04
52
53 #define wm8974_reset(c) snd_soc_component_write(c, WM8974_RESET, 0)
54
55 static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
56 static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" };
57 static const char *wm8974_eqmode[] = {"Capture", "Playback" };
58 static const char *wm8974_bw[] = {"Narrow", "Wide" };
59 static const char *wm8974_eq1[] = {"80Hz", "105Hz", "135Hz", "175Hz" };
60 static const char *wm8974_eq2[] = {"230Hz", "300Hz", "385Hz", "500Hz" };
61 static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
62 static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
63 static const char *wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" };
64 static const char *wm8974_alc[] = {"ALC", "Limiter" };
65
66 static const struct soc_enum wm8974_enum[] = {
67 SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */
68 SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */
69 SOC_ENUM_SINGLE(WM8974_DAC, 4, 4, wm8974_deemp),
70 SOC_ENUM_SINGLE(WM8974_EQ1, 8, 2, wm8974_eqmode),
71
72 SOC_ENUM_SINGLE(WM8974_EQ1, 5, 4, wm8974_eq1),
73 SOC_ENUM_SINGLE(WM8974_EQ2, 8, 2, wm8974_bw),
74 SOC_ENUM_SINGLE(WM8974_EQ2, 5, 4, wm8974_eq2),
75 SOC_ENUM_SINGLE(WM8974_EQ3, 8, 2, wm8974_bw),
76
77 SOC_ENUM_SINGLE(WM8974_EQ3, 5, 4, wm8974_eq3),
78 SOC_ENUM_SINGLE(WM8974_EQ4, 8, 2, wm8974_bw),
79 SOC_ENUM_SINGLE(WM8974_EQ4, 5, 4, wm8974_eq4),
80 SOC_ENUM_SINGLE(WM8974_EQ5, 8, 2, wm8974_bw),
81
82 SOC_ENUM_SINGLE(WM8974_EQ5, 5, 4, wm8974_eq5),
83 SOC_ENUM_SINGLE(WM8974_ALC3, 8, 2, wm8974_alc),
84 };
85
86 static const char *wm8974_auxmode_text[] = { "Buffer", "Mixer" };
87
88 static SOC_ENUM_SINGLE_DECL(wm8974_auxmode,
89 WM8974_INPUT, 3, wm8974_auxmode_text);
90
91 static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
92 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
93 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
94 static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
95
96 static const struct snd_kcontrol_new wm8974_snd_controls[] = {
97
98 SOC_SINGLE("Digital Loopback Switch", WM8974_COMP, 0, 1, 0),
99
100 SOC_ENUM("DAC Companding", wm8974_enum[1]),
101 SOC_ENUM("ADC Companding", wm8974_enum[0]),
102
103 SOC_ENUM("Playback De-emphasis", wm8974_enum[2]),
104 SOC_SINGLE("DAC Inversion Switch", WM8974_DAC, 0, 1, 0),
105
106 SOC_SINGLE_TLV("PCM Volume", WM8974_DACVOL, 0, 255, 0, digital_tlv),
107
108 SOC_SINGLE("High Pass Filter Switch", WM8974_ADC, 8, 1, 0),
109 SOC_SINGLE("High Pass Cut Off", WM8974_ADC, 4, 7, 0),
110 SOC_SINGLE("ADC Inversion Switch", WM8974_ADC, 0, 1, 0),
111
112 SOC_SINGLE_TLV("Capture Volume", WM8974_ADCVOL, 0, 255, 0, digital_tlv),
113
114 SOC_ENUM("Equaliser Function", wm8974_enum[3]),
115 SOC_ENUM("EQ1 Cut Off", wm8974_enum[4]),
116 SOC_SINGLE_TLV("EQ1 Volume", WM8974_EQ1, 0, 24, 1, eq_tlv),
117
118 SOC_ENUM("Equaliser EQ2 Bandwidth", wm8974_enum[5]),
119 SOC_ENUM("EQ2 Cut Off", wm8974_enum[6]),
120 SOC_SINGLE_TLV("EQ2 Volume", WM8974_EQ2, 0, 24, 1, eq_tlv),
121
122 SOC_ENUM("Equaliser EQ3 Bandwidth", wm8974_enum[7]),
123 SOC_ENUM("EQ3 Cut Off", wm8974_enum[8]),
124 SOC_SINGLE_TLV("EQ3 Volume", WM8974_EQ3, 0, 24, 1, eq_tlv),
125
126 SOC_ENUM("Equaliser EQ4 Bandwidth", wm8974_enum[9]),
127 SOC_ENUM("EQ4 Cut Off", wm8974_enum[10]),
128 SOC_SINGLE_TLV("EQ4 Volume", WM8974_EQ4, 0, 24, 1, eq_tlv),
129
130 SOC_ENUM("Equaliser EQ5 Bandwidth", wm8974_enum[11]),
131 SOC_ENUM("EQ5 Cut Off", wm8974_enum[12]),
132 SOC_SINGLE_TLV("EQ5 Volume", WM8974_EQ5, 0, 24, 1, eq_tlv),
133
134 SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1, 8, 1, 0),
135 SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1, 4, 15, 0),
136 SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1, 0, 15, 0),
137
138 SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2, 4, 7, 0),
139 SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2, 0, 15, 0),
140
141 SOC_SINGLE("ALC Enable Switch", WM8974_ALC1, 8, 1, 0),
142 SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1, 3, 7, 0),
143 SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1, 0, 7, 0),
144
145 SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2, 8, 1, 0),
146 SOC_SINGLE("ALC Capture Hold", WM8974_ALC2, 4, 7, 0),
147 SOC_SINGLE("ALC Capture Target", WM8974_ALC2, 0, 15, 0),
148
149 SOC_ENUM("ALC Capture Mode", wm8974_enum[13]),
150 SOC_SINGLE("ALC Capture Decay", WM8974_ALC3, 4, 15, 0),
151 SOC_SINGLE("ALC Capture Attack", WM8974_ALC3, 0, 15, 0),
152
153 SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE, 3, 1, 0),
154 SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE, 0, 7, 0),
155
156 SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA, 7, 1, 0),
157 SOC_SINGLE_TLV("Capture PGA Volume", WM8974_INPPGA, 0, 63, 0, inpga_tlv),
158
159 SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL, 7, 1, 0),
160 SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL, 6, 1, 1),
161 SOC_SINGLE_TLV("Speaker Playback Volume", WM8974_SPKVOL, 0, 63, 0, spk_tlv),
162
163 SOC_ENUM("Aux Mode", wm8974_auxmode),
164
165 SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST, 8, 1, 0),
166 SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX, 6, 1, 1),
167
168 /* DAC / ADC oversampling */
169 SOC_SINGLE("DAC 128x Oversampling Switch", WM8974_DAC, 8, 1, 0),
170 SOC_SINGLE("ADC 128x Oversampling Switch", WM8974_ADC, 8, 1, 0),
171 };
172
173 /* Speaker Output Mixer */
174 static const struct snd_kcontrol_new wm8974_speaker_mixer_controls[] = {
175 SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX, 1, 1, 0),
176 SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX, 5, 1, 0),
177 SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX, 0, 1, 0),
178 };
179
180 /* Mono Output Mixer */
181 static const struct snd_kcontrol_new wm8974_mono_mixer_controls[] = {
182 SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX, 1, 1, 0),
183 SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX, 2, 1, 0),
184 SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 0),
185 };
186
187 /* Boost mixer */
188 static const struct snd_kcontrol_new wm8974_boost_mixer[] = {
189 SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 0),
190 };
191
192 /* Input PGA */
193 static const struct snd_kcontrol_new wm8974_inpga[] = {
194 SOC_DAPM_SINGLE("Aux Switch", WM8974_INPUT, 2, 1, 0),
195 SOC_DAPM_SINGLE("MicN Switch", WM8974_INPUT, 1, 1, 0),
196 SOC_DAPM_SINGLE("MicP Switch", WM8974_INPUT, 0, 1, 0),
197 };
198
199 /* AUX Input boost vol */
200 static const struct snd_kcontrol_new wm8974_aux_boost_controls =
201 SOC_DAPM_SINGLE("Aux Volume", WM8974_ADCBOOST, 0, 7, 0);
202
203 /* Mic Input boost vol */
204 static const struct snd_kcontrol_new wm8974_mic_boost_controls =
205 SOC_DAPM_SINGLE("Mic Volume", WM8974_ADCBOOST, 4, 7, 0);
206
207 static const struct snd_soc_dapm_widget wm8974_dapm_widgets[] = {
208 SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3, 2, 0,
209 &wm8974_speaker_mixer_controls[0],
210 ARRAY_SIZE(wm8974_speaker_mixer_controls)),
211 SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3, 3, 0,
212 &wm8974_mono_mixer_controls[0],
213 ARRAY_SIZE(wm8974_mono_mixer_controls)),
214 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3, 0, 0),
215 SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER2, 0, 0),
216 SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1, 6, 0, NULL, 0),
217 SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3, 5, 0, NULL, 0),
218 SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3, 6, 0, NULL, 0),
219 SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3, 7, 0, NULL, 0),
220
221 SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2, 2, 0, wm8974_inpga,
222 ARRAY_SIZE(wm8974_inpga)),
223 SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0,
224 wm8974_boost_mixer, ARRAY_SIZE(wm8974_boost_mixer)),
225
226 SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1, 4, 0, NULL, 0),
227
228 SND_SOC_DAPM_INPUT("MICN"),
229 SND_SOC_DAPM_INPUT("MICP"),
230 SND_SOC_DAPM_INPUT("AUX"),
231 SND_SOC_DAPM_OUTPUT("MONOOUT"),
232 SND_SOC_DAPM_OUTPUT("SPKOUTP"),
233 SND_SOC_DAPM_OUTPUT("SPKOUTN"),
234 };
235
236 static const struct snd_soc_dapm_route wm8974_dapm_routes[] = {
237 /* Mono output mixer */
238 {"Mono Mixer", "PCM Playback Switch", "DAC"},
239 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
240 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
241
242 /* Speaker output mixer */
243 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
244 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
245 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
246
247 /* Outputs */
248 {"Mono Out", NULL, "Mono Mixer"},
249 {"MONOOUT", NULL, "Mono Out"},
250 {"SpkN Out", NULL, "Speaker Mixer"},
251 {"SpkP Out", NULL, "Speaker Mixer"},
252 {"SPKOUTN", NULL, "SpkN Out"},
253 {"SPKOUTP", NULL, "SpkP Out"},
254
255 /* Boost Mixer */
256 {"ADC", NULL, "Boost Mixer"},
257 {"Boost Mixer", "Aux Switch", "Aux Input"},
258 {"Boost Mixer", NULL, "Input PGA"},
259 {"Boost Mixer", NULL, "MICP"},
260
261 /* Input PGA */
262 {"Input PGA", "Aux Switch", "Aux Input"},
263 {"Input PGA", "MicN Switch", "MICN"},
264 {"Input PGA", "MicP Switch", "MICP"},
265
266 /* Inputs */
267 {"Aux Input", NULL, "AUX"},
268 };
269
270 struct pll_ {
271 unsigned int pre_div:1;
272 unsigned int n:4;
273 unsigned int k;
274 };
275
276 /* The size in bits of the pll divide multiplied by 10
277 * to allow rounding later */
278 #define FIXED_PLL_SIZE ((1 << 24) * 10)
279
pll_factors(struct pll_ * pll_div,unsigned int target,unsigned int source)280 static void pll_factors(struct pll_ *pll_div,
281 unsigned int target, unsigned int source)
282 {
283 unsigned long long Kpart;
284 unsigned int K, Ndiv, Nmod;
285
286 /* There is a fixed divide by 4 in the output path */
287 target *= 4;
288
289 Ndiv = target / source;
290 if (Ndiv < 6) {
291 source /= 2;
292 pll_div->pre_div = 1;
293 Ndiv = target / source;
294 } else
295 pll_div->pre_div = 0;
296
297 if ((Ndiv < 6) || (Ndiv > 12))
298 printk(KERN_WARNING
299 "WM8974 N value %u outwith recommended range!\n",
300 Ndiv);
301
302 pll_div->n = Ndiv;
303 Nmod = target % source;
304 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
305
306 do_div(Kpart, source);
307
308 K = Kpart & 0xFFFFFFFF;
309
310 /* Check if we need to round */
311 if ((K % 10) >= 5)
312 K += 5;
313
314 /* Move down to proper range now rounding is done */
315 K /= 10;
316
317 pll_div->k = K;
318 }
319
wm8974_set_dai_pll(struct snd_soc_dai * codec_dai,int pll_id,int source,unsigned int freq_in,unsigned int freq_out)320 static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
321 int source, unsigned int freq_in, unsigned int freq_out)
322 {
323 struct snd_soc_component *component = codec_dai->component;
324 struct pll_ pll_div;
325 u16 reg;
326
327 if (freq_in == 0 || freq_out == 0) {
328 /* Clock CODEC directly from MCLK */
329 reg = snd_soc_component_read32(component, WM8974_CLOCK);
330 snd_soc_component_write(component, WM8974_CLOCK, reg & 0x0ff);
331
332 /* Turn off PLL */
333 reg = snd_soc_component_read32(component, WM8974_POWER1);
334 snd_soc_component_write(component, WM8974_POWER1, reg & 0x1df);
335 return 0;
336 }
337
338 pll_factors(&pll_div, freq_out, freq_in);
339
340 snd_soc_component_write(component, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
341 snd_soc_component_write(component, WM8974_PLLK1, pll_div.k >> 18);
342 snd_soc_component_write(component, WM8974_PLLK2, (pll_div.k >> 9) & 0x1ff);
343 snd_soc_component_write(component, WM8974_PLLK3, pll_div.k & 0x1ff);
344 reg = snd_soc_component_read32(component, WM8974_POWER1);
345 snd_soc_component_write(component, WM8974_POWER1, reg | 0x020);
346
347 /* Run CODEC from PLL instead of MCLK */
348 reg = snd_soc_component_read32(component, WM8974_CLOCK);
349 snd_soc_component_write(component, WM8974_CLOCK, reg | 0x100);
350
351 return 0;
352 }
353
354 /*
355 * Configure WM8974 clock dividers.
356 */
wm8974_set_dai_clkdiv(struct snd_soc_dai * codec_dai,int div_id,int div)357 static int wm8974_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
358 int div_id, int div)
359 {
360 struct snd_soc_component *component = codec_dai->component;
361 u16 reg;
362
363 switch (div_id) {
364 case WM8974_OPCLKDIV:
365 reg = snd_soc_component_read32(component, WM8974_GPIO) & 0x1cf;
366 snd_soc_component_write(component, WM8974_GPIO, reg | div);
367 break;
368 case WM8974_MCLKDIV:
369 reg = snd_soc_component_read32(component, WM8974_CLOCK) & 0x11f;
370 snd_soc_component_write(component, WM8974_CLOCK, reg | div);
371 break;
372 case WM8974_BCLKDIV:
373 reg = snd_soc_component_read32(component, WM8974_CLOCK) & 0x1e3;
374 snd_soc_component_write(component, WM8974_CLOCK, reg | div);
375 break;
376 default:
377 return -EINVAL;
378 }
379
380 return 0;
381 }
382
wm8974_get_mclkdiv(unsigned int f_in,unsigned int f_out,int * mclkdiv)383 static unsigned int wm8974_get_mclkdiv(unsigned int f_in, unsigned int f_out,
384 int *mclkdiv)
385 {
386 unsigned int ratio = 2 * f_in / f_out;
387
388 if (ratio <= 2) {
389 *mclkdiv = WM8974_MCLKDIV_1;
390 ratio = 2;
391 } else if (ratio == 3) {
392 *mclkdiv = WM8974_MCLKDIV_1_5;
393 } else if (ratio == 4) {
394 *mclkdiv = WM8974_MCLKDIV_2;
395 } else if (ratio <= 6) {
396 *mclkdiv = WM8974_MCLKDIV_3;
397 ratio = 6;
398 } else if (ratio <= 8) {
399 *mclkdiv = WM8974_MCLKDIV_4;
400 ratio = 8;
401 } else if (ratio <= 12) {
402 *mclkdiv = WM8974_MCLKDIV_6;
403 ratio = 12;
404 } else if (ratio <= 16) {
405 *mclkdiv = WM8974_MCLKDIV_8;
406 ratio = 16;
407 } else {
408 *mclkdiv = WM8974_MCLKDIV_12;
409 ratio = 24;
410 }
411
412 return f_out * ratio / 2;
413 }
414
wm8974_update_clocks(struct snd_soc_dai * dai)415 static int wm8974_update_clocks(struct snd_soc_dai *dai)
416 {
417 struct snd_soc_component *component = dai->component;
418 struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
419 unsigned int fs256;
420 unsigned int fpll = 0;
421 unsigned int f;
422 int mclkdiv;
423
424 if (!priv->mclk || !priv->fs)
425 return 0;
426
427 fs256 = 256 * priv->fs;
428
429 f = wm8974_get_mclkdiv(priv->mclk, fs256, &mclkdiv);
430
431 if (f != priv->mclk) {
432 /* The PLL performs best around 90MHz */
433 fpll = wm8974_get_mclkdiv(22500000, fs256, &mclkdiv);
434 }
435
436 wm8974_set_dai_pll(dai, 0, 0, priv->mclk, fpll);
437 wm8974_set_dai_clkdiv(dai, WM8974_MCLKDIV, mclkdiv);
438
439 return 0;
440 }
441
wm8974_set_dai_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)442 static int wm8974_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
443 unsigned int freq, int dir)
444 {
445 struct snd_soc_component *component = dai->component;
446 struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
447
448 if (dir != SND_SOC_CLOCK_IN)
449 return -EINVAL;
450
451 priv->mclk = freq;
452
453 return wm8974_update_clocks(dai);
454 }
455
wm8974_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)456 static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai,
457 unsigned int fmt)
458 {
459 struct snd_soc_component *component = codec_dai->component;
460 u16 iface = 0;
461 u16 clk = snd_soc_component_read32(component, WM8974_CLOCK) & 0x1fe;
462
463 /* set master/slave audio interface */
464 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
465 case SND_SOC_DAIFMT_CBM_CFM:
466 clk |= 0x0001;
467 break;
468 case SND_SOC_DAIFMT_CBS_CFS:
469 break;
470 default:
471 return -EINVAL;
472 }
473
474 /* interface format */
475 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
476 case SND_SOC_DAIFMT_I2S:
477 iface |= 0x0010;
478 break;
479 case SND_SOC_DAIFMT_RIGHT_J:
480 break;
481 case SND_SOC_DAIFMT_LEFT_J:
482 iface |= 0x0008;
483 break;
484 case SND_SOC_DAIFMT_DSP_A:
485 iface |= 0x00018;
486 break;
487 default:
488 return -EINVAL;
489 }
490
491 /* clock inversion */
492 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
493 case SND_SOC_DAIFMT_NB_NF:
494 break;
495 case SND_SOC_DAIFMT_IB_IF:
496 iface |= 0x0180;
497 break;
498 case SND_SOC_DAIFMT_IB_NF:
499 iface |= 0x0100;
500 break;
501 case SND_SOC_DAIFMT_NB_IF:
502 iface |= 0x0080;
503 break;
504 default:
505 return -EINVAL;
506 }
507
508 snd_soc_component_write(component, WM8974_IFACE, iface);
509 snd_soc_component_write(component, WM8974_CLOCK, clk);
510 return 0;
511 }
512
wm8974_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)513 static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream,
514 struct snd_pcm_hw_params *params,
515 struct snd_soc_dai *dai)
516 {
517 struct snd_soc_component *component = dai->component;
518 struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
519 u16 iface = snd_soc_component_read32(component, WM8974_IFACE) & 0x19f;
520 u16 adn = snd_soc_component_read32(component, WM8974_ADD) & 0x1f1;
521 int err;
522
523 priv->fs = params_rate(params);
524 err = wm8974_update_clocks(dai);
525 if (err)
526 return err;
527
528 /* bit size */
529 switch (params_width(params)) {
530 case 16:
531 break;
532 case 20:
533 iface |= 0x0020;
534 break;
535 case 24:
536 iface |= 0x0040;
537 break;
538 case 32:
539 iface |= 0x0060;
540 break;
541 }
542
543 /* filter coefficient */
544 switch (params_rate(params)) {
545 case 8000:
546 adn |= 0x5 << 1;
547 break;
548 case 11025:
549 adn |= 0x4 << 1;
550 break;
551 case 16000:
552 adn |= 0x3 << 1;
553 break;
554 case 22050:
555 adn |= 0x2 << 1;
556 break;
557 case 32000:
558 adn |= 0x1 << 1;
559 break;
560 case 44100:
561 case 48000:
562 break;
563 }
564
565 snd_soc_component_write(component, WM8974_IFACE, iface);
566 snd_soc_component_write(component, WM8974_ADD, adn);
567 return 0;
568 }
569
wm8974_mute(struct snd_soc_dai * dai,int mute)570 static int wm8974_mute(struct snd_soc_dai *dai, int mute)
571 {
572 struct snd_soc_component *component = dai->component;
573 u16 mute_reg = snd_soc_component_read32(component, WM8974_DAC) & 0xffbf;
574
575 if (mute)
576 snd_soc_component_write(component, WM8974_DAC, mute_reg | 0x40);
577 else
578 snd_soc_component_write(component, WM8974_DAC, mute_reg);
579 return 0;
580 }
581
582 /* liam need to make this lower power with dapm */
wm8974_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)583 static int wm8974_set_bias_level(struct snd_soc_component *component,
584 enum snd_soc_bias_level level)
585 {
586 u16 power1 = snd_soc_component_read32(component, WM8974_POWER1) & ~0x3;
587
588 switch (level) {
589 case SND_SOC_BIAS_ON:
590 case SND_SOC_BIAS_PREPARE:
591 power1 |= 0x1; /* VMID 50k */
592 snd_soc_component_write(component, WM8974_POWER1, power1);
593 break;
594
595 case SND_SOC_BIAS_STANDBY:
596 power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN;
597
598 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
599 regcache_sync(dev_get_regmap(component->dev, NULL));
600
601 /* Initial cap charge at VMID 5k */
602 snd_soc_component_write(component, WM8974_POWER1, power1 | 0x3);
603 mdelay(100);
604 }
605
606 power1 |= 0x2; /* VMID 500k */
607 snd_soc_component_write(component, WM8974_POWER1, power1);
608 break;
609
610 case SND_SOC_BIAS_OFF:
611 snd_soc_component_write(component, WM8974_POWER1, 0);
612 snd_soc_component_write(component, WM8974_POWER2, 0);
613 snd_soc_component_write(component, WM8974_POWER3, 0);
614 break;
615 }
616
617 return 0;
618 }
619
620 #define WM8974_RATES (SNDRV_PCM_RATE_8000_48000)
621
622 #define WM8974_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
623 SNDRV_PCM_FMTBIT_S24_LE)
624
625 static const struct snd_soc_dai_ops wm8974_ops = {
626 .hw_params = wm8974_pcm_hw_params,
627 .digital_mute = wm8974_mute,
628 .set_fmt = wm8974_set_dai_fmt,
629 .set_clkdiv = wm8974_set_dai_clkdiv,
630 .set_pll = wm8974_set_dai_pll,
631 .set_sysclk = wm8974_set_dai_sysclk,
632 };
633
634 static struct snd_soc_dai_driver wm8974_dai = {
635 .name = "wm8974-hifi",
636 .playback = {
637 .stream_name = "Playback",
638 .channels_min = 1,
639 .channels_max = 2, /* Only 1 channel of data */
640 .rates = WM8974_RATES,
641 .formats = WM8974_FORMATS,},
642 .capture = {
643 .stream_name = "Capture",
644 .channels_min = 1,
645 .channels_max = 2, /* Only 1 channel of data */
646 .rates = WM8974_RATES,
647 .formats = WM8974_FORMATS,},
648 .ops = &wm8974_ops,
649 .symmetric_rates = 1,
650 };
651
652 static const struct regmap_config wm8974_regmap = {
653 .reg_bits = 7,
654 .val_bits = 9,
655
656 .max_register = WM8974_MONOMIX,
657 .reg_defaults = wm8974_reg_defaults,
658 .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults),
659 .cache_type = REGCACHE_FLAT,
660 };
661
wm8974_probe(struct snd_soc_component * component)662 static int wm8974_probe(struct snd_soc_component *component)
663 {
664 int ret = 0;
665
666 ret = wm8974_reset(component);
667 if (ret < 0) {
668 dev_err(component->dev, "Failed to issue reset\n");
669 return ret;
670 }
671
672 return 0;
673 }
674
675 static const struct snd_soc_component_driver soc_component_dev_wm8974 = {
676 .probe = wm8974_probe,
677 .set_bias_level = wm8974_set_bias_level,
678 .controls = wm8974_snd_controls,
679 .num_controls = ARRAY_SIZE(wm8974_snd_controls),
680 .dapm_widgets = wm8974_dapm_widgets,
681 .num_dapm_widgets = ARRAY_SIZE(wm8974_dapm_widgets),
682 .dapm_routes = wm8974_dapm_routes,
683 .num_dapm_routes = ARRAY_SIZE(wm8974_dapm_routes),
684 .suspend_bias_off = 1,
685 .idle_bias_on = 1,
686 .use_pmdown_time = 1,
687 .endianness = 1,
688 .non_legacy_dai_naming = 1,
689 };
690
wm8974_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)691 static int wm8974_i2c_probe(struct i2c_client *i2c,
692 const struct i2c_device_id *id)
693 {
694 struct wm8974_priv *priv;
695 struct regmap *regmap;
696 int ret;
697
698 priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
699 if (!priv)
700 return -ENOMEM;
701
702 i2c_set_clientdata(i2c, priv);
703
704 regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap);
705 if (IS_ERR(regmap))
706 return PTR_ERR(regmap);
707
708 ret = devm_snd_soc_register_component(&i2c->dev,
709 &soc_component_dev_wm8974, &wm8974_dai, 1);
710
711 return ret;
712 }
713
714 static const struct i2c_device_id wm8974_i2c_id[] = {
715 { "wm8974", 0 },
716 { }
717 };
718 MODULE_DEVICE_TABLE(i2c, wm8974_i2c_id);
719
720 static const struct of_device_id wm8974_of_match[] = {
721 { .compatible = "wlf,wm8974", },
722 { }
723 };
724 MODULE_DEVICE_TABLE(of, wm8974_of_match);
725
726 static struct i2c_driver wm8974_i2c_driver = {
727 .driver = {
728 .name = "wm8974",
729 .of_match_table = wm8974_of_match,
730 },
731 .probe = wm8974_i2c_probe,
732 .id_table = wm8974_i2c_id,
733 };
734
735 module_i2c_driver(wm8974_i2c_driver);
736
737 MODULE_DESCRIPTION("ASoC WM8974 driver");
738 MODULE_AUTHOR("Liam Girdwood");
739 MODULE_LICENSE("GPL");
740