• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree Source for the R-Car H2 (R8A77900) SoC
4  *
5  * Copyright (C) 2015 Renesas Electronics Corporation
6  * Copyright (C) 2013-2014 Renesas Solutions Corp.
7  * Copyright (C) 2014 Cogent Embedded Inc.
8  */
9 
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
14 
15 / {
16 	compatible = "renesas,r8a7790";
17 	#address-cells = <2>;
18 	#size-cells = <2>;
19 
20 	aliases {
21 		i2c0 = &i2c0;
22 		i2c1 = &i2c1;
23 		i2c2 = &i2c2;
24 		i2c3 = &i2c3;
25 		i2c4 = &iic0;
26 		i2c5 = &iic1;
27 		i2c6 = &iic2;
28 		i2c7 = &iic3;
29 		spi0 = &qspi;
30 		spi1 = &msiof0;
31 		spi2 = &msiof1;
32 		spi3 = &msiof2;
33 		spi4 = &msiof3;
34 		vin0 = &vin0;
35 		vin1 = &vin1;
36 		vin2 = &vin2;
37 		vin3 = &vin3;
38 	};
39 
40 	/*
41 	 * The external audio clocks are configured as 0 Hz fixed frequency
42 	 * clocks by default.
43 	 * Boards that provide audio clocks should override them.
44 	 */
45 	audio_clk_a: audio_clk_a {
46 		compatible = "fixed-clock";
47 		#clock-cells = <0>;
48 		clock-frequency = <0>;
49 	};
50 	audio_clk_b: audio_clk_b {
51 		compatible = "fixed-clock";
52 		#clock-cells = <0>;
53 		clock-frequency = <0>;
54 	};
55 	audio_clk_c: audio_clk_c {
56 		compatible = "fixed-clock";
57 		#clock-cells = <0>;
58 		clock-frequency = <0>;
59 	};
60 
61 	/* External CAN clock */
62 	can_clk: can {
63 		compatible = "fixed-clock";
64 		#clock-cells = <0>;
65 		/* This value must be overridden by the board. */
66 		clock-frequency = <0>;
67 	};
68 
69 	cpus {
70 		#address-cells = <1>;
71 		#size-cells = <0>;
72 		enable-method = "renesas,apmu";
73 
74 		cpu0: cpu@0 {
75 			device_type = "cpu";
76 			compatible = "arm,cortex-a15";
77 			reg = <0>;
78 			clock-frequency = <1300000000>;
79 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
80 			power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
81 			next-level-cache = <&L2_CA15>;
82 			capacity-dmips-mhz = <1024>;
83 			voltage-tolerance = <1>; /* 1% */
84 			clock-latency = <300000>; /* 300 us */
85 
86 			/* kHz - uV - OPPs unknown yet */
87 			operating-points = <1400000 1000000>,
88 					   <1225000 1000000>,
89 					   <1050000 1000000>,
90 					   < 875000 1000000>,
91 					   < 700000 1000000>,
92 					   < 350000 1000000>;
93 		};
94 
95 		cpu1: cpu@1 {
96 			device_type = "cpu";
97 			compatible = "arm,cortex-a15";
98 			reg = <1>;
99 			clock-frequency = <1300000000>;
100 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
101 			power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
102 			next-level-cache = <&L2_CA15>;
103 			capacity-dmips-mhz = <1024>;
104 			voltage-tolerance = <1>; /* 1% */
105 			clock-latency = <300000>; /* 300 us */
106 
107 			/* kHz - uV - OPPs unknown yet */
108 			operating-points = <1400000 1000000>,
109 					   <1225000 1000000>,
110 					   <1050000 1000000>,
111 					   < 875000 1000000>,
112 					   < 700000 1000000>,
113 					   < 350000 1000000>;
114 		};
115 
116 		cpu2: cpu@2 {
117 			device_type = "cpu";
118 			compatible = "arm,cortex-a15";
119 			reg = <2>;
120 			clock-frequency = <1300000000>;
121 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
122 			power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
123 			next-level-cache = <&L2_CA15>;
124 			capacity-dmips-mhz = <1024>;
125 			voltage-tolerance = <1>; /* 1% */
126 			clock-latency = <300000>; /* 300 us */
127 
128 			/* kHz - uV - OPPs unknown yet */
129 			operating-points = <1400000 1000000>,
130 					   <1225000 1000000>,
131 					   <1050000 1000000>,
132 					   < 875000 1000000>,
133 					   < 700000 1000000>,
134 					   < 350000 1000000>;
135 		};
136 
137 		cpu3: cpu@3 {
138 			device_type = "cpu";
139 			compatible = "arm,cortex-a15";
140 			reg = <3>;
141 			clock-frequency = <1300000000>;
142 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
143 			power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
144 			next-level-cache = <&L2_CA15>;
145 			capacity-dmips-mhz = <1024>;
146 			voltage-tolerance = <1>; /* 1% */
147 			clock-latency = <300000>; /* 300 us */
148 
149 			/* kHz - uV - OPPs unknown yet */
150 			operating-points = <1400000 1000000>,
151 					   <1225000 1000000>,
152 					   <1050000 1000000>,
153 					   < 875000 1000000>,
154 					   < 700000 1000000>,
155 					   < 350000 1000000>;
156 		};
157 
158 		cpu4: cpu@100 {
159 			device_type = "cpu";
160 			compatible = "arm,cortex-a7";
161 			reg = <0x100>;
162 			clock-frequency = <780000000>;
163 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
164 			power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
165 			next-level-cache = <&L2_CA7>;
166 			capacity-dmips-mhz = <539>;
167 		};
168 
169 		cpu5: cpu@101 {
170 			device_type = "cpu";
171 			compatible = "arm,cortex-a7";
172 			reg = <0x101>;
173 			clock-frequency = <780000000>;
174 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
175 			power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
176 			next-level-cache = <&L2_CA7>;
177 			capacity-dmips-mhz = <539>;
178 		};
179 
180 		cpu6: cpu@102 {
181 			device_type = "cpu";
182 			compatible = "arm,cortex-a7";
183 			reg = <0x102>;
184 			clock-frequency = <780000000>;
185 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
186 			power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
187 			next-level-cache = <&L2_CA7>;
188 			capacity-dmips-mhz = <539>;
189 		};
190 
191 		cpu7: cpu@103 {
192 			device_type = "cpu";
193 			compatible = "arm,cortex-a7";
194 			reg = <0x103>;
195 			clock-frequency = <780000000>;
196 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
197 			power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
198 			next-level-cache = <&L2_CA7>;
199 			capacity-dmips-mhz = <539>;
200 		};
201 
202 		L2_CA15: cache-controller-0 {
203 			compatible = "cache";
204 			power-domains = <&sysc R8A7790_PD_CA15_SCU>;
205 			cache-unified;
206 			cache-level = <2>;
207 		};
208 
209 		L2_CA7: cache-controller-1 {
210 			compatible = "cache";
211 			power-domains = <&sysc R8A7790_PD_CA7_SCU>;
212 			cache-unified;
213 			cache-level = <2>;
214 		};
215 	};
216 
217 	/* External root clock */
218 	extal_clk: extal {
219 		compatible = "fixed-clock";
220 		#clock-cells = <0>;
221 		/* This value must be overridden by the board. */
222 		clock-frequency = <0>;
223 	};
224 
225 	/* External PCIe clock - can be overridden by the board */
226 	pcie_bus_clk: pcie_bus {
227 		compatible = "fixed-clock";
228 		#clock-cells = <0>;
229 		clock-frequency = <0>;
230 	};
231 
232 	pmu-0 {
233 		compatible = "arm,cortex-a15-pmu";
234 		interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
235 				      <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
236 				      <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
237 				      <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
238 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
239 	};
240 
241 	pmu-1 {
242 		compatible = "arm,cortex-a7-pmu";
243 		interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
244 				      <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
245 				      <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
246 				      <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
247 		interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
248 	};
249 
250 	/* External SCIF clock */
251 	scif_clk: scif {
252 		compatible = "fixed-clock";
253 		#clock-cells = <0>;
254 		/* This value must be overridden by the board. */
255 		clock-frequency = <0>;
256 	};
257 
258 	soc {
259 		compatible = "simple-bus";
260 		interrupt-parent = <&gic>;
261 
262 		#address-cells = <2>;
263 		#size-cells = <2>;
264 		ranges;
265 
266 		rwdt: watchdog@e6020000 {
267 			compatible = "renesas,r8a7790-wdt",
268 				     "renesas,rcar-gen2-wdt";
269 			reg = <0 0xe6020000 0 0x0c>;
270 			clocks = <&cpg CPG_MOD 402>;
271 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
272 			resets = <&cpg 402>;
273 			status = "disabled";
274 		};
275 
276 		gpio0: gpio@e6050000 {
277 			compatible = "renesas,gpio-r8a7790",
278 				     "renesas,rcar-gen2-gpio";
279 			reg = <0 0xe6050000 0 0x50>;
280 			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
281 			#gpio-cells = <2>;
282 			gpio-controller;
283 			gpio-ranges = <&pfc 0 0 32>;
284 			#interrupt-cells = <2>;
285 			interrupt-controller;
286 			clocks = <&cpg CPG_MOD 912>;
287 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
288 			resets = <&cpg 912>;
289 		};
290 
291 		gpio1: gpio@e6051000 {
292 			compatible = "renesas,gpio-r8a7790",
293 				     "renesas,rcar-gen2-gpio";
294 			reg = <0 0xe6051000 0 0x50>;
295 			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
296 			#gpio-cells = <2>;
297 			gpio-controller;
298 			gpio-ranges = <&pfc 0 32 30>;
299 			#interrupt-cells = <2>;
300 			interrupt-controller;
301 			clocks = <&cpg CPG_MOD 911>;
302 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
303 			resets = <&cpg 911>;
304 		};
305 
306 		gpio2: gpio@e6052000 {
307 			compatible = "renesas,gpio-r8a7790",
308 				     "renesas,rcar-gen2-gpio";
309 			reg = <0 0xe6052000 0 0x50>;
310 			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
311 			#gpio-cells = <2>;
312 			gpio-controller;
313 			gpio-ranges = <&pfc 0 64 30>;
314 			#interrupt-cells = <2>;
315 			interrupt-controller;
316 			clocks = <&cpg CPG_MOD 910>;
317 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
318 			resets = <&cpg 910>;
319 		};
320 
321 		gpio3: gpio@e6053000 {
322 			compatible = "renesas,gpio-r8a7790",
323 				     "renesas,rcar-gen2-gpio";
324 			reg = <0 0xe6053000 0 0x50>;
325 			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
326 			#gpio-cells = <2>;
327 			gpio-controller;
328 			gpio-ranges = <&pfc 0 96 32>;
329 			#interrupt-cells = <2>;
330 			interrupt-controller;
331 			clocks = <&cpg CPG_MOD 909>;
332 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
333 			resets = <&cpg 909>;
334 		};
335 
336 		gpio4: gpio@e6054000 {
337 			compatible = "renesas,gpio-r8a7790",
338 				     "renesas,rcar-gen2-gpio";
339 			reg = <0 0xe6054000 0 0x50>;
340 			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
341 			#gpio-cells = <2>;
342 			gpio-controller;
343 			gpio-ranges = <&pfc 0 128 32>;
344 			#interrupt-cells = <2>;
345 			interrupt-controller;
346 			clocks = <&cpg CPG_MOD 908>;
347 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
348 			resets = <&cpg 908>;
349 		};
350 
351 		gpio5: gpio@e6055000 {
352 			compatible = "renesas,gpio-r8a7790",
353 				     "renesas,rcar-gen2-gpio";
354 			reg = <0 0xe6055000 0 0x50>;
355 			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
356 			#gpio-cells = <2>;
357 			gpio-controller;
358 			gpio-ranges = <&pfc 0 160 32>;
359 			#interrupt-cells = <2>;
360 			interrupt-controller;
361 			clocks = <&cpg CPG_MOD 907>;
362 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
363 			resets = <&cpg 907>;
364 		};
365 
366 		pfc: pin-controller@e6060000 {
367 			compatible = "renesas,pfc-r8a7790";
368 			reg = <0 0xe6060000 0 0x250>;
369 		};
370 
371 		cpg: clock-controller@e6150000 {
372 			compatible = "renesas,r8a7790-cpg-mssr";
373 			reg = <0 0xe6150000 0 0x1000>;
374 			clocks = <&extal_clk>, <&usb_extal_clk>;
375 			clock-names = "extal", "usb_extal";
376 			#clock-cells = <2>;
377 			#power-domain-cells = <0>;
378 			#reset-cells = <1>;
379 		};
380 
381 		apmu@e6151000 {
382 			compatible = "renesas,r8a7790-apmu", "renesas,apmu";
383 			reg = <0 0xe6151000 0 0x188>;
384 			cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
385 		};
386 
387 		apmu@e6152000 {
388 			compatible = "renesas,r8a7790-apmu", "renesas,apmu";
389 			reg = <0 0xe6152000 0 0x188>;
390 			cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
391 		};
392 
393 		rst: reset-controller@e6160000 {
394 			compatible = "renesas,r8a7790-rst";
395 			reg = <0 0xe6160000 0 0x0100>;
396 		};
397 
398 		sysc: system-controller@e6180000 {
399 			compatible = "renesas,r8a7790-sysc";
400 			reg = <0 0xe6180000 0 0x0200>;
401 			#power-domain-cells = <1>;
402 		};
403 
404 		irqc0: interrupt-controller@e61c0000 {
405 			compatible = "renesas,irqc-r8a7790", "renesas,irqc";
406 			#interrupt-cells = <2>;
407 			interrupt-controller;
408 			reg = <0 0xe61c0000 0 0x200>;
409 			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
410 				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
411 				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
412 				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
413 			clocks = <&cpg CPG_MOD 407>;
414 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
415 			resets = <&cpg 407>;
416 		};
417 
418 		thermal: thermal@e61f0000 {
419 			compatible = "renesas,thermal-r8a7790",
420 				     "renesas,rcar-gen2-thermal",
421 				     "renesas,rcar-thermal";
422 			reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
423 			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 			clocks = <&cpg CPG_MOD 522>;
425 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
426 			resets = <&cpg 522>;
427 			#thermal-sensor-cells = <0>;
428 		};
429 
430 		ipmmu_sy0: iommu@e6280000 {
431 			compatible = "renesas,ipmmu-r8a7790",
432 				     "renesas,ipmmu-vmsa";
433 			reg = <0 0xe6280000 0 0x1000>;
434 			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
435 				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
436 			#iommu-cells = <1>;
437 			status = "disabled";
438 		};
439 
440 		ipmmu_sy1: iommu@e6290000 {
441 			compatible = "renesas,ipmmu-r8a7790",
442 				     "renesas,ipmmu-vmsa";
443 			reg = <0 0xe6290000 0 0x1000>;
444 			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
445 			#iommu-cells = <1>;
446 			status = "disabled";
447 		};
448 
449 		ipmmu_ds: iommu@e6740000 {
450 			compatible = "renesas,ipmmu-r8a7790",
451 				     "renesas,ipmmu-vmsa";
452 			reg = <0 0xe6740000 0 0x1000>;
453 			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
454 				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
455 			#iommu-cells = <1>;
456 			status = "disabled";
457 		};
458 
459 		ipmmu_mp: iommu@ec680000 {
460 			compatible = "renesas,ipmmu-r8a7790",
461 				     "renesas,ipmmu-vmsa";
462 			reg = <0 0xec680000 0 0x1000>;
463 			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
464 			#iommu-cells = <1>;
465 			status = "disabled";
466 		};
467 
468 		ipmmu_mx: iommu@fe951000 {
469 			compatible = "renesas,ipmmu-r8a7790",
470 				     "renesas,ipmmu-vmsa";
471 			reg = <0 0xfe951000 0 0x1000>;
472 			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
473 				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
474 			#iommu-cells = <1>;
475 			status = "disabled";
476 		};
477 
478 		ipmmu_rt: iommu@ffc80000 {
479 			compatible = "renesas,ipmmu-r8a7790",
480 				     "renesas,ipmmu-vmsa";
481 			reg = <0 0xffc80000 0 0x1000>;
482 			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
483 			#iommu-cells = <1>;
484 			status = "disabled";
485 		};
486 
487 		icram0:	sram@e63a0000 {
488 			compatible = "mmio-sram";
489 			reg = <0 0xe63a0000 0 0x12000>;
490 		};
491 
492 		icram1:	sram@e63c0000 {
493 			compatible = "mmio-sram";
494 			reg = <0 0xe63c0000 0 0x1000>;
495 			#address-cells = <1>;
496 			#size-cells = <1>;
497 			ranges = <0 0 0xe63c0000 0x1000>;
498 
499 			smp-sram@0 {
500 				compatible = "renesas,smp-sram";
501 				reg = <0 0x100>;
502 			};
503 		};
504 
505 		i2c0: i2c@e6508000 {
506 			#address-cells = <1>;
507 			#size-cells = <0>;
508 			compatible = "renesas,i2c-r8a7790",
509 				     "renesas,rcar-gen2-i2c";
510 			reg = <0 0xe6508000 0 0x40>;
511 			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
512 			clocks = <&cpg CPG_MOD 931>;
513 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
514 			resets = <&cpg 931>;
515 			i2c-scl-internal-delay-ns = <110>;
516 			status = "disabled";
517 		};
518 
519 		i2c1: i2c@e6518000 {
520 			#address-cells = <1>;
521 			#size-cells = <0>;
522 			compatible = "renesas,i2c-r8a7790",
523 				     "renesas,rcar-gen2-i2c";
524 			reg = <0 0xe6518000 0 0x40>;
525 			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
526 			clocks = <&cpg CPG_MOD 930>;
527 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
528 			resets = <&cpg 930>;
529 			i2c-scl-internal-delay-ns = <6>;
530 			status = "disabled";
531 		};
532 
533 		i2c2: i2c@e6530000 {
534 			#address-cells = <1>;
535 			#size-cells = <0>;
536 			compatible = "renesas,i2c-r8a7790",
537 				     "renesas,rcar-gen2-i2c";
538 			reg = <0 0xe6530000 0 0x40>;
539 			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
540 			clocks = <&cpg CPG_MOD 929>;
541 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
542 			resets = <&cpg 929>;
543 			i2c-scl-internal-delay-ns = <6>;
544 			status = "disabled";
545 		};
546 
547 		i2c3: i2c@e6540000 {
548 			#address-cells = <1>;
549 			#size-cells = <0>;
550 			compatible = "renesas,i2c-r8a7790",
551 				     "renesas,rcar-gen2-i2c";
552 			reg = <0 0xe6540000 0 0x40>;
553 			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
554 			clocks = <&cpg CPG_MOD 928>;
555 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
556 			resets = <&cpg 928>;
557 			i2c-scl-internal-delay-ns = <110>;
558 			status = "disabled";
559 		};
560 
561 		iic0: i2c@e6500000 {
562 			#address-cells = <1>;
563 			#size-cells = <0>;
564 			compatible = "renesas,iic-r8a7790",
565 				     "renesas,rcar-gen2-iic",
566 				     "renesas,rmobile-iic";
567 			reg = <0 0xe6500000 0 0x425>;
568 			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
569 			clocks = <&cpg CPG_MOD 318>;
570 			dmas = <&dmac0 0x61>, <&dmac0 0x62>,
571 			       <&dmac1 0x61>, <&dmac1 0x62>;
572 			dma-names = "tx", "rx", "tx", "rx";
573 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
574 			resets = <&cpg 318>;
575 			status = "disabled";
576 		};
577 
578 		iic1: i2c@e6510000 {
579 			#address-cells = <1>;
580 			#size-cells = <0>;
581 			compatible = "renesas,iic-r8a7790",
582 				     "renesas,rcar-gen2-iic",
583 				     "renesas,rmobile-iic";
584 			reg = <0 0xe6510000 0 0x425>;
585 			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
586 			clocks = <&cpg CPG_MOD 323>;
587 			dmas = <&dmac0 0x65>, <&dmac0 0x66>,
588 			       <&dmac1 0x65>, <&dmac1 0x66>;
589 			dma-names = "tx", "rx", "tx", "rx";
590 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
591 			resets = <&cpg 323>;
592 			status = "disabled";
593 		};
594 
595 		iic2: i2c@e6520000 {
596 			#address-cells = <1>;
597 			#size-cells = <0>;
598 			compatible = "renesas,iic-r8a7790",
599 				     "renesas,rcar-gen2-iic",
600 				     "renesas,rmobile-iic";
601 			reg = <0 0xe6520000 0 0x425>;
602 			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
603 			clocks = <&cpg CPG_MOD 300>;
604 			dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
605 			       <&dmac1 0x69>, <&dmac1 0x6a>;
606 			dma-names = "tx", "rx", "tx", "rx";
607 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
608 			resets = <&cpg 300>;
609 			status = "disabled";
610 		};
611 
612 		iic3: i2c@e60b0000 {
613 			#address-cells = <1>;
614 			#size-cells = <0>;
615 			compatible = "renesas,iic-r8a7790",
616 				     "renesas,rcar-gen2-iic",
617 				     "renesas,rmobile-iic";
618 			reg = <0 0xe60b0000 0 0x425>;
619 			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
620 			clocks = <&cpg CPG_MOD 926>;
621 			dmas = <&dmac0 0x77>, <&dmac0 0x78>,
622 			       <&dmac1 0x77>, <&dmac1 0x78>;
623 			dma-names = "tx", "rx", "tx", "rx";
624 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
625 			resets = <&cpg 926>;
626 			status = "disabled";
627 		};
628 
629 		hsusb: usb@e6590000 {
630 			compatible = "renesas,usbhs-r8a7790",
631 				     "renesas,rcar-gen2-usbhs";
632 			reg = <0 0xe6590000 0 0x100>;
633 			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
634 			clocks = <&cpg CPG_MOD 704>;
635 			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
636 			       <&usb_dmac1 0>, <&usb_dmac1 1>;
637 			dma-names = "ch0", "ch1", "ch2", "ch3";
638 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
639 			resets = <&cpg 704>;
640 			renesas,buswait = <4>;
641 			phys = <&usb0 1>;
642 			phy-names = "usb";
643 			status = "disabled";
644 		};
645 
646 		usbphy: usb-phy@e6590100 {
647 			compatible = "renesas,usb-phy-r8a7790",
648 				     "renesas,rcar-gen2-usb-phy";
649 			reg = <0 0xe6590100 0 0x100>;
650 			#address-cells = <1>;
651 			#size-cells = <0>;
652 			clocks = <&cpg CPG_MOD 704>;
653 			clock-names = "usbhs";
654 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
655 			resets = <&cpg 704>;
656 			status = "disabled";
657 
658 			usb0: usb-channel@0 {
659 				reg = <0>;
660 				#phy-cells = <1>;
661 			};
662 			usb2: usb-channel@2 {
663 				reg = <2>;
664 				#phy-cells = <1>;
665 			};
666 		};
667 
668 		usb_dmac0: dma-controller@e65a0000 {
669 			compatible = "renesas,r8a7790-usb-dmac",
670 				     "renesas,usb-dmac";
671 			reg = <0 0xe65a0000 0 0x100>;
672 			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
673 				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
674 			interrupt-names = "ch0", "ch1";
675 			clocks = <&cpg CPG_MOD 330>;
676 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
677 			resets = <&cpg 330>;
678 			#dma-cells = <1>;
679 			dma-channels = <2>;
680 		};
681 
682 		usb_dmac1: dma-controller@e65b0000 {
683 			compatible = "renesas,r8a7790-usb-dmac",
684 				     "renesas,usb-dmac";
685 			reg = <0 0xe65b0000 0 0x100>;
686 			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
687 				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
688 			interrupt-names = "ch0", "ch1";
689 			clocks = <&cpg CPG_MOD 331>;
690 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
691 			resets = <&cpg 331>;
692 			#dma-cells = <1>;
693 			dma-channels = <2>;
694 		};
695 
696 		dmac0: dma-controller@e6700000 {
697 			compatible = "renesas,dmac-r8a7790",
698 				     "renesas,rcar-dmac";
699 			reg = <0 0xe6700000 0 0x20000>;
700 			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
701 				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
702 				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
703 				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
704 				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
705 				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
706 				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
707 				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
708 				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
709 				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
710 				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
711 				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
712 				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
713 				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
714 				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
715 				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
716 			interrupt-names = "error",
717 					  "ch0", "ch1", "ch2", "ch3",
718 					  "ch4", "ch5", "ch6", "ch7",
719 					  "ch8", "ch9", "ch10", "ch11",
720 					  "ch12", "ch13", "ch14";
721 			clocks = <&cpg CPG_MOD 219>;
722 			clock-names = "fck";
723 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
724 			resets = <&cpg 219>;
725 			#dma-cells = <1>;
726 			dma-channels = <15>;
727 		};
728 
729 		dmac1: dma-controller@e6720000 {
730 			compatible = "renesas,dmac-r8a7790",
731 				     "renesas,rcar-dmac";
732 			reg = <0 0xe6720000 0 0x20000>;
733 			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
734 				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
735 				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
736 				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
737 				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
738 				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
739 				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
740 				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
741 				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
742 				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
743 				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
744 				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
745 				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
746 				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
747 				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
748 				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
749 			interrupt-names = "error",
750 					  "ch0", "ch1", "ch2", "ch3",
751 					  "ch4", "ch5", "ch6", "ch7",
752 					  "ch8", "ch9", "ch10", "ch11",
753 					  "ch12", "ch13", "ch14";
754 			clocks = <&cpg CPG_MOD 218>;
755 			clock-names = "fck";
756 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
757 			resets = <&cpg 218>;
758 			#dma-cells = <1>;
759 			dma-channels = <15>;
760 		};
761 
762 		avb: ethernet@e6800000 {
763 			compatible = "renesas,etheravb-r8a7790",
764 				     "renesas,etheravb-rcar-gen2";
765 			reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
766 			interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
767 			clocks = <&cpg CPG_MOD 812>;
768 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
769 			resets = <&cpg 812>;
770 			#address-cells = <1>;
771 			#size-cells = <0>;
772 			status = "disabled";
773 		};
774 
775 		qspi: spi@e6b10000 {
776 			compatible = "renesas,qspi-r8a7790", "renesas,qspi";
777 			reg = <0 0xe6b10000 0 0x2c>;
778 			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
779 			clocks = <&cpg CPG_MOD 917>;
780 			dmas = <&dmac0 0x17>, <&dmac0 0x18>,
781 			       <&dmac1 0x17>, <&dmac1 0x18>;
782 			dma-names = "tx", "rx", "tx", "rx";
783 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
784 			resets = <&cpg 917>;
785 			num-cs = <1>;
786 			#address-cells = <1>;
787 			#size-cells = <0>;
788 			status = "disabled";
789 		};
790 
791 		scifa0: serial@e6c40000 {
792 			compatible = "renesas,scifa-r8a7790",
793 				     "renesas,rcar-gen2-scifa", "renesas,scifa";
794 			reg = <0 0xe6c40000 0 64>;
795 			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
796 			clocks = <&cpg CPG_MOD 204>;
797 			clock-names = "fck";
798 			dmas = <&dmac0 0x21>, <&dmac0 0x22>,
799 			       <&dmac1 0x21>, <&dmac1 0x22>;
800 			dma-names = "tx", "rx", "tx", "rx";
801 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
802 			resets = <&cpg 204>;
803 			status = "disabled";
804 		};
805 
806 		scifa1: serial@e6c50000 {
807 			compatible = "renesas,scifa-r8a7790",
808 				     "renesas,rcar-gen2-scifa", "renesas,scifa";
809 			reg = <0 0xe6c50000 0 64>;
810 			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
811 			clocks = <&cpg CPG_MOD 203>;
812 			clock-names = "fck";
813 			dmas = <&dmac0 0x25>, <&dmac0 0x26>,
814 			       <&dmac1 0x25>, <&dmac1 0x26>;
815 			dma-names = "tx", "rx", "tx", "rx";
816 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
817 			resets = <&cpg 203>;
818 			status = "disabled";
819 		};
820 
821 		scifa2: serial@e6c60000 {
822 			compatible = "renesas,scifa-r8a7790",
823 				     "renesas,rcar-gen2-scifa", "renesas,scifa";
824 			reg = <0 0xe6c60000 0 64>;
825 			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
826 			clocks = <&cpg CPG_MOD 202>;
827 			clock-names = "fck";
828 			dmas = <&dmac0 0x27>, <&dmac0 0x28>,
829 			       <&dmac1 0x27>, <&dmac1 0x28>;
830 			dma-names = "tx", "rx", "tx", "rx";
831 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
832 			resets = <&cpg 202>;
833 			status = "disabled";
834 		};
835 
836 		scifb0: serial@e6c20000 {
837 			compatible = "renesas,scifb-r8a7790",
838 				     "renesas,rcar-gen2-scifb", "renesas,scifb";
839 			reg = <0 0xe6c20000 0 0x100>;
840 			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
841 			clocks = <&cpg CPG_MOD 206>;
842 			clock-names = "fck";
843 			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
844 			       <&dmac1 0x3d>, <&dmac1 0x3e>;
845 			dma-names = "tx", "rx", "tx", "rx";
846 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
847 			resets = <&cpg 206>;
848 			status = "disabled";
849 		};
850 
851 		scifb1: serial@e6c30000 {
852 			compatible = "renesas,scifb-r8a7790",
853 				     "renesas,rcar-gen2-scifb", "renesas,scifb";
854 			reg = <0 0xe6c30000 0 0x100>;
855 			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
856 			clocks = <&cpg CPG_MOD 207>;
857 			clock-names = "fck";
858 			dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
859 			       <&dmac1 0x19>, <&dmac1 0x1a>;
860 			dma-names = "tx", "rx", "tx", "rx";
861 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
862 			resets = <&cpg 207>;
863 			status = "disabled";
864 		};
865 
866 		scifb2: serial@e6ce0000 {
867 			compatible = "renesas,scifb-r8a7790",
868 				     "renesas,rcar-gen2-scifb", "renesas,scifb";
869 			reg = <0 0xe6ce0000 0 0x100>;
870 			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
871 			clocks = <&cpg CPG_MOD 216>;
872 			clock-names = "fck";
873 			dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
874 			       <&dmac1 0x1d>, <&dmac1 0x1e>;
875 			dma-names = "tx", "rx", "tx", "rx";
876 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
877 			resets = <&cpg 216>;
878 			status = "disabled";
879 		};
880 
881 		scif0: serial@e6e60000 {
882 			compatible = "renesas,scif-r8a7790",
883 				     "renesas,rcar-gen2-scif",
884 				     "renesas,scif";
885 			reg = <0 0xe6e60000 0 64>;
886 			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
887 			clocks = <&cpg CPG_MOD 721>,
888 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
889 			clock-names = "fck", "brg_int", "scif_clk";
890 			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
891 			       <&dmac1 0x29>, <&dmac1 0x2a>;
892 			dma-names = "tx", "rx", "tx", "rx";
893 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
894 			resets = <&cpg 721>;
895 			status = "disabled";
896 		};
897 
898 		scif1: serial@e6e68000 {
899 			compatible = "renesas,scif-r8a7790",
900 				     "renesas,rcar-gen2-scif",
901 				     "renesas,scif";
902 			reg = <0 0xe6e68000 0 64>;
903 			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
904 			clocks = <&cpg CPG_MOD 720>,
905 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
906 			clock-names = "fck", "brg_int", "scif_clk";
907 			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
908 			       <&dmac1 0x2d>, <&dmac1 0x2e>;
909 			dma-names = "tx", "rx", "tx", "rx";
910 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
911 			resets = <&cpg 720>;
912 			status = "disabled";
913 		};
914 
915 		scif2: serial@e6e56000 {
916 			compatible = "renesas,scif-r8a7790",
917 				     "renesas,rcar-gen2-scif",
918 				     "renesas,scif";
919 			reg = <0 0xe6e56000 0 64>;
920 			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
921 			clocks = <&cpg CPG_MOD 310>,
922 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
923 			clock-names = "fck", "brg_int", "scif_clk";
924 			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
925 			       <&dmac1 0x2b>, <&dmac1 0x2c>;
926 			dma-names = "tx", "rx", "tx", "rx";
927 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
928 			resets = <&cpg 310>;
929 			status = "disabled";
930 		};
931 
932 		hscif0: serial@e62c0000 {
933 			compatible = "renesas,hscif-r8a7790",
934 				     "renesas,rcar-gen2-hscif", "renesas,hscif";
935 			reg = <0 0xe62c0000 0 96>;
936 			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
937 			clocks = <&cpg CPG_MOD 717>,
938 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
939 			clock-names = "fck", "brg_int", "scif_clk";
940 			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
941 			       <&dmac1 0x39>, <&dmac1 0x3a>;
942 			dma-names = "tx", "rx", "tx", "rx";
943 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
944 			resets = <&cpg 717>;
945 			status = "disabled";
946 		};
947 
948 		hscif1: serial@e62c8000 {
949 			compatible = "renesas,hscif-r8a7790",
950 				     "renesas,rcar-gen2-hscif", "renesas,hscif";
951 			reg = <0 0xe62c8000 0 96>;
952 			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
953 			clocks = <&cpg CPG_MOD 716>,
954 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
955 			clock-names = "fck", "brg_int", "scif_clk";
956 			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
957 			       <&dmac1 0x4d>, <&dmac1 0x4e>;
958 			dma-names = "tx", "rx", "tx", "rx";
959 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
960 			resets = <&cpg 716>;
961 			status = "disabled";
962 		};
963 
964 		msiof0: spi@e6e20000 {
965 			compatible = "renesas,msiof-r8a7790",
966 				     "renesas,rcar-gen2-msiof";
967 			reg = <0 0xe6e20000 0 0x0064>;
968 			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
969 			clocks = <&cpg CPG_MOD 0>;
970 			dmas = <&dmac0 0x51>, <&dmac0 0x52>,
971 			       <&dmac1 0x51>, <&dmac1 0x52>;
972 			dma-names = "tx", "rx", "tx", "rx";
973 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
974 			resets = <&cpg 0>;
975 			#address-cells = <1>;
976 			#size-cells = <0>;
977 			status = "disabled";
978 		};
979 
980 		msiof1: spi@e6e10000 {
981 			compatible = "renesas,msiof-r8a7790",
982 				     "renesas,rcar-gen2-msiof";
983 			reg = <0 0xe6e10000 0 0x0064>;
984 			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
985 			clocks = <&cpg CPG_MOD 208>;
986 			dmas = <&dmac0 0x55>, <&dmac0 0x56>,
987 			       <&dmac1 0x55>, <&dmac1 0x56>;
988 			dma-names = "tx", "rx", "tx", "rx";
989 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
990 			resets = <&cpg 208>;
991 			#address-cells = <1>;
992 			#size-cells = <0>;
993 			status = "disabled";
994 		};
995 
996 		msiof2: spi@e6e00000 {
997 			compatible = "renesas,msiof-r8a7790",
998 				     "renesas,rcar-gen2-msiof";
999 			reg = <0 0xe6e00000 0 0x0064>;
1000 			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1001 			clocks = <&cpg CPG_MOD 205>;
1002 			dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1003 			       <&dmac1 0x41>, <&dmac1 0x42>;
1004 			dma-names = "tx", "rx", "tx", "rx";
1005 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1006 			resets = <&cpg 205>;
1007 			#address-cells = <1>;
1008 			#size-cells = <0>;
1009 			status = "disabled";
1010 		};
1011 
1012 		msiof3: spi@e6c90000 {
1013 			compatible = "renesas,msiof-r8a7790",
1014 				     "renesas,rcar-gen2-msiof";
1015 			reg = <0 0xe6c90000 0 0x0064>;
1016 			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1017 			clocks = <&cpg CPG_MOD 215>;
1018 			dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1019 			       <&dmac1 0x45>, <&dmac1 0x46>;
1020 			dma-names = "tx", "rx", "tx", "rx";
1021 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1022 			resets = <&cpg 215>;
1023 			#address-cells = <1>;
1024 			#size-cells = <0>;
1025 			status = "disabled";
1026 		};
1027 
1028 		can0: can@e6e80000 {
1029 			compatible = "renesas,can-r8a7790",
1030 				     "renesas,rcar-gen2-can";
1031 			reg = <0 0xe6e80000 0 0x1000>;
1032 			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1033 			clocks = <&cpg CPG_MOD 916>,
1034 				 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1035 			clock-names = "clkp1", "clkp2", "can_clk";
1036 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1037 			resets = <&cpg 916>;
1038 			status = "disabled";
1039 		};
1040 
1041 		can1: can@e6e88000 {
1042 			compatible = "renesas,can-r8a7790",
1043 				     "renesas,rcar-gen2-can";
1044 			reg = <0 0xe6e88000 0 0x1000>;
1045 			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1046 			clocks = <&cpg CPG_MOD 915>,
1047 				 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1048 			clock-names = "clkp1", "clkp2", "can_clk";
1049 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1050 			resets = <&cpg 915>;
1051 			status = "disabled";
1052 		};
1053 
1054 		vin0: video@e6ef0000 {
1055 			compatible = "renesas,vin-r8a7790",
1056 				     "renesas,rcar-gen2-vin";
1057 			reg = <0 0xe6ef0000 0 0x1000>;
1058 			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1059 			clocks = <&cpg CPG_MOD 811>;
1060 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1061 			resets = <&cpg 811>;
1062 			status = "disabled";
1063 		};
1064 
1065 		vin1: video@e6ef1000 {
1066 			compatible = "renesas,vin-r8a7790",
1067 				     "renesas,rcar-gen2-vin";
1068 			reg = <0 0xe6ef1000 0 0x1000>;
1069 			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1070 			clocks = <&cpg CPG_MOD 810>;
1071 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1072 			resets = <&cpg 810>;
1073 			status = "disabled";
1074 		};
1075 
1076 		vin2: video@e6ef2000 {
1077 			compatible = "renesas,vin-r8a7790",
1078 				     "renesas,rcar-gen2-vin";
1079 			reg = <0 0xe6ef2000 0 0x1000>;
1080 			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1081 			clocks = <&cpg CPG_MOD 809>;
1082 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1083 			resets = <&cpg 809>;
1084 			status = "disabled";
1085 		};
1086 
1087 		vin3: video@e6ef3000 {
1088 			compatible = "renesas,vin-r8a7790",
1089 				     "renesas,rcar-gen2-vin";
1090 			reg = <0 0xe6ef3000 0 0x1000>;
1091 			interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1092 			clocks = <&cpg CPG_MOD 808>;
1093 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1094 			resets = <&cpg 808>;
1095 			status = "disabled";
1096 		};
1097 
1098 		rcar_sound: sound@ec500000 {
1099 			/*
1100 			 * #sound-dai-cells is required
1101 			 *
1102 			 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1103 			 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1104 			 */
1105 			compatible = "renesas,rcar_sound-r8a7790",
1106 				     "renesas,rcar_sound-gen2";
1107 			reg = <0 0xec500000 0 0x1000>, /* SCU */
1108 			      <0 0xec5a0000 0 0x100>,  /* ADG */
1109 			      <0 0xec540000 0 0x1000>, /* SSIU */
1110 			      <0 0xec541000 0 0x280>,  /* SSI */
1111 			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1112 			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1113 
1114 			clocks = <&cpg CPG_MOD 1005>,
1115 				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1116 				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1117 				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1118 				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1119 				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1120 				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1121 				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1122 				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1123 				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1124 				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1125 				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1126 				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1127 				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1128 				 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1129 				 <&cpg CPG_CORE R8A7790_CLK_M2>;
1130 			clock-names = "ssi-all",
1131 				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1132 				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1133 				      "ssi.1", "ssi.0",
1134 				      "src.9", "src.8", "src.7", "src.6",
1135 				      "src.5", "src.4", "src.3", "src.2",
1136 				      "src.1", "src.0",
1137 				      "ctu.0", "ctu.1",
1138 				      "mix.0", "mix.1",
1139 				      "dvc.0", "dvc.1",
1140 				      "clk_a", "clk_b", "clk_c", "clk_i";
1141 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1142 			resets = <&cpg 1005>,
1143 				 <&cpg 1006>, <&cpg 1007>,
1144 				 <&cpg 1008>, <&cpg 1009>,
1145 				 <&cpg 1010>, <&cpg 1011>,
1146 				 <&cpg 1012>, <&cpg 1013>,
1147 				 <&cpg 1014>, <&cpg 1015>;
1148 			reset-names = "ssi-all",
1149 				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1150 				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1151 				      "ssi.1", "ssi.0";
1152 
1153 			status = "disabled";
1154 
1155 			rcar_sound,dvc {
1156 				dvc0: dvc-0 {
1157 					dmas = <&audma1 0xbc>;
1158 					dma-names = "tx";
1159 				};
1160 				dvc1: dvc-1 {
1161 					dmas = <&audma1 0xbe>;
1162 					dma-names = "tx";
1163 				};
1164 			};
1165 
1166 			rcar_sound,mix {
1167 				mix0: mix-0 { };
1168 				mix1: mix-1 { };
1169 			};
1170 
1171 			rcar_sound,ctu {
1172 				ctu00: ctu-0 { };
1173 				ctu01: ctu-1 { };
1174 				ctu02: ctu-2 { };
1175 				ctu03: ctu-3 { };
1176 				ctu10: ctu-4 { };
1177 				ctu11: ctu-5 { };
1178 				ctu12: ctu-6 { };
1179 				ctu13: ctu-7 { };
1180 			};
1181 
1182 			rcar_sound,src {
1183 				src0: src-0 {
1184 					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1185 					dmas = <&audma0 0x85>, <&audma1 0x9a>;
1186 					dma-names = "rx", "tx";
1187 				};
1188 				src1: src-1 {
1189 					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1190 					dmas = <&audma0 0x87>, <&audma1 0x9c>;
1191 					dma-names = "rx", "tx";
1192 				};
1193 				src2: src-2 {
1194 					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1195 					dmas = <&audma0 0x89>, <&audma1 0x9e>;
1196 					dma-names = "rx", "tx";
1197 				};
1198 				src3: src-3 {
1199 					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1200 					dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1201 					dma-names = "rx", "tx";
1202 				};
1203 				src4: src-4 {
1204 					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1205 					dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1206 					dma-names = "rx", "tx";
1207 				};
1208 				src5: src-5 {
1209 					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1210 					dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1211 					dma-names = "rx", "tx";
1212 				};
1213 				src6: src-6 {
1214 					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1215 					dmas = <&audma0 0x91>, <&audma1 0xb4>;
1216 					dma-names = "rx", "tx";
1217 				};
1218 				src7: src-7 {
1219 					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1220 					dmas = <&audma0 0x93>, <&audma1 0xb6>;
1221 					dma-names = "rx", "tx";
1222 				};
1223 				src8: src-8 {
1224 					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1225 					dmas = <&audma0 0x95>, <&audma1 0xb8>;
1226 					dma-names = "rx", "tx";
1227 				};
1228 				src9: src-9 {
1229 					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1230 					dmas = <&audma0 0x97>, <&audma1 0xba>;
1231 					dma-names = "rx", "tx";
1232 				};
1233 			};
1234 
1235 			rcar_sound,ssi {
1236 				ssi0: ssi-0 {
1237 					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1238 					dmas = <&audma0 0x01>, <&audma1 0x02>,
1239 					       <&audma0 0x15>, <&audma1 0x16>;
1240 					dma-names = "rx", "tx", "rxu", "txu";
1241 				};
1242 				ssi1: ssi-1 {
1243 					 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1244 					dmas = <&audma0 0x03>, <&audma1 0x04>,
1245 					       <&audma0 0x49>, <&audma1 0x4a>;
1246 					dma-names = "rx", "tx", "rxu", "txu";
1247 				};
1248 				ssi2: ssi-2 {
1249 					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1250 					dmas = <&audma0 0x05>, <&audma1 0x06>,
1251 					       <&audma0 0x63>, <&audma1 0x64>;
1252 					dma-names = "rx", "tx", "rxu", "txu";
1253 				};
1254 				ssi3: ssi-3 {
1255 					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1256 					dmas = <&audma0 0x07>, <&audma1 0x08>,
1257 					       <&audma0 0x6f>, <&audma1 0x70>;
1258 					dma-names = "rx", "tx", "rxu", "txu";
1259 				};
1260 				ssi4: ssi-4 {
1261 					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1262 					dmas = <&audma0 0x09>, <&audma1 0x0a>,
1263 					       <&audma0 0x71>, <&audma1 0x72>;
1264 					dma-names = "rx", "tx", "rxu", "txu";
1265 				};
1266 				ssi5: ssi-5 {
1267 					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1268 					dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1269 					       <&audma0 0x73>, <&audma1 0x74>;
1270 					dma-names = "rx", "tx", "rxu", "txu";
1271 				};
1272 				ssi6: ssi-6 {
1273 					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1274 					dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1275 					       <&audma0 0x75>, <&audma1 0x76>;
1276 					dma-names = "rx", "tx", "rxu", "txu";
1277 				};
1278 				ssi7: ssi-7 {
1279 					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1280 					dmas = <&audma0 0x0f>, <&audma1 0x10>,
1281 					       <&audma0 0x79>, <&audma1 0x7a>;
1282 					dma-names = "rx", "tx", "rxu", "txu";
1283 				};
1284 				ssi8: ssi-8 {
1285 					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1286 					dmas = <&audma0 0x11>, <&audma1 0x12>,
1287 					       <&audma0 0x7b>, <&audma1 0x7c>;
1288 					dma-names = "rx", "tx", "rxu", "txu";
1289 				};
1290 				ssi9: ssi-9 {
1291 					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1292 					dmas = <&audma0 0x13>, <&audma1 0x14>,
1293 					       <&audma0 0x7d>, <&audma1 0x7e>;
1294 					dma-names = "rx", "tx", "rxu", "txu";
1295 				};
1296 			};
1297 		};
1298 
1299 		audma0: dma-controller@ec700000 {
1300 			compatible = "renesas,dmac-r8a7790",
1301 				     "renesas,rcar-dmac";
1302 			reg = <0 0xec700000 0 0x10000>;
1303 			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1304 				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1305 				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1306 				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1307 				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1308 				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1309 				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1310 				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1311 				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1312 				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1313 				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1314 				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1315 				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1316 				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1317 			interrupt-names = "error",
1318 					  "ch0", "ch1", "ch2", "ch3",
1319 					  "ch4", "ch5", "ch6", "ch7",
1320 					  "ch8", "ch9", "ch10", "ch11",
1321 					  "ch12";
1322 			clocks = <&cpg CPG_MOD 502>;
1323 			clock-names = "fck";
1324 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1325 			resets = <&cpg 502>;
1326 			#dma-cells = <1>;
1327 			dma-channels = <13>;
1328 		};
1329 
1330 		audma1: dma-controller@ec720000 {
1331 			compatible = "renesas,dmac-r8a7790",
1332 				     "renesas,rcar-dmac";
1333 			reg = <0 0xec720000 0 0x10000>;
1334 			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1335 				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1336 				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1337 				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1338 				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1339 				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1340 				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1341 				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1342 				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1343 				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1344 				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1345 				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1346 				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1347 				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1348 			interrupt-names = "error",
1349 					  "ch0", "ch1", "ch2", "ch3",
1350 					  "ch4", "ch5", "ch6", "ch7",
1351 					  "ch8", "ch9", "ch10", "ch11",
1352 					  "ch12";
1353 			clocks = <&cpg CPG_MOD 501>;
1354 			clock-names = "fck";
1355 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1356 			resets = <&cpg 501>;
1357 			#dma-cells = <1>;
1358 			dma-channels = <13>;
1359 		};
1360 
1361 		xhci: usb@ee000000 {
1362 			compatible = "renesas,xhci-r8a7790",
1363 				     "renesas,rcar-gen2-xhci";
1364 			reg = <0 0xee000000 0 0xc00>;
1365 			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1366 			clocks = <&cpg CPG_MOD 328>;
1367 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1368 			resets = <&cpg 328>;
1369 			phys = <&usb2 1>;
1370 			phy-names = "usb";
1371 			status = "disabled";
1372 		};
1373 
1374 		pci0: pci@ee090000 {
1375 			compatible = "renesas,pci-r8a7790",
1376 				     "renesas,pci-rcar-gen2";
1377 			device_type = "pci";
1378 			reg = <0 0xee090000 0 0xc00>,
1379 			      <0 0xee080000 0 0x1100>;
1380 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1381 			clocks = <&cpg CPG_MOD 703>;
1382 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1383 			resets = <&cpg 703>;
1384 			status = "disabled";
1385 
1386 			bus-range = <0 0>;
1387 			#address-cells = <3>;
1388 			#size-cells = <2>;
1389 			#interrupt-cells = <1>;
1390 			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1391 			interrupt-map-mask = <0xff00 0 0 0x7>;
1392 			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1393 					 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1394 					 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1395 
1396 			usb@1,0 {
1397 				reg = <0x800 0 0 0 0>;
1398 				phys = <&usb0 0>;
1399 				phy-names = "usb";
1400 			};
1401 
1402 			usb@2,0 {
1403 				reg = <0x1000 0 0 0 0>;
1404 				phys = <&usb0 0>;
1405 				phy-names = "usb";
1406 			};
1407 		};
1408 
1409 		pci1: pci@ee0b0000 {
1410 			compatible = "renesas,pci-r8a7790",
1411 				     "renesas,pci-rcar-gen2";
1412 			device_type = "pci";
1413 			reg = <0 0xee0b0000 0 0xc00>,
1414 			      <0 0xee0a0000 0 0x1100>;
1415 			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1416 			clocks = <&cpg CPG_MOD 703>;
1417 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1418 			resets = <&cpg 703>;
1419 			status = "disabled";
1420 
1421 			bus-range = <1 1>;
1422 			#address-cells = <3>;
1423 			#size-cells = <2>;
1424 			#interrupt-cells = <1>;
1425 			ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1426 			interrupt-map-mask = <0xff00 0 0 0x7>;
1427 			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1428 					 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1429 					 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1430 		};
1431 
1432 		pci2: pci@ee0d0000 {
1433 			compatible = "renesas,pci-r8a7790",
1434 				     "renesas,pci-rcar-gen2";
1435 			device_type = "pci";
1436 			clocks = <&cpg CPG_MOD 703>;
1437 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1438 			resets = <&cpg 703>;
1439 			reg = <0 0xee0d0000 0 0xc00>,
1440 			      <0 0xee0c0000 0 0x1100>;
1441 			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1442 			status = "disabled";
1443 
1444 			bus-range = <2 2>;
1445 			#address-cells = <3>;
1446 			#size-cells = <2>;
1447 			#interrupt-cells = <1>;
1448 			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1449 			interrupt-map-mask = <0xff00 0 0 0x7>;
1450 			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1451 					 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1452 					 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1453 
1454 			usb@1,0 {
1455 				reg = <0x20800 0 0 0 0>;
1456 				phys = <&usb2 0>;
1457 				phy-names = "usb";
1458 			};
1459 
1460 			usb@2,0 {
1461 				reg = <0x21000 0 0 0 0>;
1462 				phys = <&usb2 0>;
1463 				phy-names = "usb";
1464 			};
1465 		};
1466 
1467 		sdhi0: sd@ee100000 {
1468 			compatible = "renesas,sdhi-r8a7790",
1469 				     "renesas,rcar-gen2-sdhi";
1470 			reg = <0 0xee100000 0 0x328>;
1471 			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1472 			clocks = <&cpg CPG_MOD 314>;
1473 			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1474 			       <&dmac1 0xcd>, <&dmac1 0xce>;
1475 			dma-names = "tx", "rx", "tx", "rx";
1476 			max-frequency = <195000000>;
1477 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1478 			resets = <&cpg 314>;
1479 			status = "disabled";
1480 		};
1481 
1482 		sdhi1: sd@ee120000 {
1483 			compatible = "renesas,sdhi-r8a7790",
1484 				     "renesas,rcar-gen2-sdhi";
1485 			reg = <0 0xee120000 0 0x328>;
1486 			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1487 			clocks = <&cpg CPG_MOD 313>;
1488 			dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1489 			       <&dmac1 0xc9>, <&dmac1 0xca>;
1490 			dma-names = "tx", "rx", "tx", "rx";
1491 			max-frequency = <195000000>;
1492 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1493 			resets = <&cpg 313>;
1494 			status = "disabled";
1495 		};
1496 
1497 		sdhi2: sd@ee140000 {
1498 			compatible = "renesas,sdhi-r8a7790",
1499 				     "renesas,rcar-gen2-sdhi";
1500 			reg = <0 0xee140000 0 0x100>;
1501 			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1502 			clocks = <&cpg CPG_MOD 312>;
1503 			dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1504 			       <&dmac1 0xc1>, <&dmac1 0xc2>;
1505 			dma-names = "tx", "rx", "tx", "rx";
1506 			max-frequency = <97500000>;
1507 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1508 			resets = <&cpg 312>;
1509 			status = "disabled";
1510 		};
1511 
1512 		sdhi3: sd@ee160000 {
1513 			compatible = "renesas,sdhi-r8a7790",
1514 				     "renesas,rcar-gen2-sdhi";
1515 			reg = <0 0xee160000 0 0x100>;
1516 			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1517 			clocks = <&cpg CPG_MOD 311>;
1518 			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1519 			       <&dmac1 0xd3>, <&dmac1 0xd4>;
1520 			dma-names = "tx", "rx", "tx", "rx";
1521 			max-frequency = <97500000>;
1522 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1523 			resets = <&cpg 311>;
1524 			status = "disabled";
1525 		};
1526 
1527 		mmcif0: mmc@ee200000 {
1528 			compatible = "renesas,mmcif-r8a7790",
1529 				     "renesas,sh-mmcif";
1530 			reg = <0 0xee200000 0 0x80>;
1531 			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1532 			clocks = <&cpg CPG_MOD 315>;
1533 			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1534 			       <&dmac1 0xd1>, <&dmac1 0xd2>;
1535 			dma-names = "tx", "rx", "tx", "rx";
1536 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1537 			resets = <&cpg 315>;
1538 			reg-io-width = <4>;
1539 			status = "disabled";
1540 			max-frequency = <97500000>;
1541 		};
1542 
1543 		mmcif1: mmc@ee220000 {
1544 			compatible = "renesas,mmcif-r8a7790",
1545 				     "renesas,sh-mmcif";
1546 			reg = <0 0xee220000 0 0x80>;
1547 			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1548 			clocks = <&cpg CPG_MOD 305>;
1549 			dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1550 			       <&dmac1 0xe1>, <&dmac1 0xe2>;
1551 			dma-names = "tx", "rx", "tx", "rx";
1552 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1553 			resets = <&cpg 305>;
1554 			reg-io-width = <4>;
1555 			status = "disabled";
1556 			max-frequency = <97500000>;
1557 		};
1558 
1559 		sata0: sata@ee300000 {
1560 			compatible = "renesas,sata-r8a7790",
1561 				     "renesas,rcar-gen2-sata";
1562 			reg = <0 0xee300000 0 0x200000>;
1563 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1564 			clocks = <&cpg CPG_MOD 815>;
1565 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1566 			resets = <&cpg 815>;
1567 			status = "disabled";
1568 		};
1569 
1570 		sata1: sata@ee500000 {
1571 			compatible = "renesas,sata-r8a7790",
1572 				     "renesas,rcar-gen2-sata";
1573 			reg = <0 0xee500000 0 0x200000>;
1574 			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1575 			clocks = <&cpg CPG_MOD 814>;
1576 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1577 			resets = <&cpg 814>;
1578 			status = "disabled";
1579 		};
1580 
1581 		ether: ethernet@ee700000 {
1582 			compatible = "renesas,ether-r8a7790",
1583 				     "renesas,rcar-gen2-ether";
1584 			reg = <0 0xee700000 0 0x400>;
1585 			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1586 			clocks = <&cpg CPG_MOD 813>;
1587 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1588 			resets = <&cpg 813>;
1589 			phy-mode = "rmii";
1590 			#address-cells = <1>;
1591 			#size-cells = <0>;
1592 			status = "disabled";
1593 		};
1594 
1595 		gic: interrupt-controller@f1001000 {
1596 			compatible = "arm,gic-400";
1597 			#interrupt-cells = <3>;
1598 			#address-cells = <0>;
1599 			interrupt-controller;
1600 			reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1601 			      <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1602 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1603 			clocks = <&cpg CPG_MOD 408>;
1604 			clock-names = "clk";
1605 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1606 			resets = <&cpg 408>;
1607 		};
1608 
1609 		pciec: pcie@fe000000 {
1610 			compatible = "renesas,pcie-r8a7790",
1611 				     "renesas,pcie-rcar-gen2";
1612 			reg = <0 0xfe000000 0 0x80000>;
1613 			#address-cells = <3>;
1614 			#size-cells = <2>;
1615 			bus-range = <0x00 0xff>;
1616 			device_type = "pci";
1617 			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1618 				  0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1619 				  0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1620 				  0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1621 			/* Map all possible DDR as inbound ranges */
1622 			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1623 				      0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1624 			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1625 				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1626 				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1627 			#interrupt-cells = <1>;
1628 			interrupt-map-mask = <0 0 0 0>;
1629 			interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1630 			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1631 			clock-names = "pcie", "pcie_bus";
1632 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1633 			resets = <&cpg 319>;
1634 			status = "disabled";
1635 		};
1636 
1637 		vsp@fe920000 {
1638 			compatible = "renesas,vsp1";
1639 			reg = <0 0xfe920000 0 0x8000>;
1640 			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1641 			clocks = <&cpg CPG_MOD 130>;
1642 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1643 			resets = <&cpg 130>;
1644 		};
1645 
1646 		vsp@fe928000 {
1647 			compatible = "renesas,vsp1";
1648 			reg = <0 0xfe928000 0 0x8000>;
1649 			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1650 			clocks = <&cpg CPG_MOD 131>;
1651 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1652 			resets = <&cpg 131>;
1653 		};
1654 
1655 		vsp@fe930000 {
1656 			compatible = "renesas,vsp1";
1657 			reg = <0 0xfe930000 0 0x8000>;
1658 			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1659 			clocks = <&cpg CPG_MOD 128>;
1660 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1661 			resets = <&cpg 128>;
1662 		};
1663 
1664 		vsp@fe938000 {
1665 			compatible = "renesas,vsp1";
1666 			reg = <0 0xfe938000 0 0x8000>;
1667 			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1668 			clocks = <&cpg CPG_MOD 127>;
1669 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1670 			resets = <&cpg 127>;
1671 		};
1672 
1673 		fdp1@fe940000 {
1674 			compatible = "renesas,fdp1";
1675 			reg = <0 0xfe940000 0 0x2400>;
1676 			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1677 			clocks = <&cpg CPG_MOD 119>;
1678 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1679 			resets = <&cpg 119>;
1680 		};
1681 
1682 		fdp1@fe944000 {
1683 			compatible = "renesas,fdp1";
1684 			reg = <0 0xfe944000 0 0x2400>;
1685 			interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1686 			clocks = <&cpg CPG_MOD 118>;
1687 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1688 			resets = <&cpg 118>;
1689 		};
1690 
1691 		fdp1@fe948000 {
1692 			compatible = "renesas,fdp1";
1693 			reg = <0 0xfe948000 0 0x2400>;
1694 			interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1695 			clocks = <&cpg CPG_MOD 117>;
1696 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1697 			resets = <&cpg 117>;
1698 		};
1699 
1700 		jpu: jpeg-codec@fe980000 {
1701 			compatible = "renesas,jpu-r8a7790",
1702 				     "renesas,rcar-gen2-jpu";
1703 			reg = <0 0xfe980000 0 0x10300>;
1704 			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1705 			clocks = <&cpg CPG_MOD 106>;
1706 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1707 			resets = <&cpg 106>;
1708 		};
1709 
1710 		du: display@feb00000 {
1711 			compatible = "renesas,du-r8a7790";
1712 			reg = <0 0xfeb00000 0 0x70000>;
1713 			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1714 				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1715 				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1716 			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1717 				 <&cpg CPG_MOD 722>;
1718 			clock-names = "du.0", "du.1", "du.2";
1719 			status = "disabled";
1720 
1721 			ports {
1722 				#address-cells = <1>;
1723 				#size-cells = <0>;
1724 
1725 				port@0 {
1726 					reg = <0>;
1727 					du_out_rgb: endpoint {
1728 					};
1729 				};
1730 				port@1 {
1731 					reg = <1>;
1732 					du_out_lvds0: endpoint {
1733 						remote-endpoint = <&lvds0_in>;
1734 					};
1735 				};
1736 				port@2 {
1737 					reg = <2>;
1738 					du_out_lvds1: endpoint {
1739 						remote-endpoint = <&lvds1_in>;
1740 					};
1741 				};
1742 			};
1743 		};
1744 
1745 		lvds0: lvds@feb90000 {
1746 			compatible = "renesas,r8a7790-lvds";
1747 			reg = <0 0xfeb90000 0 0x1c>;
1748 			clocks = <&cpg CPG_MOD 726>;
1749 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1750 			resets = <&cpg 726>;
1751 			status = "disabled";
1752 
1753 			ports {
1754 				#address-cells = <1>;
1755 				#size-cells = <0>;
1756 
1757 				port@0 {
1758 					reg = <0>;
1759 					lvds0_in: endpoint {
1760 						remote-endpoint = <&du_out_lvds0>;
1761 					};
1762 				};
1763 				port@1 {
1764 					reg = <1>;
1765 					lvds0_out: endpoint {
1766 					};
1767 				};
1768 			};
1769 		};
1770 
1771 		lvds1: lvds@feb94000 {
1772 			compatible = "renesas,r8a7790-lvds";
1773 			reg = <0 0xfeb94000 0 0x1c>;
1774 			clocks = <&cpg CPG_MOD 725>;
1775 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1776 			resets = <&cpg 725>;
1777 			status = "disabled";
1778 
1779 			ports {
1780 				#address-cells = <1>;
1781 				#size-cells = <0>;
1782 
1783 				port@0 {
1784 					reg = <0>;
1785 					lvds1_in: endpoint {
1786 						remote-endpoint = <&du_out_lvds1>;
1787 					};
1788 				};
1789 				port@1 {
1790 					reg = <1>;
1791 					lvds1_out: endpoint {
1792 					};
1793 				};
1794 			};
1795 		};
1796 
1797 		prr: chipid@ff000044 {
1798 			compatible = "renesas,prr";
1799 			reg = <0 0xff000044 0 4>;
1800 		};
1801 
1802 		cmt0: timer@ffca0000 {
1803 			compatible = "renesas,r8a7790-cmt0",
1804 				     "renesas,rcar-gen2-cmt0";
1805 			reg = <0 0xffca0000 0 0x1004>;
1806 			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1807 				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1808 			clocks = <&cpg CPG_MOD 124>;
1809 			clock-names = "fck";
1810 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1811 			resets = <&cpg 124>;
1812 
1813 			status = "disabled";
1814 		};
1815 
1816 		cmt1: timer@e6130000 {
1817 			compatible = "renesas,r8a7790-cmt1",
1818 				     "renesas,rcar-gen2-cmt1";
1819 			reg = <0 0xe6130000 0 0x1004>;
1820 			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1821 				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1822 				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1823 				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1824 				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1825 				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1826 				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1827 				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1828 			clocks = <&cpg CPG_MOD 329>;
1829 			clock-names = "fck";
1830 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1831 			resets = <&cpg 329>;
1832 
1833 			status = "disabled";
1834 		};
1835 	};
1836 
1837 	thermal-zones {
1838 		cpu_thermal: cpu-thermal {
1839 			polling-delay-passive = <0>;
1840 			polling-delay = <0>;
1841 
1842 			thermal-sensors = <&thermal>;
1843 
1844 			trips {
1845 				cpu-crit {
1846 					temperature = <95000>;
1847 					hysteresis = <0>;
1848 					type = "critical";
1849 				};
1850 			};
1851 			cooling-maps {
1852 			};
1853 		};
1854 	};
1855 
1856 	timer {
1857 		compatible = "arm,armv7-timer";
1858 		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1859 				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1860 				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1861 				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1862 	};
1863 
1864 	/* External USB clock - can be overridden by the board */
1865 	usb_extal_clk: usb_extal {
1866 		compatible = "fixed-clock";
1867 		#clock-cells = <0>;
1868 		clock-frequency = <48000000>;
1869 	};
1870 };
1871