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/Documentation/devicetree/bindings/interrupt-controller/
Dsamsung,s3c24xx-irq.txt4 varying number of interrupt sources. The set consists of a main- and sub-
5 controller and on newer SoCs even a second main controller.
22 - 0 ... main controller
24 - 2 ... second main controller on s3c2416 and s3c2450
25 parent_irq contains the parent bit in the main controller and will be
26 ignored in main controllers
/Documentation/driver-api/firmware/
Drequest_firmware.rst20 .. kernel-doc:: drivers/base/firmware_loader/main.c
25 .. kernel-doc:: drivers/base/firmware_loader/main.c
30 .. kernel-doc:: drivers/base/firmware_loader/main.c
35 .. kernel-doc:: drivers/base/firmware_loader/main.c
49 .. kernel-doc:: drivers/base/firmware_loader/main.c
63 .. kernel-doc:: drivers/base/firmware_loader/main.c
/Documentation/devicetree/bindings/mfd/
Dstmfx.txt4 communication with the main MCU. Its main features are GPIO expansion, main
Dbfticu.txt4 Its main functionality is to collect IRQs from the whole chassis and signals
10 - interrupts: the main IRQ line to signal the collected IRQs
Dab8500.txt37 : MAIN_CH_UNPLUG_DET : : main charger unplug detection management (not in 8505)
38 : MAIN_CHARGE_PLUG_DET : : main charger plug detection management (not in 8505)
39 : MAIN_EXT_CH_NOT_OK : : main charger not OK
40 : MAIN_CH_TH_PROT_R : : Die temp is above main charger
41 : MAIN_CH_TH_PROT_F : : Die temp is below main charger
/Documentation/devicetree/bindings/media/
Dmediatek-vpu.txt14 - clock-names: must be main. It is the main clock of VPU
30 clock-names = "main";
/Documentation/devicetree/bindings/display/
Dst,stih4xx.txt13 - compatible: "st,vtac-main" or "st,vtac-aux"
42 - st,vtg: phandle(s) on vtg device (main and aux) nodes.
115 - st,vtg: phandle on vtg main device node.
122 vtg_main_slave: sti-vtg-main-slave@fe85a800 {
128 vtg_main: sti-vtg-main-master@fd348000 {
147 sti-vtac-rx-main@fee82800 {
148 compatible = "st,vtac-main";
161 sti-vtac-tx-main@fd349000 {
162 compatible = "st,vtac-main";
186 reset-names = "compo-main", "compo-aux";
/Documentation/devicetree/bindings/clock/
Dkeystone-pll.txt3 Binding for keystone PLLs. The main PLL IP typically has a multiplier,
15 - compatible : shall be "ti,keystone,main-pll-clock" or "ti,keystone,pll-clock"
19 post-divider registers are applicable only for main pll clock
26 compatible = "ti,keystone,main-pll-clock";
Drenesas,r8a73a4-cpg-clocks.txt16 - clock-output-names: The names of the clocks. Supported clocks are "main",
29 clock-output-names = "main", "pll0", "pll1", "pll2",
Dst,nomadik.txt18 i.e. the driver output for the main (~19.2 MHz) chrystal,
24 which should both have the main chrystal, represented as a
31 - clocks: this clock will have main chrystal as parent
Drenesas,sh73a0-cpg-clocks.txt18 - clock-output-names: The names of the clocks. Supported clocks are "main",
31 clock-output-names = "main", "pll0", "pll1", "pll2",
/Documentation/devicetree/bindings/media/i2c/
Dadv7604.txt18 main I2C ports. Each map has it own I2C address and acts as a standard
19 slave device on the I2C bus. The main address is mandatory, others are
45 "main", "avlink", "cec", "infoframe", "esdp", "dpp", "afe",
69 reg-names = "main", "edid";
Dadv748x.txt15 main I2C ports. Each map has it own I2C address and acts as a standard
16 slave device on the I2C bus. The main address is mandatory, others are
28 "main", "dpll", "cp", "hdmi", "edid", "repeater",
70 reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
/Documentation/devicetree/bindings/net/
Drockchip-dwmac.txt20 - clocks: <&cru SCLK_MAC>: clock selector for main clock, from PLL or PHY.
32 - clock_in_out: For RGMII, it must be "input", means main clock(125MHz)
38 - assigned-clocks: main clock, should be <&cru SCLK_MAC>;
39 - assigned-clock-parents = parent of main clock.
/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-zx.txt4 a main controller and an auxiliary one. For example, on ZX296718 SoC, the
5 main controller is TOP_PMM and the auxiliary one is AON_IOCFG. Both
20 TOP_PMM (main) AON_IOCFG (aux)
Dfsl,imx7d-pinctrl.txt7 mux and pad control settings, it shares the input select register from main
29 - compatible: "fsl,imx7d-iomuxc" for main IOMUXC controller, or
38 a phandle for main iomuxc controller which shares the input select register for
/Documentation/devicetree/bindings/iommu/
Drenesas,ipmmu-vmsa.txt43 - renesas,ipmmu-main: reference to the main IPMMU instance in two cells.
44 The first cell is a phandle to the main IPMMU and the second cell is
46 The interrupt bit number needs to match the main IPMMU IMSSTR register.
/Documentation/devicetree/bindings/soc/qcom/
Dqcom,smem.txt15 Definition: handle to memory reservation for main SMEM memory region.
29 The following example shows the SMEM setup for MSM8974, with a main SMEM region
/Documentation/devicetree/bindings/pwm/
Dpwm-mtk-disp.txt13 - "main": clock used to generate PWM signals.
27 clock-names = "main", "mm";
Dpwm-mediatek.txt18 - "main": clock used by the PWM core
38 clock-names = "top", "main", "pwm1", "pwm2",
/Documentation/devicetree/bindings/iio/adc/
Dmt6577_auxadc.txt22 - clock-names: Should contain "main".
31 clock-names = "main";
/Documentation/arm/sunxi/
Dclocks.rst8 Q: Why is the main 24MHz oscillator gatable? Wouldn't that break the
37 Finally you can gate the main oscillator::
/Documentation/devicetree/bindings/usb/
Dmediatek,musb.txt18 - clock-names : must contain "main", "mcu", "univpll"
48 clock-names = "main","mcu","univpll";
/Documentation/devicetree/bindings/arc/
Deznps.txt4 Appliance main board with NPS400 ASIC.
/Documentation/devicetree/bindings/i2c/
Di2c-mt65xx.txt23 - clock-names: Must include "main" and "dma", "arb" is for multi-master that
45 clock-names = "main", "dma";

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