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Searched refs:APBC_APBCLK (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-mmp/
Dregs-apbc.h12 #define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */ macro
Dpxa168.c65 #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
74 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); in pxa168_timer_init()
Dpxa910.c107 #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
113 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); in pxa910_timer_init()
Dmmp2.c125 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); in mmp2_timer_init()
131 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); in mmp2_timer_init()
Dclock.c20 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(clk->fnclksel); in apbc_clk_enable()