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Searched refs:AR7_REGS_GPIO (Results 1 – 3 of 3) sorted by relevance

/arch/mips/include/asm/mach-ar7/
Dar7.h21 #define AR7_REGS_GPIO (AR7_REGS_BASE + 0x0900) macro
111 return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x24)) & 0xffff) == in ar7_is_titan()
118 KSEG1ADDR(AR7_REGS_GPIO + 0x14)) & 0xffff); in ar7_chip_id()
123 unsigned int val = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + in titan_chip_id()
130 return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + (ar7_is_titan() ? 0x24 : in ar7_chip_rev()
/arch/mips/ar7/
Dclock.c147 didr1 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x18)); in tnetd7300_dsp_clock()
148 didr2 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x1c)); in tnetd7300_dsp_clock()
Dgpio.c311 gpch->regs = ioremap_nocache(AR7_REGS_GPIO, size); in ar7_gpio_init()