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Searched refs:ARCH_DMA_MINALIGN (Results 1 – 20 of 20) sorted by relevance

/arch/mips/include/asm/mach-ip32/
Dkmalloc.h7 #define ARCH_DMA_MINALIGN 32 macro
9 #define ARCH_DMA_MINALIGN 128 macro
/arch/arm64/mm/
Ddma-mapping.c45 WARN_TAINT(!coherent && cls > ARCH_DMA_MINALIGN, in arch_setup_dma_ops()
49 ARCH_DMA_MINALIGN, cls); in arch_setup_dma_ops()
/arch/arm64/include/asm/
Dcache.h49 #define ARCH_DMA_MINALIGN (128) macro
88 return cwg ? 4 << cwg : ARCH_DMA_MINALIGN; in cache_line_size_of_cpu()
/arch/mips/include/asm/mach-tx49xx/
Dkmalloc.h5 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/mips/include/asm/mach-generic/
Dkmalloc.h10 #define ARCH_DMA_MINALIGN 128 macro
/arch/nds32/include/asm/
Dcache.h10 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/m68k/include/asm/
Dcache.h12 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/unicore32/include/asm/
Dcache.h22 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/hexagon/include/asm/
Dcache.h15 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/arm/include/asm/
Dcache.h18 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/nios2/include/asm/
Dcache.h21 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/xtensa/include/asm/
Dcache.h32 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/csky/include/asm/
Dcache.h11 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/powerpc/include/asm/
Dpage_32.h16 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/parisc/include/asm/
Dcache.h23 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/arc/include/asm/
Dcache.h50 #define ARCH_DMA_MINALIGN SMP_CACHE_BYTES macro
/arch/c6x/include/asm/
Dcache.h45 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/sh/include/asm/
Dpage.h195 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/microblaze/include/asm/
Dpage.h43 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/arm64/kernel/
Dcpufeature.c2201 ARCH_DMA_MINALIGN); in setup_cpu_features()