Searched refs:ARM_BE8 (Results 1 – 25 of 27) sorted by relevance
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/arch/arm/include/debug/ |
D | samsung.S | 14 ARM_BE8(rev \rd, \rd) 20 ARM_BE8(rev \rd, \rd) 29 ARM_BE8(rev \rd, \rd) 39 ARM_BE8(rev \rd, \rd) 53 ARM_BE8(rev \rd, \rd) 65 ARM_BE8(rev \rd, \rd) 74 ARM_BE8(rev \rd, \rd) 86 ARM_BE8(rev \rd, \rd)
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D | msm.S | 15 ARM_BE8(rev \rd, \rd ) 23 ARM_BE8(rev \rd, \rd ) 28 ARM_BE8(rev \rd, \rd ) 34 ARM_BE8(rev \rd, \rd ) 38 ARM_BE8(rev \rd, \rd )
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D | 8250.S | 16 ARM_BE8(rev \rd, \rd) 18 ARM_BE8(rev \rd, \rd) 23 ARM_BE8(rev \rd, \rd)
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D | imx.S | 34 ARM_BE8(rev \rd, \rd) 43 ARM_BE8(rev \rd, \rd)
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D | pl01x.S | 31 ARM_BE8( rev \rd, \rd ) 38 ARM_BE8( rev \rd, \rd )
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D | zynq.S | 38 ARM_BE8( rev \rd, \rd ) 45 ARM_BE8( rev \rd, \rd )
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D | brcmstb.S | 80 ARM_BE8( rev \rv, \rv ) 123 ARM_BE8( rev \rd, \rd ) 129 ARM_BE8( rev \rd, \rd )
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/arch/arm/mach-mvebu/ |
D | pmsu_ll.S | 32 ARM_BE8(setend be ) @ go BE8 if entered LE 48 ARM_BE8(setend be ) @ go BE8 if entered LE 59 ARM_BE8(setend be) 65 ARM_BE8(rev r0, r0) @ the value is stored LE
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D | headsmp-a9.S | 20 ARM_BE8(setend be)
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D | headsmp.S | 32 ARM_BE8(setend be ) @ go BE8 if entered LE
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D | coherency_ll.S | 73 ARM_BE8(rev r3, r3)
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/arch/arm/mach-zynq/ |
D | headsmp.S | 13 ARM_BE8(setend be) @ ensure we are in BE8 mode 15 ARM_BE8(rev r0, r0)
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/arch/arm/mach-socfpga/ |
D | headsmp.S | 21 ARM_BE8(setend be) 27 ARM_BE8(rev r4, r4)
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/arch/arm/crypto/ |
D | crc32-ce-core.S | 252 ARM_BE8(rev r2, r2 ) 253 ARM_BE8(rev r3, r3 ) 264 ARM_BE8(rev r3, r3 ) 270 ARM_BE8(rev16 r3, r3 ) 290 ARM_BE8(rev16 r3, r3 )
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/arch/arm/mach-imx/ |
D | headsmp.S | 23 ARM_BE8(setend be) @ go BE8 if entered LE
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/arch/arm/mach-exynos/ |
D | headsmp.S | 19 ARM_BE8(setend be)
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/arch/arm/plat-versatile/ |
D | headsmp.S | 18 ARM_BE8(setend be)
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/arch/arm/mm/ |
D | abort-ev6.S | 36 ARM_BE8(rev r3, r3)
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D | proc-v6.S | 221 ARM_BE8(orr r6, r6, #1 << 25) @ big-endian page tables
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/arch/arm/kernel/ |
D | head.S | 78 ARM_BE8(setend be ) @ ensure we are in BE8 mode 376 ARM_BE8(setend be) @ ensure we are in BE8 mode 398 ARM_BE8(eor r4, r4, r5) @ Swap r5 and r4 in BE: 399 ARM_BE8(eor r5, r4, r5) @ it can be done in 3 steps 400 ARM_BE8(eor r4, r4, r5) @ without using a temp reg.
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D | sleep.S | 127 ARM_BE8(setend be) @ ensure we are in BE mode 141 ARM_BE8(setend be) @ ensure we are in BE mode
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D | entry-armv.S | 500 ARM_BE8(rev16 r5, r5) @ little endian instruction 504 ARM_BE8(rev16 r0, r0) @ little endian instruction
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D | entry-common.S | 229 ARM_BE8(rev r10, r10) @ little endian instruction
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/arch/arm/include/asm/ |
D | assembler.h | 58 #define ARM_BE8(code...) code macro 60 #define ARM_BE8(code...) macro
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/arch/arm/common/ |
D | mcpm_head.S | 47 ARM_BE8(setend be)
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