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Searched refs:BRIDGE_9XX_PCIEMEM_LIMIT0 (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/netlogic/xlp-hal/
Dbridge.h163 #define BRIDGE_9XX_PCIEMEM_LIMIT0 0x5d macro
/arch/mips/pci/
Dpci-xlp.c257 BRIDGE_9XX_PCIEMEM_LIMIT0 + link); in xlp_config_pci_bswap()