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Searched refs:BRIDGE_PCIEIO_BASE0 (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/netlogic/xlp-hal/
Dbridge.h84 #define BRIDGE_PCIEIO_BASE0 0x3c macro
/arch/mips/pci/
Dpci-xlp.c277 reg = nlm_read_bridge_reg(nbubase, BRIDGE_PCIEIO_BASE0 + link); in xlp_config_pci_bswap()