Searched refs:CLR (Results 1 – 5 of 5) sorted by relevance
| /arch/c6x/kernel/ |
| D | head.S | 43 CLR .S2 B2,0,1,B2
46 CLR .S2 B2,0,1,B2
49 CLR .S2 B2,0,1,B2
52 CLR .S2 B2,0,1,B2
|
| D | entry.S | 29 CLR .S2 reg,0,0,reg
|
| /arch/arm/boot/compressed/ |
| D | head-sharpsl.S | 132 orr r3, r3, #0x0a @ SET CLR + FLWP
136 bic r3, r3, #2 @ CLR CLE
141 bic r3, r3, #4 @ CLR ALE
|
| /arch/arm/mach-rpc/ |
| D | irq.c | 14 #define CLR 0x04 macro
39 writeb(mask, base + CLR); in iomd_irq_mask_ack()
|
| /arch/c6x/lib/ |
| D | csum_64plus.S | 415 CLR .S1 A4,16,31,A4
|