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Searched refs:CSR_STVEC (Results 1 – 3 of 3) sorted by relevance

/arch/riscv/kernel/
Dhead.S124 csrw CSR_STVEC, a2
146 csrw CSR_STVEC, a0
169 csrw CSR_STVEC, a3
Dtraps.c162 csr_write(CSR_STVEC, &handle_exception); in trap_init()
/arch/riscv/include/asm/
Dcsr.h80 #define CSR_STVEC 0x105 macro