Searched refs:DDRC_CTL (Results 1 – 2 of 2) sorted by relevance
| /arch/mips/pmcs-msp71xx/ | ||
| D | msp_setup.c | 65 DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16); in msp7120_reset() |
| /arch/mips/include/asm/mach-pmcs-msp71xx/ | ||
| D | msp_regs.h | 623 #define DDRC_CTL(n) (0x40 + n) macro |