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Searched refs:ESR_ELx_SYS64_ISS_OP0_MASK (Results 1 – 1 of 1) sorted by relevance

/arch/arm64/include/asm/
Desr.h169 #define ESR_ELx_SYS64_ISS_OP0_MASK (UL(0x3) << ESR_ELx_SYS64_ISS_OP0_SHIFT) macro
170 #define ESR_ELx_SYS64_ISS_SYS_MASK (ESR_ELx_SYS64_ISS_OP0_MASK | \
198 #define ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK (ESR_ELx_SYS64_ISS_OP0_MASK | \
211 #define ESR_ELx_SYS64_ISS_SYS_MRS_OP_MASK (ESR_ELx_SYS64_ISS_OP0_MASK | \
230 sys_reg((((e) & ESR_ELx_SYS64_ISS_OP0_MASK) >> \