Searched refs:ID_AA64PFR0_SVE_SHIFT (Results 1 – 5 of 5) sorted by relevance
| /arch/arm64/include/asm/ |
| D | cpufeature.h | 519 u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_SVE_SHIFT); in id_aa64pfr0_sve()
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| D | sysreg.h | 641 #define ID_AA64PFR0_SVE_SHIFT 32 macro
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| /arch/arm64/kernel/ |
| D | cpufeature.c | 170 FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR0_SVE_SHIFT, 4, 0),
1473 .field_pos = ID_AA64PFR0_SVE_SHIFT,
1750 …HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_SVE_SHIFT, FTR_UNSIGNED, ID_AA64PFR0_SVE, CAP_HWCAP, KE…
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| D | head.S | 631 ubfx x1, x1, #ID_AA64PFR0_SVE_SHIFT, #4
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| /arch/arm64/kvm/ |
| D | sys_regs.c | 1101 val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT); in read_id_reg()
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