| /arch/mips/pci/ |
| D | fixup-sni.c | 24 #define INTA PCIMT_IRQ_INTA macro
50 { 0, INTB, INTC, INTD, INTA }, /* Slot 2 */
51 { 0, INTC, INTD, INTA, INTB }, /* Slot 3 */
52 { 0, INTD, INTA, INTB, INTC }, /* Slot 4 */
64 { 0, INTC, INTD, INTA, INTB }, /* Slot 1 */
67 { 0, INTB, INTC, INTD, INTA }, /* Slot 2 */
68 { 0, INTC, INTD, INTA, INTB }, /* Slot 3 */
69 { 0, INTD, INTA, INTB, INTC }, /* Slot 4 */
76 { 0, INTC, INTD, INTA, INTB }, /* Bridge/i960 */
77 { 0, INTD, INTA, INTB, INTC }, /* Slot 1 */
[all …]
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| D | fixup-capcella.c | 17 #define INTA PC104PLUS_INTA_IRQ macro
25 [14] = { -1, INTA, INTB, INTC, INTD }
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| /arch/arm/mach-iop32x/ |
| D | em7210.c | 74 #define INTA IRQ_IOP32X_XINT0 macro
88 {INTA, INTA, INTA, INTA}, /* 1st 82541 */ in em7210_pci_map_irq()
91 {INTD, INTA, INTA, INTA}, /* mini-PCI */ in em7210_pci_map_irq()
92 {INTD, INTC, INTA, INTA}, /* NEC USB */ in em7210_pci_map_irq()
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| D | glantank.c | 69 #define INTA IRQ_IOP32X_XINT0 macro
83 {INTA, INTA, INTA, INTA}, /* Ethernet (E1000) */ in glantank_pci_map_irq()
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| /arch/arm/mach-ixp4xx/ |
| D | vulcan-pci.c | 23 #define INTA 2 macro
39 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); in vulcan_pci_preinit()
47 return IXP4XX_GPIO_IRQ(INTA); in vulcan_map_irq()
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| D | nslu2-pci.c | 26 #define INTA 11 macro
33 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); in nslu2_pci_preinit()
42 IXP4XX_GPIO_IRQ(INTA), in nslu2_map_irq()
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| D | gtwx5715-pci.c | 23 #define INTA 10 /* slot 1 has INTA and INTB crossed */ macro
34 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); in gtwx5715_pci_preinit()
46 rc = IXP4XX_GPIO_IRQ(INTA); in gtwx5715_map_irq()
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| D | miccpt-pci.c | 30 #define INTA 1 macro
38 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); in miccpt_pci_preinit()
48 IXP4XX_GPIO_IRQ(INTA), in miccpt_map_irq()
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| D | avila-pci.c | 33 #define INTA 11 macro
40 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); in avila_pci_preinit()
50 IXP4XX_GPIO_IRQ(INTA), in avila_map_irq()
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| D | ixdp425-pci.c | 29 #define INTA 11 macro
37 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); in ixdp425_pci_preinit()
47 IXP4XX_GPIO_IRQ(INTA), in ixdp425_map_irq()
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| D | fsg-pci.c | 27 #define INTA 6 macro
33 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); in fsg_pci_preinit()
44 IXP4XX_GPIO_IRQ(INTA), in fsg_map_irq()
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| D | nas100d-pci.c | 26 #define INTA 11 macro
34 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); in nas100d_pci_preinit()
45 { IXP4XX_GPIO_IRQ(INTA), -1, -1 }, in nas100d_map_irq()
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| D | dsmg600-pci.c | 27 #define INTA 11 macro
36 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); in dsmg600_pci_preinit()
49 { IXP4XX_GPIO_IRQ(INTA), -1, -1 }, in dsmg600_map_irq()
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| /arch/powerpc/boot/dts/ |
| D | holly.dts | 157 | The INTA, INTB, INTC, INTD are shared.
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| D | katmai.dts | 305 * have to be enabled via jumpers (only INTA is
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| /arch/arm64/boot/dts/socionext/ |
| D | uniphier-pxs3.dtsi | 762 interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */
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| D | uniphier-ld20.dtsi | 904 interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */
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