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Searched refs:MCFINTC_ICR0 (Results 1 – 6 of 6) sorted by relevance

/arch/m68k/include/asm/
Dm520xsim.h33 #define MCFINTC_ICR0 0x40 /* Base ICR register */ macro
42 #define MCFINTC0_ICR0 (MCFICM_INTC0 + MCFINTC_ICR0)
Dm54xxsim.h34 #define MCFINTC_ICR0 0x40 /* Base ICR register */ macro
Dm523xsim.h35 #define MCFINTC_ICR0 0x40 /* Base ICR register */ macro
Dm528xsim.h35 #define MCFINTC_ICR0 0x40 /* Base ICR register */ macro
Dm527xsim.h35 #define MCFINTC_ICR0 0x40 /* Base ICR register */ macro
/arch/m68k/coldfire/
Dintc-2.c122 icraddr += MCFINTC_ICR0 + (irq & 0x3f); in intc_irq_startup()