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Searched refs:MCFSIM_CSAR0 (Results 1 – 4 of 4) sorted by relevance

/arch/m68k/include/asm/
Dm5407sim.h51 #define MCFSIM_CSAR0 (MCF_MBAR + 0x80) /* CS 0 Address reg */ macro
Dm5206sim.h62 #define MCFSIM_CSAR0 (MCF_MBAR + 0x64) /* CS 0 Address reg */ macro
Dm5307sim.h51 #define MCFSIM_CSAR0 (MCF_MBAR + 0x80) /* CS 0 Address reg */ macro
Dm525xsim.h55 #define MCFSIM_CSAR0 (MCF_MBAR + 0x80) /* CS 0 Address reg */ macro