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Searched refs:MIPS_CPU_RIXI (Results 1 – 3 of 3) sorted by relevance

/arch/mips/include/asm/
Dcpu.h378 #define MIPS_CPU_RIXI BIT_ULL(23) /* CPU has TLB Read/eXec Inhibit */ macro
Dcpu-features.h229 #define cpu_has_rixi __isa_ge_or_opt(6, MIPS_CPU_RIXI)
/arch/mips/kernel/
Dcpu-probe.c738 c->options |= MIPS_CPU_RIXI | MIPS_CPU_CTXTC; in decode_config3()
741 c->options |= MIPS_CPU_RIXI; in decode_config3()
1839 c->options |= MIPS_CPU_RIXI; in cpu_probe_broadcom()
1855 c->options |= MIPS_CPU_ULRI | MIPS_CPU_RIXI; in cpu_probe_broadcom()