Searched refs:MMC_PAD_CFG (Results 1 – 2 of 2) sorted by relevance
52 #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ macro69 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()71 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()73 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()75 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()77 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()78 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG); in mxc_mmc1_init()
77 #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ macro88 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG); in mxc_mmc1_init()89 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG); in mxc_mmc1_init()90 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG); in mxc_mmc1_init()91 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG); in mxc_mmc1_init()92 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG); in mxc_mmc1_init()93 mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG); in mxc_mmc1_init()