Searched refs:MSR_P4_CRU_ESCR0 (Results 1 – 3 of 3) sorted by relevance
| /arch/x86/oprofile/ |
| D | op_model_p4.c | 117 { { CTR_IQ_4, MSR_P4_CRU_ESCR0},
315 { { CTR_IQ_4, MSR_P4_CRU_ESCR0},
321 { { CTR_IQ_4, MSR_P4_CRU_ESCR0},
|
| /arch/x86/events/intel/ |
| D | p4.c | 437 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
447 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
473 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
500 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
1137 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR0),
|
| /arch/x86/include/asm/ |
| D | msr-index.h | 842 #define MSR_P4_CRU_ESCR0 0x000003b8 macro
|