Searched refs:MX31_AIPS2_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance
55 #define MX31_AIPS2_BASE_ADDR 0x53f00000 macro57 #define MX31_CCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x80000)58 #define MX31_CSPI3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x84000)59 #define MX31_FIRI_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x8c000)60 #define MX31_GPT1_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x90000)61 #define MX31_EPIT1_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x94000)62 #define MX31_EPIT2_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x98000)63 #define MX31_GPIO3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xa4000)64 #define MX31_SCC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xac000)65 #define MX31_SCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xae000)[all …]
197 imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS2_BASE_ADDR)); in imx31_soc_init()