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Searched refs:NODE (Results 1 – 23 of 23) sorted by relevance

/arch/powerpc/include/asm/
Dpci-bridge.h264 #define PHB_SET_NODE(PHB, NODE) ((PHB)->node = (NODE)) argument
266 #define PHB_SET_NODE(PHB, NODE) ((PHB)->node = NUMA_NO_NODE) argument
/arch/powerpc/perf/
De6500-pmu.c77 [C(NODE)] = {
De500-pmu.c76 [C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
Dgeneric-compat-pmu.c189 [ C(NODE) ] = {
Dmpc7450-pmu.c388 [C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
Dpower8-pmu.c341 [ C(NODE) ] = {
Dppc970-pmu.c466 [C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
Dpower7-pmu.c366 [C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
Dpower6-pmu.c515 [C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
Dpower9-pmu.c398 [ C(NODE) ] = {
Dpower5-pmu.c594 [C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
Dpower5+-pmu.c652 [C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
/arch/s390/numa/
Dmode_emu.c48 enum toptree_level {CORE, MC, BOOK, DRAWER, NODE, TOPOLOGY}; enumerator
199 toptree_for_each(node, numa, NODE) { in node_for_core()
265 toptree_for_each(node, numa, NODE) in move_level_to_numa()
/arch/arm64/kernel/
Dperf_event.c80 [C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD,
81 [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
97 [C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD,
98 [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
146 [C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD,
147 [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
/arch/arc/include/asm/
Dperf_event.h212 [C(NODE)] = {
/arch/sh/kernel/cpu/sh4a/
Dperf_event.c206 [ C(NODE) ] = {
/arch/sh/kernel/cpu/sh4/
Dperf_event.c181 [ C(NODE) ] = {
/arch/x86/events/amd/
Dcore.c106 [ C(NODE) ] = {
210 [C(NODE)] = {
/arch/x86/events/intel/
Dcore.c511 [ C(NODE) ] = {
552 [ C(NODE) ] = {
634 [ C(NODE) ] = {
745 [ C(NODE) ] = {
895 [ C(NODE) ] = {
934 [ C(NODE) ] = {
1057 [ C(NODE) ] = {
1125 [ C(NODE) ] = {
1240 [ C(NODE) ] = {
4942 hw_cache_extra_regs[C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = HSW_DEMAND_READ| in intel_pmu_init()
[all …]
Dp4.c561 [ C(NODE) ] = {
/arch/nds32/include/asm/
Dpmu.h362 [C(NODE)] = { /* What is NODE? */
/arch/sparc/kernel/
Dperf_event.c305 [C(NODE)] = {
443 [C(NODE)] = {
578 [C(NODE)] = {
715 [C(NODE)] = {
/arch/csky/kernel/
Dperf_event.c862 [C(NODE)] = {