Searched refs:PLD (Results 1 – 9 of 9) sorted by relevance
| /arch/arm/lib/ |
| D | copy_page.S | 14 #define COPY_COUNT (PAGE_SZ / (2 * L1_CACHE_BYTES) PLD( -1 ))
26 PLD( pld [r1, #0] )
27 PLD( pld [r1, #L1_CACHE_BYTES] )
30 1: PLD( pld [r1, #2 * L1_CACHE_BYTES])
31 PLD( pld [r1, #3 * L1_CACHE_BYTES])
41 PLD( ldmiaeq r1!, {r3, r4, ip, lr} )
42 PLD( beq 2b )
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| D | memmove.S | 44 PLD( pld [r1, #-4] )
66 PLD( pld [r1, #-4] )
67 2: PLD( subs r2, r2, #96 )
68 PLD( pld [r1, #-32] )
69 PLD( blt 4f )
70 PLD( pld [r1, #-64] )
71 PLD( pld [r1, #-96] )
73 3: PLD( pld [r1, #-128] )
78 PLD( cmn r2, #96 )
79 PLD( bge 4b )
[all …]
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| D | copy_template.S | 83 PLD( pld [r1, #0] )
105 PLD( pld [r1, #0] )
106 2: PLD( subs r2, r2, #96 )
107 PLD( pld [r1, #28] )
108 PLD( blt 4f )
109 PLD( pld [r1, #60] )
110 PLD( pld [r1, #92] )
112 3: PLD( pld [r1, #124] )
117 PLD( cmn r2, #96 )
118 PLD( bge 4b )
[all …]
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| /arch/arm/boot/dts/ |
| D | integratorcp.dts | 298 * This port is routed through a PLD (Programmable
301 * external panel connector. The PLD is essential for
305 * The PLD is managed through a few special bits in the
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| D | intel-ixp43x-gateworks-gw2358.dts | 70 /* This PLD just handles the LED and user button */
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| D | versatile-ab.dts | 277 * This port is routed through a PLD (Programmable
280 * external panel connector. The PLD is essential for
284 * The PLD is managed through a few special bits in the
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| /arch/arm/include/asm/ |
| D | assembler.h | 67 #define PLD(code...) code macro
69 #define PLD(code...) macro
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| /arch/x86/events/intel/ |
| D | uncore_nhmex.c | 535 MBOX_INC_SEL_EXTAR_REG(0xa, PLD),
536 MBOX_INC_SEL_EXTAR_REG(0xb, PLD),
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| /arch/arm/ |
| D | Kconfig | 880 the L1 caching of the NEON accesses and disables the PLD instruction
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