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Searched refs:SP (Results 1 – 25 of 40) sorted by relevance

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/arch/sh/kernel/cpu/sh5/
Dentry.S254 putcon SP, KCR1
257 movi reg_save_area, SP
258 st.q SP, SAVED_R2, r2
259 st.q SP, SAVED_R3, r3
260 st.q SP, SAVED_R4, r4
261 st.q SP, SAVED_R5, r5
262 st.q SP, SAVED_R6, r6
263 st.q SP, SAVED_R18, r18
265 st.q SP, SAVED_TR0, r3
272 or SP, ZERO, r5
[all …]
/arch/c6x/kernel/
Dentry.S19 #define SP B15 macro
40 SHR .S1X SP,THREAD_SHIFT,reg
48 STW .D2T2 B0,*SP--[2] ; save original B0
54 STW .D2T2 B1,*+SP[1] ; save original B1
55 XOR .D2 SP,B1,B0 ; (SP ^ KSP)
56 LDW .D2T2 *+SP[1],B1 ; restore B0/B1
57 LDW .D2T2 *++SP[2],B0
59 [B0] STDW .D2T2 SP:DP,*--B1[1] ; user: save user sp/dp kstack
60 [B0] MV .S2 B1,SP ; and switch to kstack
61 ||[!B0] STDW .D2T2 SP:DP,*--SP[1] ; kernel: save on current stack
[all …]
Dswitch_to.S10 #define SP B15 macro
42 ;; Switch to next SP
43 MV .S2 B7,SP
/arch/powerpc/platforms/cell/spufs/
Dspu_save_crt0.S63 il $SP, 16368
64 stqd $0, 0($SP)
70 stqd $SP, -160($SP)
71 ai $SP, $SP, -160
Dspu_restore_crt0.S29 il $SP, 16368
30 stqd $0, 0($SP)
36 stqd $SP, -160($SP)
37 ai $SP, $SP, -160
/arch/arm/kernel/
Dunwind.c74 SP = 13, enumerator
247 unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; in unwind_exec_pop_subset_r4_to_r13()
259 ctrl->vrs[SP] = (unsigned long)vsp; in unwind_exec_pop_subset_r4_to_r13()
267 unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; in unwind_exec_pop_r4_to_rN()
279 ctrl->vrs[SP] = (unsigned long)vsp; in unwind_exec_pop_r4_to_rN()
287 unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; in unwind_exec_pop_subset_r0_to_r3()
298 ctrl->vrs[SP] = (unsigned long)vsp; in unwind_exec_pop_subset_r0_to_r3()
337 ctrl->vrs[SP] += ((insn & 0x3f) << 2) + 4; in unwind_exec_insn()
339 ctrl->vrs[SP] -= ((insn & 0x3f) << 2) + 4; in unwind_exec_insn()
356 ctrl->vrs[SP] = ctrl->vrs[insn & 0x0f]; in unwind_exec_insn()
[all …]
Dentry-ftrace.S76 add ip, sp, #12 @ move in IP the value of SP as it was
90 @ R0 | R1 | ... | LR | SP + 4 | previous LR | LR | PSR | OLD_R0 |
118 ldr sp, [sp, #0] @ restore SP
138 ldr sp, [sp, #0] @ restore SP
Dsleep.S69 mov r5, sp @ current virtual SP
81 1: mov r2, r5 @ virtual SP
91 ldmia sp!, {r1 - r3} @ pop phys pgd, virt SP, phys resume fn
/arch/arc/include/asm/
Dentry-arcv2.h52 ; 1. SP auto-switched to kernel mode stack
77 ; 1. SP auto-switched to kernel mode stack
145 ; - K mode: add the offset from current SP where H/w starts auto push
148 ; 2. Upon entry SP is always saved (for any inspection, unwinding etc),
151 lr r10, [AUX_USER_SP] ; U mode SP variable
155 add.nz r10, r10, SZ_PT_REGS ; K mode SP
157 st r10, [sp, PT_sp] ; SP (pt_regs->sp)
178 ; Restore SP (into AUX_USER_SP) only if returning to U mode
242 btst r0, STATUS_U_BIT ; Z flag set if K, used in restoring SP
Dentry.h134 mov r12, sp ; save SP as ref to pt_regs
193 ; SP is back to start of pt_regs
/arch/x86/crypto/
Dserpent-sse2-x86_64-asm_64.S565 #define SP(SBOX, x0, x1, x2, x3, x4, i) \ macro
701 SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);
702 SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);
703 SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);
704 SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);
705 SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);
706 SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);
707 SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);
708 SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);
709 SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);
[all …]
Dserpent-avx-x86_64-asm_64.S530 #define SP(SBOX, x0, x1, x2, x3, x4, i) \ macro
626 SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);
627 SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);
628 SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);
629 SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);
630 SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);
631 SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);
632 SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);
633 SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);
634 SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);
[all …]
Dserpent-avx2-asm_64.S536 #define SP(SBOX, x0, x1, x2, x3, x4, i) \ macro
632 SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);
633 SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);
634 SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);
635 SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);
636 SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);
637 SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);
638 SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);
639 SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);
640 SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);
[all …]
/arch/arm/probes/
Ddecode-thumb.c105 REGS(SP, 0, SP, 0, NOSPPC)),
114 REGS(SP, 0, NOPC, 0, NOSPPC)),
167 REGS(SP, 0, NOPC, 0, 0)),
198 REGS(SP, 0, SP, 0, 0)),
/arch/sh/kernel/
Dhead_64.S276 movi init_thread_union, SP
277 putcon SP, KCR0 /* Set current to init_task */
279 add SP, r22, SP
/arch/x86/kernel/
Dvm86_32.c82 #define SP(regs) (*(unsigned short *)&((regs)->pt.sp)) macro
559 SP(regs) -= 6; in do_int()
579 do_int(regs, trapno, (unsigned char __user *) (regs->pt.ss << 4), SP(regs)); in handle_vm86_trap()
607 sp = SP(regs); in handle_vm86_fault()
634 SP(regs) -= 4; in handle_vm86_fault()
637 SP(regs) -= 2; in handle_vm86_fault()
648 SP(regs) += 4; in handle_vm86_fault()
651 SP(regs) += 2; in handle_vm86_fault()
687 SP(regs) += 12; in handle_vm86_fault()
692 SP(regs) += 6; in handle_vm86_fault()
/arch/m68k/ifpsp060/
Dfpsp.doc169 - documented in 3.5 of 060SP spec.
177 - documented in 3.5 of 060SP spec.
185 - documented in 3.7 of 060SP spec.
193 - documented in 3.6 of 060SP spec.
202 - documented in 3.4 of 060SP spec.
214 - documented in 3.4 of 060SP spec.
227 - not fully documented in 060SP spec.
264 - documented in 3.1 of 060SP spec.
DCHANGES51 a failing value to the 68060SP, the package ignores
97 stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
119 stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
/arch/sparc/net/
Dbpf_jit_64.h18 #define SP 0x0e macro
Dbpf_jit_32.h29 #define SP 0x0e macro
Dbpf_jit_comp_32.c212 do { *prog++ = LD32I | RS1(SP) | S13(BIAS - (OFF)) | RD(DEST); \
216 do { *prog++ = ST32I | RS1(SP) | S13(BIAS - (OFF)) | RD(SRC); \
292 *prog++ = (SUB | IMMED | RS1(SP) | S13(SZ) | RD(SP))
295 *prog++ = (ADD | IMMED | RS1(SP) | S13(SZ) | RD(SP))
/arch/mips/kvm/
Dentry.c50 #define SP 29 macro
225 UASM_i_ADDIU(&p, K1, SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_vcpu_run()
249 UASM_i_SW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_vcpu_run()
771 UASM_i_LW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_exit()
774 UASM_i_ADDIU(&p, SP, SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_exit()
782 kvm_mips_build_restore_scratch(&p, K0, SP); in kvm_mips_build_exit()
799 UASM_i_ADDIU(&p, SP, SP, -CALLFRAME_SIZ); in kvm_mips_build_exit()
/arch/sh/include/cpu-sh5/cpu/
Dregisters.h55 #define SP r15
/arch/x86/um/
Dsignal.c177 GETREG(SP, sp); in copy_sc_from_user()
256 PUTREG(SP, sp); in copy_sc_to_user()
279 PUTREG(SP, sp_at_signal); in copy_sc_to_user()
/arch/arm/mm/
Dabort-lv4t.S216 addeq r7, r7, r6, lsl #2 @ increment SP if PUSH
217 subne r7, r7, r6, lsl #2 @ decrement SP if POP

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