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Searched refs:V0 (Results 1 – 6 of 6) sorted by relevance

/arch/mips/kvm/
Dentry.c25 #define V0 2 macro
233 uasm_i_mfc0(&p, V0, C0_STATUS); in kvm_mips_build_vcpu_run()
234 UASM_i_SW(&p, V0, offsetof(struct pt_regs, cp0_status), K1); in kvm_mips_build_vcpu_run()
272 uasm_i_andi(&p, V0, V0, ST0_IM); in kvm_mips_build_vcpu_run()
273 uasm_i_or(&p, K0, K0, V0); in kvm_mips_build_vcpu_run()
666 uasm_i_mfc0(&p, V0, C0_STATUS); in kvm_mips_build_exit()
669 uasm_i_or(&p, K0, V0, AT); in kvm_mips_build_exit()
684 uasm_i_and(&p, V1, V0, AT); in kvm_mips_build_exit()
758 uasm_i_and(&p, V0, V0, AT); in kvm_mips_build_exit()
760 uasm_i_or(&p, V0, V0, AT); in kvm_mips_build_exit()
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/arch/sh/lib/
Dmemset.S34 swap.b r5,r0 ! V0
Dmemset-sh4.S32 swap.b r5,r0 ! V0
/arch/s390/crypto/
Dprng.c268 static const u8 V0[] __initconst = { in prng_sha512_selftest() local
342 if (memcmp(ws.V, V0, sizeof(V0)) != 0 in prng_sha512_selftest()
/arch/arm/boot/dts/
Dimx27-phytec-phycore-som.dtsi34 regulator-name = "5V0";
Dimx6sx-sdb.dtsi86 regulator-name = "PSU-5V0";