| /arch/arm/mach-imx/devices/ |
| D | platform-imx-uart.c | 9 #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ argument
12 .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
14 .irqrx = soc ## _INT_UART ## _hwid ## RX, \
15 .irqtx = soc ## _INT_UART ## _hwid ## TX, \
16 .irqrts = soc ## _INT_UART ## _hwid ## RTS, \
19 #define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \ argument
22 .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
24 .irq = soc ## _INT_UART ## _hwid, \
29 #define imx21_imx_uart_data_entry(_id, _hwid) \ argument
30 imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K)
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| D | platform-imx-ssi.c | 9 #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ argument
12 .iobase = soc ## _SSI ## _hwid ## _BASE_ADDR, \
14 .irq = soc ## _INT_SSI ## _hwid, \
15 .dmatx0 = soc ## _DMA_REQ_SSI ## _hwid ## _TX0, \
16 .dmarx0 = soc ## _DMA_REQ_SSI ## _hwid ## _RX0, \
17 .dmatx1 = soc ## _DMA_REQ_SSI ## _hwid ## _TX1, \
18 .dmarx1 = soc ## _DMA_REQ_SSI ## _hwid ## _RX1, \
23 #define imx21_imx_ssi_data_entry(_id, _hwid) \ argument
24 imx_imx_ssi_data_entry(MX21, _id, _hwid, SZ_4K)
32 #define imx27_imx_ssi_data_entry(_id, _hwid) \ argument
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| D | platform-mxc-mmc.c | 11 #define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \ argument
15 .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \
17 .irq = soc ## _INT_SDHC ## _hwid, \
18 .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \
20 #define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \ argument
21 [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)
25 #define imx21_mxc_mmc_data_entry(_id, _hwid) \ argument
26 imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K)
34 #define imx27_mxc_mmc_data_entry(_id, _hwid) \ argument
35 imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K)
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| D | platform-imx-i2c.c | 9 #define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \ argument
13 .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \
15 .irq = soc ## _INT_I2C ## _hwid, \
18 #define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \ argument
19 [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)
28 #define imx27_imx_i2c_data_entry(_id, _hwid) \ argument
29 imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K)
37 #define imx31_imx_i2c_data_entry(_id, _hwid) \ argument
38 imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K)
47 #define imx35_imx_i2c_data_entry(_id, _hwid) \ argument
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| D | platform-flexcan.c | 8 #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \ argument
11 .iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \
13 .irq = soc ## _INT_CAN ## _hwid, \
16 #define imx_flexcan_data_entry(soc, _id, _hwid, _size) \ argument
17 [_id] = imx_flexcan_data_entry_single(soc, _id, _hwid, _size)
21 #define imx35_flexcan_data_entry(_id, _hwid) \ argument
22 imx_flexcan_data_entry(MX35, _id, _hwid, SZ_16K)
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| D | platform-spi_imx.c | 23 #define imx21_cspi_data_entry(_id, _hwid) \ argument
24 imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K)
32 #define imx27_cspi_data_entry(_id, _hwid) \ argument
33 imx_spi_imx_data_entry(MX27, CSPI, "imx27-cspi", _id, _hwid, SZ_4K)
42 #define imx31_cspi_data_entry(_id, _hwid) \ argument
43 imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K)
52 #define imx35_cspi_data_entry(_id, _hwid) \ argument
53 imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K)
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| D | platform-imx2-wdt.c | 11 #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \ argument
14 .iobase = soc ## _WDOG ## _hwid ## _BASE_ADDR, \
17 #define imx_imx2_wdt_data_entry(soc, _id, _hwid, _size) \ argument
18 [_id] = imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size)
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| D | platform-sdhci-esdhc-imx.c | 25 #define imx35_sdhci_esdhc_imx_data_entry(_id, _hwid) \ argument
26 imx_sdhci_esdhc_imx_data_entry(MX35, "sdhci-esdhc-imx35", _id, _hwid)
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