| /arch/riscv/lib/ |
| D | memset.S | 28 sb a1, 0(t0)
35 andi a1, a1, 0xff
36 slli a3, a1, 8
37 or a1, a3, a1
38 slli a3, a1, 16
39 or a1, a3, a1
41 slli a3, a1, 32
42 or a1, a3, a1
66 REG_S a1, 0(t0)
67 REG_S a1, SZREG(t0)
[all …]
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| D | memcpy.S | 18 andi a4, a1, SZREG-1
26 andi a3, a1, ~(SZREG-1)
29 sub a4, a3, a1
31 lb a5, 0(a1)
32 addi a1, a1, 1
35 bltu a1, a3, 1b
41 add a3, a1, a4
43 REG_L a4, 0(a1)
44 REG_L a5, SZREG(a1)
45 REG_L a6, 2*SZREG(a1)
[all …]
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| D | tishift.S | 17 sll a4,a1,a4
18 srl a2,a1,a2
20 mv a1,a2
26 srl a0,a1,a0
27 mv a1,a2
40 sll a4,a1,a4
41 sra a2,a1,a2
43 mv a1,a2
48 srai a2,a1,0x3f
49 sra a0,a1,a0
[all …]
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| D | uaccess.S | 23 add a3, a1, a2
26 andi t1, a1, SZREG-1
29 addi t0, a1, SZREG-1
38 bltu a1, t0, 4f
40 fixup REG_L, t2, (a1), 10f
42 addi a1, a1, SZREG
44 bltu a1, t1, 1b
46 bltu a1, a3, 5f
54 fixup lbu, t2, (a1), 10f
56 addi a1, a1, 1
[all …]
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| /arch/xtensa/kernel/ |
| D | stacktrace.c | 33 unsigned long a1 = regs->areg[1]; in xtensa_backtrace_user() local
42 frame.sp = a1; in xtensa_backtrace_user()
77 a1 = regs->areg[index * 4 + 1]; in xtensa_backtrace_user()
80 frame.sp = a1; in xtensa_backtrace_user()
99 if (!access_ok(&SPILL_SLOT(a1, 0), 8)) in xtensa_backtrace_user()
102 if (__get_user(a0, &SPILL_SLOT(a1, 0)) || in xtensa_backtrace_user()
103 __get_user(a1, &SPILL_SLOT(a1, 1))) in xtensa_backtrace_user()
107 frame.sp = a1; in xtensa_backtrace_user()
124 unsigned long a1 = regs->areg[1]; in xtensa_backtrace_kernel() local
126 sp_start = a1 & ~(THREAD_SIZE - 1); in xtensa_backtrace_kernel()
[all …]
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| D | entry.S | 136 s32i a1, a2, PT_AREG1
139 mov a1, a2
150 s32i a3, a1, PT_SAR
151 s32i a2, a1, PT_ICOUNTLEVEL
155 s32i a2, a1, PT_THREADPTR
164 s32i a2, a1, PT_WINDOWBASE
165 s32i a3, a1, PT_WINDOWSTART
169 s32i a2, a1, PT_WMASK # needed for restoring registers
174 s32i a4, a1, PT_AREG4
175 s32i a5, a1, PT_AREG5
[all …]
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| D | coprocessor.S | 138 s32i a1, a2, PT_AREG1
140 mov a1, a2
142 s32i a2, a1, PT_AREG2
148 s32i a4, a1, PT_AREG4
149 s32i a5, a1, PT_AREG5
150 s32i a6, a1, PT_AREG6
203 1: GET_THREAD_INFO (a4, a1)
218 1: l32i a6, a1, PT_AREG6
219 l32i a5, a1, PT_AREG5
220 l32i a4, a1, PT_AREG4
[all …]
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| /arch/m68k/kernel/ |
| D | head.S | 602 lea %pc@(m68k_machtype),%a1
603 movel %a0@,%a1@
606 lea %pc@(m68k_fputype),%a1
607 movel %a0@,%a1@
610 lea %pc@(m68k_mmutype),%a1
611 movel %a0@,%a1@
614 lea %pc@(m68k_cputype),%a1
615 movel %a0@,%a1@
628 lea %pc@(L(mac_videobase)),%a1
629 movel %a0@,%a1@
[all …]
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| /arch/alpha/lib/ |
| D | stxcpy.S | 48 mskqh t2, a1, t2 # e0 : detection in the src word
49 mskqh t1, a1, t3 # e0 :
51 mskql t0, a1, t0 # e0 : assemble the first output word
63 ldq_u t1, 0(a1) # e0 :
64 addq a1, 8, a1 # .. e1 :
103 xor a0, a1, t0 # e0 :
109 ldq_u t1, 0(a1) # e0 : load first src word
111 addq a1, 8, a1 # e0 :
132 ldq_u t2, 8(a1) # e0 :
133 addq a1, 8, a1 # .. e1 :
[all …]
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| D | ev6-stxcpy.S | 59 mskqh t2, a1, t2 # U : detection in the src word (stall)
60 mskqh t1, a1, t3 # U :
63 mskql t0, a1, t0 # U : assemble the first output word
79 ldq_u t1, 0(a1) # L : Latency=3
80 addq a1, 8, a1 # E :
123 xor a0, a1, t0 # E :
129 ldq_u t1, 0(a1) # L : load first src word
131 addq a1, 8, a1 # E :
155 ldq_u t2, 8(a1) # L :
156 addq a1, 8, a1 # E :
[all …]
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| D | stxncpy.S | 56 mskqh t2, a1, t2 # e0 : detection in the src word
57 mskqh t1, a1, t3 # e0 :
59 mskql t0, a1, t0 # e0 : assemble the first output word
71 ldq_u t0, 0(a1) # e0 :
72 addq a1, 8, a1 # .. e1 :
122 xor a0, a1, t1 # e0 :
135 ldq_u t1, 0(a1) # e0 : load first src word
136 addq a1, 8, a1 # .. e1 :
158 ldq_u t2, 8(a1) # e0 : load second src word
159 addq a1, 8, a1 # .. e1 :
[all …]
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| D | strchr.S | 22 zapnot a1, 1, a1 # e0 : zero extend the search character
24 sll a1, 8, t5 # e0 : replicate the search character
26 or t5, a1, a1 # e0 :
28 sll a1, 16, t5 # e0 :
31 or t5, a1, a1 # .. e1 :
32 sll a1, 32, t5 # e0 :
34 or t5, a1, a1 # e0 :
35 xor t0, a1, t1 # .. e1 : make bytes == c zero
44 xor t0, a1, t1 # .. e1 (ev5 data stall)
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| D | ev67-strchr.S | 33 and a1, 0xff, t3 # E : 00000000000000ch
34 insbl a1, 1, t5 # U : 000000000000ch00
35 insbl a1, 7, a2 # U : ch00000000000000
38 or t5, t3, a1 # E : 000000000000chch
44 inswl a1, 2, t5 # E : 00000000chch0000
45 inswl a1, 4, a3 # E : 0000chch00000000
47 or a1, a2, a1 # E : chch00000000chch
53 or t5, a1, a1 # E : chchchchchchchch
54 xor t0, a1, t1 # E : make bytes == c zero
71 xor t0, a1, t1 # E :
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| /arch/csky/abiv2/ |
| D | mcount.S | 28 stw a1, (sp, 4)
37 ldw a1, (sp, 4)
50 stw a1, (sp, 4)
58 ldw a1, (sp, 4)
81 lrw a1, ftrace_stub
82 cmpne r26, a1
87 ldw a1, (sp, 24)
98 lrw a1, ftrace_stub
99 cmpne a0, a1
104 lrw a1, ftrace_graph_entry_stub
[all …]
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| D | strcpy.S | 10 andi t0, a1, 3
14 ldw a2, (a1)
19 ldw a2, (a1, 4)
24 ldw a2, (a1, 8)
29 ldw a2, (a1, 12)
34 ldw a2, (a1, 16)
39 ldw a2, (a1, 20)
44 ldw a2, (a1, 24)
49 ldw a2, (a1, 28)
55 addi a1, 32
[all …]
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| D | strcmp.S | 10 xor a2, a3, a1
19 ldw t1, (a1, 0)
29 ldw t1, (a1, 4)
36 ldw t1, (a1, 8)
43 ldw t1, (a1, 12)
50 ldw t1, (a1, 16)
57 ldw t1, (a1, 20)
64 ldw t1, (a1, 24)
71 ldw t1, (a1, 28)
78 addi a1, 32
[all …]
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| /arch/m68k/math-emu/ |
| D | fp_move.S | 78 lea (FPD_TEMPFP1,FPDATA),%a1
79 move.l (%a0)+,(%a1)+
80 move.l (%a0)+,(%a1)+
81 move.l (%a0),(%a1)
82 lea (-8,%a1),%a0
179 move.l %a0,%a1
203 putuser.l %d0,(%a1),fp_err_ua1,%a1
208 putuser.l %d0,(%a1),fp_err_ua1,%a1
216 putuser.l %d0,(%a1)+,fp_err_ua1,%a1
218 putuser.l %d0,(%a1)+,fp_err_ua1,%a1
[all …]
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| D | fp_movem.S | 133 lea (FPD_FPREG,FPDATA),%a1
137 lea (-12,%a1,%d0*8),%a1
143 1: printf PMOVEM,"(%p>%p)",2,%a0,%a1
148 move.l %d2,(%a1)+
150 move.l %d2,(%a1)+
152 move.l %d2,(%a1)
154 subq.l #8,%a1
156 2: add.l %d0,%a1
162 1: printf PMOVEM,"(%p>%p)",2,%a1,%a0
163 move.l (%a1)+,%d2
[all …]
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| /arch/mips/kernel/ |
| D | r4k_fpu.S | 156 EX sw t1, 0(a1)
171 EX lw t1, 0(a1)
245 op_one_wr \op, 0, a1
246 op_one_wr \op, 1, a1
247 op_one_wr \op, 2, a1
248 op_one_wr \op, 3, a1
249 op_one_wr \op, 4, a1
250 op_one_wr \op, 5, a1
251 op_one_wr \op, 6, a1
252 op_one_wr \op, 7, a1
[all …]
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| /arch/riscv/kernel/ |
| D | head.S | 94 mv s1, a1
116 li a1, PAGE_OFFSET
118 sub a1, a1, a2
119 add ra, ra, a1
123 add a2, a2, a1
128 li a1, SATP_MODE
129 or a2, a2, a1
139 or a0, a0, a1
172 la a1, __cpu_up_stack_pointer
174 add a1, a3, a1
[all …]
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| /arch/m68k/fpsp040/ |
| D | x_store.S | 44 lea fpreg_mask,%a1
45 moveb (%a1,%d0.w),%d0 |convert reg# to dynamic register mask
89 movel %a0,%a1 |save source addr in a1
104 | a1 -> source in extended precision
107 | a1 -> destroyed
132 movew LOCAL_EX(%a1),%d0 |get exponent
139 tstb LOCAL_SGN(%a1)
146 clrl LOCAL_HI(%a1) |clear msb
147 tstb LOCAL_SGN(%a1)
151 movel %d0,LOCAL_EX(%a1) |put the new exp back on the stack
[all …]
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| /arch/m68k/68000/ |
| D | head.S | 181 moveal #_sdata, %a1
184 movel %a0@+, %a1@+
185 cmpal %a1, %a2
195 lea __bss_stop,%a1
196 movel %a1,_ramstart
208 lea __bss_stop, %a1 /* set up destination */
216 addl %d0, %a1 /* copy from end */
217 movel %a1, _ramstart /* set start of ram */
219 movel -(%a0), -(%a1) /* copy dword */
228 lea __bss_stop, %a1 /* get end of bss */
[all …]
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| /arch/mips/lib/ |
| D | memset.S | 34 #define FILL64RG a1
102 move t8, a1 /* used by 'swp' instruction */
103 move t9, a1
121 EX(LONG_S_L, a1, (a0), .Lfirst_fixup\@) /* make word/dword aligned */
123 EX(LONG_S_R, a1, (a0), .Lfirst_fixup\@) /* make word/dword aligned */
130 EX(sb, a1, N(a0), .Lbyte_fixup\@); \
141 EX(sb, a1, 2(a0), .Lbyte_fixup\@)
147 EX(sb, a1, 6(a0), .Lbyte_fixup\@)
193 EX(LONG_S_R, a1, -1(a0), .Llast_fixup\@)
195 EX(LONG_S_L, a1, -1(a0), .Llast_fixup\@)
[all …]
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| /arch/x86/include/asm/xen/ |
| D | hypercall.h | 127 #define __HYPERCALL_1ARG(a1) \ argument
128 __HYPERCALL_0ARG() __arg1 = (unsigned long)(a1);
129 #define __HYPERCALL_2ARG(a1,a2) \ argument
130 __HYPERCALL_1ARG(a1) __arg2 = (unsigned long)(a2);
131 #define __HYPERCALL_3ARG(a1,a2,a3) \ argument
132 __HYPERCALL_2ARG(a1,a2) __arg3 = (unsigned long)(a3);
133 #define __HYPERCALL_4ARG(a1,a2,a3,a4) \ argument
134 __HYPERCALL_3ARG(a1,a2,a3) __arg4 = (unsigned long)(a4);
135 #define __HYPERCALL_5ARG(a1,a2,a3,a4,a5) \ argument
136 __HYPERCALL_4ARG(a1,a2,a3,a4) __arg5 = (unsigned long)(a5);
[all …]
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| /arch/m68k/include/asm/ |
| D | m525xsim.h | 235 movel #0x80000001,%a1
236 movec %a1,#3086 /* map MBAR2 region */
237 subql #1,%a1 /* get MBAR2 address in a1 */
243 moveb %d0,0x16b(%a1) /* interrupt base register */
255 movel 0x180(%a1),%d0 /* get current PLL value */
257 movel %d0,0x180(%a1) /* set PLL register */
267 movel %d0,0x180(%a1) /* set PLL register */
269 movel %d0,0x180(%a1) /* set PLL register */
294 movel %d0,0x18c(%a1)
296 movel %d0,0x190(%a1)
[all …]
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