| /arch/sparc/lib/ |
| D | strncmp_32.S | 15 cmp %o2, 3
27 cmp %o0, 0
31 cmp %o0, %g2
43 cmp %o0, 0
47 cmp %o0, %g2
59 cmp %o0, 0
63 cmp %o0, %g2
75 cmp %o0, 0
79 cmp %o0, %g2
88 cmp %o4, 0
[all …]
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| D | memscan_32.S | 23 cmp %o1, 0
36 cmp %g3, 0
84 cmp %g2, 0
93 cmp %g2, 0
101 cmp %g2, 0
109 cmp %g2, 0
123 cmp %o2, 0
131 cmp %g2, %o1
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| /arch/powerpc/math-emu/ |
| D | fcmpu.c | 17 long cmp; in fcmpu() local
31 FP_CMP_D(cmp, A, B, 2); in fcmpu()
32 cmp = code[(cmp + 1) & 3]; in fcmpu()
35 __FPU_FPSCR |= (cmp << 12); in fcmpu()
38 *ccr |= (cmp << ((7 - crfD) << 2)); in fcmpu()
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| D | fcmpo.c | 17 long cmp; in fcmpo() local
34 FP_CMP_D(cmp, A, B, 2); in fcmpo()
35 cmp = code[(cmp + 1) & 3]; in fcmpo()
38 __FPU_FPSCR |= (cmp << 12); in fcmpo()
41 *ccr |= (cmp << ((7 - crfD) << 2)); in fcmpo()
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| /arch/nds32/math-emu/ |
| D | fcmps.c | 11 long cmp; in fcmps() local
16 FP_CMP_S(cmp, A, B, SF_CUN); in fcmps()
17 cmp += 2; in fcmps()
18 if (cmp == SF_CGT) in fcmps()
21 *(int *)ft = (cmp & cmpop) ? 0x1 : 0x0; in fcmps()
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| D | fcmpd.c | 11 long cmp; in fcmpd() local
16 FP_CMP_D(cmp, A, B, SF_CUN); in fcmpd()
17 cmp += 2; in fcmpd()
18 if (cmp == SF_CGT) in fcmpd()
21 *(long *)ft = (cmp & cmpop) ? 1 : 0; in fcmpd()
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| /arch/hexagon/lib/ |
| D | memset.S | 29 p0 = cmp.eq(r2, #0)
30 p1 = cmp.gtu(r2, #7)
59 p1 = cmp.eq(r2, #1)
72 p1 = cmp.eq(r2, #2)
84 p0 = cmp.gtu(r2, #7)
85 p1 = cmp.eq(r2, #4)
91 p0 = cmp.gtu(r2, #11)
98 p1 = cmp.eq(r3, #1)
114 p1 = cmp.eq(r2, #8)
125 p1 = cmp.eq(r2, #4)
[all …]
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| D | memcpy.S | 185 p2 = cmp.eq(len, #0); /* =0 */
187 p0 = cmp.gtu(len, #23); /* %1, <24 */
188 p1 = cmp.eq(ptr_in, ptr_out); /* attempt to overwrite self */
192 p3 = cmp.gtu(len, #95); /* %8 < 97 */
255 p3 = cmp.gtu(back, #8);
261 p1 = cmp.eq(prolog, #0);
267 nokernel = cmp.eq(kernel,#0);
276 p2 = cmp.eq(kernel, #1); /* skip ovr if kernel == 0 */
310 p2 = cmp.gtu(offset, #7);
322 p0 = cmp.gt(over, #0);
[all …]
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| /arch/sparc/net/ |
| D | bpf_jit_asm_32.S | 16 cmp r_OFF, 0
22 cmp r_TMP, 3
45 cmp r_OFF, 0
51 cmp r_TMP, 1
68 cmp r_OFF, 0
73 cmp r_OFF, r_HEADLEN
81 cmp r_OFF, 0
86 cmp r_OFF, r_HEADLEN
101 cmp %o0, 0; \
138 cmp %o0, 0; \
[all …]
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| /arch/mips/math-emu/ |
| D | sp_cmp.c | 12 int ieee754sp_cmp(union ieee754sp x, union ieee754sp y, int cmp, int sig) in ieee754sp_cmp() argument
30 return (cmp & IEEE754_CUN) != 0; in ieee754sp_cmp()
41 return (cmp & IEEE754_CLT) != 0; in ieee754sp_cmp()
43 return (cmp & IEEE754_CEQ) != 0; in ieee754sp_cmp()
45 return (cmp & IEEE754_CGT) != 0; in ieee754sp_cmp()
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| D | dp_cmp.c | 12 int ieee754dp_cmp(union ieee754dp x, union ieee754dp y, int cmp, int sig) in ieee754dp_cmp() argument
30 return (cmp & IEEE754_CUN) != 0; in ieee754dp_cmp()
41 return (cmp & IEEE754_CLT) != 0; in ieee754dp_cmp()
43 return (cmp & IEEE754_CEQ) != 0; in ieee754dp_cmp()
45 return (cmp & IEEE754_CGT) != 0; in ieee754dp_cmp()
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| /arch/arm/mach-tegra/ |
| D | reset-handler.S | 38 cmp r0, #0 @ CPU0?
44 cmp r6, #TEGRA20
60 cmp r8, r9
77 cmp r8, r9
97 cmp r1, #0
141 cmp r5, #0
146 cmp r6, #TEGRA20
162 cmp r6, #TEGRA30
188 cmp r6, #TEGRA20
192 cmp r10, #0
[all …]
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| /arch/arm/lib/ |
| D | lib1funcs.S | 67 1: cmp \divisor, #0x10000000
75 1: cmp \divisor, #0x80000000
86 1: cmp \dividend, \divisor
89 cmp \dividend, \divisor, lsr #1
92 cmp \dividend, \divisor, lsr #2
95 cmp \dividend, \divisor, lsr #3
98 cmp \dividend, #0 @ Early termination?
115 cmp \divisor, #(1 << 16)
120 cmp \divisor, #(1 << 8)
124 cmp \divisor, #(1 << 4)
[all …]
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| /arch/alpha/include/asm/ |
| D | xchg.h | 131 unsigned long prev, tmp, cmp, addr64; in ____cmpxchg() local
148 : "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64) in ____cmpxchg()
157 unsigned long prev, tmp, cmp, addr64; in ____cmpxchg() local
174 : "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64) in ____cmpxchg()
183 unsigned long prev, cmp; in ____cmpxchg() local
196 : "=&r"(prev), "=&r"(cmp), "=m"(*m) in ____cmpxchg()
205 unsigned long prev, cmp; in ____cmpxchg() local
218 : "=&r"(prev), "=&r"(cmp), "=m"(*m) in ____cmpxchg()
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| /arch/arm/include/debug/ |
| D | tegra.S | 74 cmp \rp, #1 @ needs initialization?
85 cmp \rv, #2 @ 2 and 3 mean DCC, UART
87 cmp \rv, #3 @ so accept either
91 cmp \rv, #0 @ UART 0?
93 cmp \rv, #1 @ UART 1?
95 cmp \rv, #2 @ UART 2?
97 cmp \rv, #3 @ UART 3?
99 cmp \rv, #4 @ UART 4?
141 cmp \rp, #0 @ Valid UART address?
166 cmp \rx, #0
[all …]
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| /arch/hexagon/mm/ |
| D | strnlen_user.S | 39 P0 = cmp.eq(mod8,#0);
50 P0 = cmp.eq(tmp1,#0);
52 P1 = cmp.gtu(end,start);
57 P0 = cmp.eq(mod8,#0);
75 P0 = cmp.gtu(end,start);
83 P0 = cmp.eq(tmp1,#32);
95 P0 = cmp.gt(tmp1,mod8);
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| /arch/arm/mach-mvebu/ |
| D | coherency_ll.S | 43 cmp r1, #0
97 cmp r1, #0
106 cmp r1, #0
122 cmp r1, #0
131 cmp r1, #0
149 cmp r1, #0
158 cmp r1, #0
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| /arch/ia64/lib/ |
| D | memcpy_mck.S | 95 cmp.gt p15,p0=8,in2 // check for small size
96 cmp.ne p13,p0=0,r28 // check dest alignment
97 cmp.ne p14,p0=0,r29 // check src alignment
104 cmp.le p6,p0 = 1,r30 // for .align_dest
119 cmp.lt p6,p0=2*PREFETCH_DIST,cnt
120 cmp.lt p7,p8=1,cnt
145 cmp.eq p10,p0=r29,r0 // do we really need to loop?
147 cmp.le p6,p0=8,tmp
149 cmp.le p7,p0=16,tmp
151 cmp.eq p16,p17 = r0,r0
[all …]
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| D | memset.S | 68 cmp.ne p_nz, p_zr = value, r0 // use stf.spill if value is zero
69 cmp.eq p_scr, p0 = cnt, r0
81 cmp.ne p_unalgn, p0 = tmp, r0 //
84 cmp.gt p_scr, p0 = 16, cnt // is it a minimalistic task?
118 cmp.gt p_scr, p0 = tmp, cnt // is it a minimalistic task?
137 cmp.gt p_scr, p0 = PREF_AHEAD, linecnt // check against actual value
186 cmp.lt p_scr, p0 = ptr9, ptr1 // do we need more prefetching?
194 cmp.le p_scr, p0 = 8, cnt // just a few bytes left ?
207 cmp.gt p_scr, p0 = PREF_AHEAD, linecnt // check against actual value
240 cmp.lt p_scr, p0 = ptr9, ptr1 // do we need more prefetching?
[all …]
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| D | strlen.S | 104 cmp.eq p6,p0=r0,r0 // sets p6 to true for cmp.and
119 cmp.eq.and p6,p0=8,val1 // p6 = p6 and val1==8
120 cmp.eq.and p6,p0=8,val2 // p6 = p6 and mask==8
130 cmp.eq p8,p9=8,val1 // p6 = val1 had zero (disambiguate)
137 cmp.eq.and p7,p0=8,val1// val1==8?
174 cmp.eq p0,p6=r0,r0 // nullify first ld8 in loop
184 cmp.eq p6,p0=8,val1 // val1==8 ?
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| D | do_csum.S | 134 cmp.lt p0,p6=r0,len // check for zero length or negative (32bit len)
158 cmp.eq p8,p9=last,first1 // everything fits in one word ?
187 cmp.ltu p6,p0=result1[0],word1[0] // check the carry
188 cmp.eq.or.andcm p8,p0=0,count // exit if zero 8-byte
196 cmp.eq p9,p10=1,count // if (count == 1)
201 cmp.ltu p6,p0=result1[0],word1[1]
227 (ELD_1) cmp.ltu pC1[0],p0=result1[LOAD_LATENCY],word1[LOAD_LATENCY+1]
229 (ELD_1) cmp.ltu pC2[0],p0=result2[LOAD_LATENCY],word2[LOAD_LATENCY+1]
245 cmp.ltu p6,p0=result1[LOAD_LATENCY+1],carry1
246 cmp.ltu p7,p0=result2[LOAD_LATENCY+1],carry2
[all …]
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| /arch/sparc/include/asm/ |
| D | head_64.h | 46 cmp %tmp1, %tmp2; \
55 cmp %tmp1, %tmp2; \
62 cmp %tmp2, CHEETAH_MANUF; \
66 cmp %tmp2, CHEETAH_PLUS_IMPL; \
73 cmp %tmp2, CHEETAH_MANUF; \
77 cmp %tmp2, CHEETAH_IMPL; \
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| D | asm.h | 28 cmp REG, 0; \
31 cmp REG, 0; \
34 cmp REG, 0; \
37 cmp REG, 0; \
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| /arch/x86/lib/ |
| D | memmove_64.S | 32 cmp $0x20, %rdx
36 cmp %rdi, %rsi
40 cmp %rdi, %r8
50 cmp $680, %rdx
115 cmp $680, %rdx
117 cmp %dil, %sil
188 cmp $2, %rdx
199 cmp $1, %rdx
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| /arch/sparc/kernel/ |
| D | ktlb.S | 35 cmp %g4, %g5
43 cmp %g4, %g5
47 cmp %g4, %g5
205 cmp %g4, %g5
213 cmp %g4,%g5
222 cmp %g4, %g5
226 cmp %g4, %g5
232 cmp %g4, %g5
236 cmp %g4, %g5
253 cmp %g3, 1
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