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/arch/s390/numa/
Dmode_emu.c94 static int core_pinned_to_node_id(struct toptree *core) in core_pinned_to_node_id() argument
96 return emu_cores->to_node_id[core->id]; in core_pinned_to_node_id()
104 struct toptree *core; in cores_free() local
107 toptree_for_each(core, tree, CORE) { in cores_free()
108 if (core_pinned_to_node_id(core) == NODE_ID_FREE) in cores_free()
117 static struct toptree *core_node(struct toptree *core) in core_node() argument
119 return core->parent->parent->parent->parent; in core_node()
125 static struct toptree *core_drawer(struct toptree *core) in core_drawer() argument
127 return core->parent->parent->parent; in core_drawer()
133 static struct toptree *core_book(struct toptree *core) in core_book() argument
[all …]
/arch/mips/include/asm/netlogic/xlp-hal/
Dsys.h121 #define SYS_CPU_PLL_CTRL0(core) (0x1c0 + (core * 4)) argument
122 #define SYS_CPU_PLL_CTRL1(core) (0x1c1 + (core * 4)) argument
123 #define SYS_CPU_PLL_CTRL2(core) (0x1c2 + (core * 4)) argument
124 #define SYS_CPU_PLL_CTRL3(core) (0x1c3 + (core * 4)) argument
155 #define SYS_9XX_CPU_PLL_CTRL0(core) (0xc0 + (core * 4)) argument
156 #define SYS_9XX_CPU_PLL_CTRL1(core) (0xc1 + (core * 4)) argument
157 #define SYS_9XX_CPU_PLL_CTRL2(core) (0xc2 + (core * 4)) argument
158 #define SYS_9XX_CPU_PLL_CTRL3(core) (0xc3 + (core * 4)) argument
/arch/arm64/crypto/
DMakefile9 sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o
12 sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o
15 sha512-ce-y := sha512-ce-glue.o sha512-ce-core.o
18 sha3-ce-y := sha3-ce-glue.o sha3-ce-core.o
21 sm3-ce-y := sm3-ce-glue.o sm3-ce-core.o
24 sm4-ce-y := sm4-ce-glue.o sm4-ce-core.o
27 ghash-ce-y := ghash-ce-glue.o ghash-ce-core.o
30 crct10dif-ce-y := crct10dif-ce-core.o crct10dif-ce-glue.o
33 aes-ce-cipher-y := aes-ce-core.o aes-ce-glue.o
36 aes-ce-ccm-y := aes-ce-ccm-glue.o aes-ce-ccm-core.o
[all …]
D.gitignore1 sha256-core.S
2 sha512-core.S
/arch/arm/crypto/
DMakefile25 aes-arm-y := aes-cipher-core.o aes-cipher-glue.o
26 aes-arm-bs-y := aes-neonbs-core.o aes-neonbs-glue.o
30 sha256-arm-y := sha256-core.o sha256_glue.o $(sha256-arm-neon-y)
32 sha512-arm-y := sha512-core.o sha512-glue.o $(sha512-arm-neon-y)
34 libblake2s-arm-y:= blake2s-core.o blake2s-glue.o
35 blake2b-neon-y := blake2b-neon-core.o blake2b-neon-glue.o
36 sha1-arm-ce-y := sha1-ce-core.o sha1-ce-glue.o
37 sha2-arm-ce-y := sha2-ce-core.o sha2-ce-glue.o
38 aes-arm-ce-y := aes-ce-core.o aes-ce-glue.o
39 ghash-arm-ce-y := ghash-ce-core.o ghash-ce-glue.o
[all …]
D.gitignore1 aesbs-core.S
2 sha256-core.S
3 sha512-core.S
/arch/mips/netlogic/xlp/
Dwakeup.c53 static int xlp_wakeup_core(uint64_t sysbase, int node, int core) in xlp_wakeup_core() argument
58 coremask = (1 << core); in xlp_wakeup_core()
114 int core, n, cpu, ncores; in xlp_enable_secondary_cores() local
172 for (core = 0; core < ncores; core++) { in xlp_enable_secondary_cores()
174 if (n == 0 && core == 0) in xlp_enable_secondary_cores()
178 if ((syscoremask & (1 << core)) == 0) in xlp_enable_secondary_cores()
182 cpu = (n * ncores + core) * NLM_THREADS_PER_CORE; in xlp_enable_secondary_cores()
187 if (!xlp_wakeup_core(nodep->sysbase, n, core)) in xlp_enable_secondary_cores()
191 nodep->coremask |= 1u << core; in xlp_enable_secondary_cores()
195 pr_err("Node %d : timeout core %d\n", n, core); in xlp_enable_secondary_cores()
Dnlm_hal.c228 static unsigned int nlm_xlp2_get_core_frequency(int node, int core) in nlm_xlp2_get_core_frequency() argument
236 SYS_9XX_CPU_PLL_CTRL0(core)); in nlm_xlp2_get_core_frequency()
238 SYS_9XX_CPU_PLL_CTRL1(core)); in nlm_xlp2_get_core_frequency()
242 SYS_CPU_PLL_CTRL0(core)); in nlm_xlp2_get_core_frequency()
244 SYS_CPU_PLL_CTRL1(core)); in nlm_xlp2_get_core_frequency()
274 static unsigned int nlm_xlp_get_core_frequency(int node, int core) in nlm_xlp_get_core_frequency() argument
286 dfs_div = ((dfsval >> (core * 4)) & 0xf) + 1; in nlm_xlp_get_core_frequency()
295 unsigned int nlm_get_core_frequency(int node, int core) in nlm_get_core_frequency() argument
298 return nlm_xlp2_get_core_frequency(node, core); in nlm_get_core_frequency()
300 return nlm_xlp_get_core_frequency(node, core); in nlm_get_core_frequency()
/arch/mips/kernel/
Dsmp-cps.c38 static unsigned core_vpe_count(unsigned int cluster, unsigned core) in core_vpe_count() argument
43 return mips_cps_numvps(cluster, core); in core_vpe_count()
214 static void boot_core(unsigned int core, unsigned int vpe_id) in boot_core() argument
220 mips_cm_lock_other(0, core, 0, CM_GCR_Cx_OTHER_BLOCK_LOCAL); in boot_core()
232 set_gcr_access(1 << core); in boot_core()
236 mips_cpc_lock_other(core); in boot_core()
270 core, stat); in boot_core()
283 bitmap_set(core_power, core, 1); in boot_core()
288 unsigned core = cpu_core(&current_cpu_data); in remote_vpe_boot() local
289 struct core_boot_config *core_cfg = &mips_cps_core_bootcfg[core]; in remote_vpe_boot()
[all …]
Dpm-cps.c113 unsigned core = cpu_core(&current_cpu_data); in cps_pm_enter_state() local
123 entry = per_cpu(nc_asm_enter, core)[state]; in cps_pm_enter_state()
147 core_cfg = &mips_cps_core_bootcfg[core]; in cps_pm_enter_state()
159 core_ready_count = per_cpu(ready_count, core); in cps_pm_enter_state()
167 coupled_barrier(&per_cpu(pm_barrier, core), online); in cps_pm_enter_state()
639 unsigned core = cpu_core(&cpu_data[cpu]); in cps_pm_online_cpu() local
643 if (per_cpu(nc_asm_enter, core)[state]) in cps_pm_online_cpu()
651 core, state); in cps_pm_online_cpu()
655 per_cpu(nc_asm_enter, core)[state] = entry_fn; in cps_pm_online_cpu()
658 if (!per_cpu(ready_count, core)) { in cps_pm_online_cpu()
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/arch/mips/include/asm/octeon/
Dcvmx-coremask.h49 int core) in cvmx_coremask_is_core_set() argument
53 n = core % CVMX_COREMASK_ELTSZ; in cvmx_coremask_is_core_set()
54 i = core / CVMX_COREMASK_ELTSZ; in cvmx_coremask_is_core_set()
80 static inline void cvmx_coremask_clear_core(struct cvmx_coremask *pcm, int core) in cvmx_coremask_clear_core() argument
84 n = core % CVMX_COREMASK_ELTSZ; in cvmx_coremask_clear_core()
85 i = core / CVMX_COREMASK_ELTSZ; in cvmx_coremask_clear_core()
/arch/powerpc/platforms/ps3/
Dsystem-bus.c350 dev->match_id, dev->match_sub_id, dev_name(&dev->core), in ps3_system_bus_match()
351 drv->match_id, drv->match_sub_id, drv->core.name); in ps3_system_bus_match()
355 dev->match_id, dev->match_sub_id, dev_name(&dev->core), in ps3_system_bus_match()
356 drv->match_id, drv->match_sub_id, drv->core.name); in ps3_system_bus_match()
377 dev_name(&dev->core)); in ps3_system_bus_probe()
379 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core)); in ps3_system_bus_probe()
398 dev_dbg(&dev->core, "%s:%d %s: no remove method\n", in ps3_system_bus_remove()
399 __func__, __LINE__, drv->core.name); in ps3_system_bus_remove()
401 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core)); in ps3_system_bus_remove()
412 dev_dbg(&dev->core, " -> %s:%d: match_id %d\n", __func__, __LINE__, in ps3_system_bus_shutdown()
[all …]
/arch/arm/mach-integrator/
DKconfig48 bool "Integrator/CM7TDMI core module"
54 bool "Integrator/CM720T core module"
60 bool "Integrator/CM740T core module"
66 bool "Integrator/CM920T core module"
72 bool "Integrator/CM922T-XA10 core module"
78 bool "Integrator/CM926EJ-S core module"
84 bool "Integrator/CM940T core module"
90 bool "Integrator/CM946E-S core module"
96 bool "Integrator/CM966E-S core module"
101 bool "Integrator/CM10200E rev.0 core module"
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/arch/arc/plat-eznps/include/plat/
Dmtm.h14 u32 core, blkid; in nps_mtm_reg_addr() local
17 core = gid.core; in nps_mtm_reg_addr()
18 blkid = (((core & 0x0C) << 2) | (core & 0x03)); in nps_mtm_reg_addr()
/arch/c6x/boot/dts/
Dtms320c6678.dtsi61 compatible = "ti,c64x+core-pic";
81 ti,core-mask = < 0x01 >;
87 ti,core-mask = < 0x02 >;
93 ti,core-mask = < 0x04 >;
99 ti,core-mask = < 0x08 >;
105 ti,core-mask = < 0x10 >;
111 ti,core-mask = < 0x20 >;
117 ti,core-mask = < 0x40 >;
123 ti,core-mask = < 0x80 >;
Dtms320c6472.dtsi51 compatible = "ti,c64x+core-pic";
71 ti,core-mask = < 0x01 >;
77 ti,core-mask = < 0x02 >;
83 ti,core-mask = < 0x04 >;
89 ti,core-mask = < 0x08 >;
95 ti,core-mask = < 0x10 >;
101 ti,core-mask = < 0x20 >;
Dtms320c6474.dtsi38 compatible = "ti,c64x+core-pic";
56 ti,core-mask = < 0x04 >;
62 ti,core-mask = < 0x02 >;
68 ti,core-mask = < 0x01 >;
/arch/arc/
DMakefile72 core-y += arch/arc/
75 core-y += arch/arc/boot/dts/
77 core-y += arch/arc/plat-sim/
78 core-$(CONFIG_ARC_PLAT_TB10X) += arch/arc/plat-tb10x/
79 core-$(CONFIG_ARC_PLAT_AXS10X) += arch/arc/plat-axs10x/
80 core-$(CONFIG_ARC_PLAT_EZNPS) += arch/arc/plat-eznps/
81 core-$(CONFIG_ARC_SOC_HSDK) += arch/arc/plat-hsdk/
/arch/arm/kernel/
Dmodule-plts.c52 struct mod_plt_sec *pltsec = !in_init(mod, loc) ? &mod->arch.core : in get_module_plt()
227 mod->arch.core.plt = s; in module_frob_arch_sections()
234 if (!mod->arch.core.plt || !mod->arch.init.plt) { in module_frob_arch_sections()
266 mod->arch.core.plt->sh_type = SHT_NOBITS; in module_frob_arch_sections()
267 mod->arch.core.plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC; in module_frob_arch_sections()
268 mod->arch.core.plt->sh_addralign = L1_CACHE_BYTES; in module_frob_arch_sections()
269 mod->arch.core.plt->sh_size = round_up(core_plts * PLT_ENT_SIZE, in module_frob_arch_sections()
271 mod->arch.core.plt_count = 0; in module_frob_arch_sections()
272 mod->arch.core.plt_ent = NULL; in module_frob_arch_sections()
283 mod->arch.core.plt->sh_size, mod->arch.init.plt->sh_size); in module_frob_arch_sections()
/arch/powerpc/kvm/
Dbook3s_hv_rm_xics.c85 int core; in grab_next_hostcore() local
88 for (core = start + 1; core < max; core++) { in grab_next_hostcore()
89 old = new = READ_ONCE(rm_core[core].rm_state); in grab_next_hostcore()
97 success = cmpxchg64(&rm_core[core].rm_state.raw, in grab_next_hostcore()
107 return core; in grab_next_hostcore()
116 int core; in find_available_hostcore() local
120 core = grab_next_hostcore(my_core, rm_core, cpu_nr_cores(), action); in find_available_hostcore()
121 if (core == -1) in find_available_hostcore()
122 core = grab_next_hostcore(core, rm_core, my_core, action); in find_available_hostcore()
124 return core; in find_available_hostcore()
[all …]
/arch/arm/
DMakefile276 core-$(CONFIG_FPE_NWFPE) += arch/arm/nwfpe/
278 core-$(CONFIG_FPE_FASTFPE) += $(patsubst $(srctree)/%,%,$(wildcard $(srctree)/arch/arm/fastfpe/))
279 core-$(CONFIG_VFP) += arch/arm/vfp/
280 core-$(CONFIG_XEN) += arch/arm/xen/
281 core-$(CONFIG_KVM_ARM_HOST) += arch/arm/kvm/
282 core-$(CONFIG_VDSO) += arch/arm/vdso/
285 core-y += arch/arm/kernel/ arch/arm/mm/ arch/arm/common/
286 core-y += arch/arm/probes/
287 core-y += arch/arm/net/
288 core-y += arch/arm/crypto/
[all …]
/arch/powerpc/include/asm/
Dcputhreads.h76 int cpu_first_thread_of_core(int core);
79 static inline int cpu_first_thread_of_core(int core) { return core; } in cpu_first_thread_of_core() argument
Dps3.h367 struct device core; member
381 struct device_driver core; member
396 return container_of(_drv, struct ps3_system_bus_driver, core); in ps3_drv_to_system_bus_drv()
401 return container_of(_dev, struct ps3_system_bus_device, core); in ps3_dev_to_system_bus_dev()
407 BUG_ON(!_dev->core.driver); in ps3_system_bus_dev_to_system_bus_drv()
408 return ps3_drv_to_system_bus_drv(_dev->core.driver); in ps3_system_bus_dev_to_system_bus_drv()
420 dev_set_drvdata(&dev->core, data); in ps3_system_bus_set_drvdata()
425 return dev_get_drvdata(&dev->core); in ps3_system_bus_get_drvdata()
/arch/arc/plat-eznps/
DKconfig33 At highest hierarchy each core contain 16 threads,
35 All threads within same core share the execution unit of the
36 core and HW scheduler round robin between them.
55 all the cpus of the core, whereas on simulator platform for NPS,
58 of the core, so there will be a need to initialize them per cpu.
/arch/arm/probes/kprobes/
DMakefile2 obj-$(CONFIG_KPROBES) += core.o actions-common.o checkers-common.o
4 test-kprobes-objs := test-core.o

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