Searched refs:coreid (Results 1 – 8 of 8) sorted by relevance
/arch/mips/include/asm/octeon/ |
D | cvmx-ciu-defs.h | 12 #define CVMX_CIU_ADDR(addr, coreid, coremask, offset) \ argument 14 (((coreid) & (coremask)) * offset)) 45 static inline uint64_t CVMX_CIU_MBOX_CLRX(unsigned int coreid) in CVMX_CIU_MBOX_CLRX() argument 48 return CVMX_CIU_ADDR(0x100100600, coreid, 0x0F, 8); in CVMX_CIU_MBOX_CLRX() 50 return CVMX_CIU_ADDR(0x000000680, coreid, 0x0F, 8); in CVMX_CIU_MBOX_CLRX() 53 static inline uint64_t CVMX_CIU_MBOX_SETX(unsigned int coreid) in CVMX_CIU_MBOX_SETX() argument 56 return CVMX_CIU_ADDR(0x100100400, coreid, 0x0F, 8); in CVMX_CIU_MBOX_SETX() 58 return CVMX_CIU_ADDR(0x000000600, coreid, 0x0F, 8); in CVMX_CIU_MBOX_SETX() 61 static inline uint64_t CVMX_CIU_PP_POKEX(unsigned int coreid) in CVMX_CIU_PP_POKEX() argument 65 return CVMX_CIU_ADDR(0x100100200, coreid, 0x0F, 8); in CVMX_CIU_PP_POKEX() [all …]
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D | cvmx-pow.h | 290 uint64_t coreid:4; member 313 uint64_t coreid:4; 1269 load_addr.sstatus.coreid = cvmx_get_core_num(); in cvmx_pow_get_current_tag() 1295 load_addr.sstatus.coreid = cvmx_get_core_num(); in cvmx_pow_get_current_wqp()
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/arch/mips/cavium-octeon/ |
D | smp.c | 101 int coreid = cpu_logical_map(cpu); in octeon_send_ipi_single() local 106 cvmx_write_csr(CVMX_CIU_MBOX_SETX(coreid), action); in octeon_send_ipi_single() 141 const int coreid = cvmx_get_core_num(); in octeon_smp_setup() local 157 __cpu_number_map[coreid] = 0; in octeon_smp_setup() 158 __cpu_logical_map[0] = coreid; in octeon_smp_setup() 163 if ((id != coreid) && cvmx_coremask_is_core_set(&sysinfo->core_mask, id)) { in octeon_smp_setup() 311 int coreid = cpu_logical_map(cpu); in octeon_cpu_die() local 323 mask = 1 << coreid; in octeon_cpu_die() 341 pr_info("Reset core %d. Available Coremask = 0x%x \n", coreid, new_mask); in octeon_cpu_die() 343 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_cpu_die() [all …]
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D | octeon-irq.c | 152 static int octeon_cpu_for_coreid(int coreid) in octeon_cpu_for_coreid() argument 155 return cpu_number_map(coreid); in octeon_cpu_for_coreid() 306 int coreid = octeon_coreid_for_cpu(cpu); in octeon_irq_ciu_enable() local 323 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_enable() 332 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); in octeon_irq_ciu_enable() 412 int coreid = octeon_coreid_for_cpu(cpu); in octeon_irq_ciu_disable_all() local 427 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_disable_all() 429 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); in octeon_irq_ciu_disable_all() 445 int coreid = octeon_coreid_for_cpu(cpu); in octeon_irq_ciu_enable_all() local 460 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_enable_all() [all …]
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D | setup.c | 399 const int coreid = cvmx_get_core_num(); in octeon_check_cpu_bist() local 408 coreid, bist_val); in octeon_check_cpu_bist() 414 coreid, bist_val); in octeon_check_cpu_bist() 420 coreid, bist_val); in octeon_check_cpu_bist()
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/arch/mips/mm/ |
D | c-octeon.c | 312 unsigned long coreid = cvmx_get_core_num(); in co_cache_error_call_notifiers() local 316 dcache_err = cache_err_dcache[coreid]; in co_cache_error_call_notifiers() 317 cache_err_dcache[coreid] = 0; in co_cache_error_call_notifiers() 322 pr_err("Core%lu: Cache error exception:\n", coreid); in co_cache_error_call_notifiers()
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/arch/openrisc/include/asm/ |
D | cpuinfo.h | 29 u16 coreid; member
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/arch/openrisc/kernel/ |
D | setup.c | 200 cpuinfo->coreid = mfspr(SPR_COREID); in setup_cpuinfo() 334 seq_printf(m, "processor\t\t: %d\n", cpuinfo->coreid); in show_cpuinfo()
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