Searched refs:cpu_clk (Results 1 – 18 of 18) sorted by relevance
| /arch/mips/ar7/ |
| D | time.c | 19 struct clk *cpu_clk; in plat_time_init() local
24 cpu_clk = clk_get(NULL, "cpu"); in plat_time_init()
25 if (IS_ERR(cpu_clk)) { in plat_time_init()
30 mips_hpt_frequency = clk_get_rate(cpu_clk) / 2; in plat_time_init()
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| D | clock.c | 91 static struct clk cpu_clk = { variable
182 base_clock = cpu_clk.rate; in tnetd7300_get_clock()
222 base_clock = cpu_clk.rate; in tnetd7300_set_clock()
248 cpu_clk.rate = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, in tnetd7300_init_clocks()
251 cpu_clk.rate = bus_clk.rate; in tnetd7300_init_clocks()
349 cpu_clk.rate = in tnetd7200_init_clocks()
353 cpu_clk.rate); in tnetd7200_init_clocks()
362 cpu_clk.rate = ((cpu_base / cpu_prediv) * cpu_mul) in tnetd7200_init_clocks()
366 cpu_clk.rate); in tnetd7200_init_clocks()
371 bus_clk.rate = cpu_clk.rate / 2; in tnetd7200_init_clocks()
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| /arch/arm/mach-mvebu/ |
| D | platsmp.c | 42 struct clk *cpu_clk; in get_cpu_clk() local
47 cpu_clk = of_clk_get(np, 0); in get_cpu_clk()
48 if (WARN_ON(IS_ERR(cpu_clk))) in get_cpu_clk()
50 return cpu_clk; in get_cpu_clk()
104 struct clk *cpu_clk = get_cpu_clk(cpu); in armada_xp_sync_secondary_clk() local
106 if (!cpu_clk || !boot_cpu_clk) in armada_xp_sync_secondary_clk()
109 clk_prepare_enable(cpu_clk); in armada_xp_sync_secondary_clk()
110 clk_set_rate(cpu_clk, clk_get_rate(boot_cpu_clk)); in armada_xp_sync_secondary_clk()
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| /arch/arm64/boot/dts/marvell/ |
| D | armada-ap806-quad.dtsi | 24 clocks = <&cpu_clk 0>;
32 clocks = <&cpu_clk 0>;
40 clocks = <&cpu_clk 1>;
48 clocks = <&cpu_clk 1>;
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| D | armada-ap806-dual.dtsi | 24 clocks = <&cpu_clk 0>;
32 clocks = <&cpu_clk 0>;
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| D | armada-ap806.dtsi | 283 cpu_clk: clock-cpu@278 { label
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| /arch/mips/lantiq/xway/ |
| D | clk.c | 144 unsigned int ocp_sel, cpu_clk; in ltq_vr9_fpi_hz() local
147 cpu_clk = ltq_vr9_cpu_hz(); in ltq_vr9_fpi_hz()
153 clk = cpu_clk; in ltq_vr9_fpi_hz()
157 clk = cpu_clk / 2; in ltq_vr9_fpi_hz()
161 clk = (cpu_clk * 2) / 5; in ltq_vr9_fpi_hz()
165 clk = cpu_clk / 3; in ltq_vr9_fpi_hz()
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| /arch/sh/kernel/cpu/ |
| D | clock-cpg.c | 24 static struct clk cpu_clk = { variable
36 &cpu_clk,
44 CLKDEV_CON_ID("cpu_clk", &cpu_clk),
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| /arch/mips/ralink/ |
| D | mt7621.c | 123 u32 cpu_clk; in ralink_clk_init() local
133 cpu_clk = (500 * cpu_ffrac / cpu_fdiv) * 1000 * 1000; in ralink_clk_init()
142 cpu_clk = 25 * fbdiv * 1000 * 1000; in ralink_clk_init()
145 cpu_clk = 40 * fbdiv * 1000 * 1000; in ralink_clk_init()
148 cpu_clk = 20 * fbdiv * 1000 * 1000; in ralink_clk_init()
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| /arch/mips/loongson64/lemote-2f/ |
| D | clock.c | 44 static struct clk cpu_clk = { variable
52 return &cpu_clk; in clk_get()
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| /arch/arc/boot/dts/ |
| D | abilis_tb10x.dtsi | 31 clocks = <&cpu_clk>;
37 clocks = <&cpu_clk>;
53 cpu_clk: clkdiv_cpu { label
57 clock-output-names = "cpu_clk";
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| D | abilis_tb100.dtsi | 20 cpu_clk: clkdiv_cpu { label
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| D | abilis_tb101.dtsi | 20 cpu_clk: clkdiv_cpu { label
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| /arch/mips/boot/dts/mscc/ |
| D | ocelot.dtsi | 16 clocks = <&cpu_clk>;
32 cpu_clk: cpu-clock { label
41 clocks = <&cpu_clk>;
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| /arch/arc/kernel/ |
| D | setup.c | 621 struct clk *cpu_clk; in show_cpuinfo() local
635 cpu_clk = clk_get(cpu_dev, NULL); in show_cpuinfo()
636 if (IS_ERR(cpu_clk)) { in show_cpuinfo()
640 freq = clk_get_rate(cpu_clk); in show_cpuinfo()
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| /arch/arm/boot/dts/ |
| D | vexpress-v2p-ca5s.dts | 112 clocks = <&cpu_clk>;
148 cpu_clk: oscclk0 { label
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| D | kirkwood.dtsi | 22 clock-names = "cpu_clk", "ddrclk", "powersave";
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| D | ste-u300.dts | 102 cpu_clk@208M {
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