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Searched refs:ctrl_reg (Results 1 – 4 of 4) sorted by relevance

/arch/arm64/kernel/
Dhw_breakpoint.c228 int i, max_slots, ctrl_reg, val_reg, reg_enable; in hw_breakpoint_control() local
234 ctrl_reg = AARCH64_DBG_REG_BCR; in hw_breakpoint_control()
241 ctrl_reg = AARCH64_DBG_REG_WCR; in hw_breakpoint_control()
267 write_wb_reg(ctrl_reg, i, in hw_breakpoint_control()
272 write_wb_reg(ctrl_reg, i, 0); in hw_breakpoint_control()
624 u32 ctrl_reg; in breakpoint_handler() local
648 ctrl_reg = read_wb_reg(AARCH64_DBG_REG_BCR, i); in breakpoint_handler()
649 decode_ctrl_reg(ctrl_reg, &ctrl); in breakpoint_handler()
759 u32 ctrl_reg; in watchpoint_handler() local
789 ctrl_reg = read_wb_reg(AARCH64_DBG_REG_WCR, i); in watchpoint_handler()
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/arch/powerpc/platforms/52xx/
Dmpc52xx_pic.c178 u32 ctrl_reg, type; in mpc52xx_extirq_set_type() local
194 ctrl_reg = in_be32(&intr->ctrl); in mpc52xx_extirq_set_type()
195 ctrl_reg &= ~(0x3 << (22 - (l2irq * 2))); in mpc52xx_extirq_set_type()
196 ctrl_reg |= (type << (22 - (l2irq * 2))); in mpc52xx_extirq_set_type()
197 out_be32(&intr->ctrl, ctrl_reg); in mpc52xx_extirq_set_type()
/arch/arm/kernel/
Dhw_breakpoint.c294 u32 ctrl_reg; in get_max_wp_len() local
303 ctrl_reg = encode_ctrl_reg(ctrl); in get_max_wp_len()
306 write_wb_reg(ARM_BASE_WCR, ctrl_reg); in get_max_wp_len()
307 if ((read_wb_reg(ARM_BASE_WCR) & ctrl_reg) == ctrl_reg) in get_max_wp_len()
728 u32 val, ctrl_reg; in watchpoint_handler() local
765 ctrl_reg = read_wb_reg(ARM_BASE_WCR + i); in watchpoint_handler()
766 decode_ctrl_reg(ctrl_reg, &ctrl); in watchpoint_handler()
853 u32 ctrl_reg, val, addr; in breakpoint_handler() local
880 ctrl_reg = read_wb_reg(ARM_BASE_BCR + i); in breakpoint_handler()
881 decode_ctrl_reg(ctrl_reg, &ctrl); in breakpoint_handler()
/arch/x86/kvm/
Dpmu.h12 #define fixed_ctrl_field(ctrl_reg, idx) (((ctrl_reg) >> ((idx)*4)) & 0xf) argument