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/arch/arm/lib/
Dlib1funcs.S40 .macro ARM_DIV_BODY dividend, divisor, result, curbit
44 clz \curbit, \divisor
48 mov \divisor, \divisor, lsl \result
54 @ Initially shift the divisor left 3 bits if possible,
58 tst \divisor, #0xe0000000
59 moveq \divisor, \divisor, lsl #3
63 @ Unless the divisor is very big, shift it up in multiples of
65 @ division loop. Continue shifting until the divisor is
67 1: cmp \divisor, #0x10000000
68 cmplo \divisor, \dividend
[all …]
Ddiv64.S50 bls 9f @ divisor is 0 or 1
52 beq 8f @ divisor is power of 2
59 @ Align divisor with upper part of dividend.
60 @ The aligned divisor is stored in yl preserving the original.
102 @ divisor for comparisons, considering the carry-out bit as well.
139 @ divisor at this point since divisor can not be smaller than 3 here.
147 8: @ Division by a power of 2: determine what that divisor order is
/arch/alpha/lib/
Ddivide.S56 #define divisor $1 macro
104 bis $25,$25,divisor
109 LONGIFY(divisor)
114 beq divisor, 9f /* div by zero */
125 1: cmpult divisor,modulus,compare
126 s8addq divisor,$31,divisor
130 1: cmpult divisor,modulus,compare
131 blt divisor, 2f
132 addq divisor,divisor,divisor
141 cmpule divisor,modulus,compare
[all …]
Dev6-divide.S66 #define divisor $1 macro
114 bis $25,$25,divisor # E :
120 LONGIFY(divisor) # E : U L L U
127 beq divisor, 9f /* div by zero */
144 1: cmpult divisor,modulus,compare # E :
145 s8addq divisor,$31,divisor # E :
149 1: cmpult divisor,modulus,compare # E :
152 blt divisor, 2f # U : U L U L
154 addq divisor,divisor,divisor # E :
172 cmpule divisor,modulus,compare # E :
[all …]
/arch/c6x/kernel/
Dc6x_ksyms.c15 extern int __c6xabi_divi(int dividend, int divisor);
18 extern unsigned __c6xabi_divu(unsigned dividend, unsigned divisor);
21 extern int __c6xabi_remi(int dividend, int divisor);
24 extern unsigned __c6xabi_remu(unsigned dividend, unsigned divisor);
27 extern int __c6xabi_divremi(int dividend, int divisor);
30 extern unsigned __c6xabi_divremu(unsigned dividend, unsigned divisor);
/arch/mips/cavium-octeon/executive/
Dcvmx-helper-jtag.c50 uint32_t divisor = cvmx_sysinfo_get()->cpu_clock_hz / (25 * 1000000); in cvmx_helper_qlm_jtag_init() local
51 divisor = (divisor - 1) >> 2; in cvmx_helper_qlm_jtag_init()
53 while (divisor) { in cvmx_helper_qlm_jtag_init()
55 divisor = divisor >> 1; in cvmx_helper_qlm_jtag_init()
/arch/h8300/lib/
Dudivsi3.S31 shlr.l er2 ; make divisor < 2^16
35 shlr.l #2,er2 ; make divisor < 2^16
41 shlr.l #2,er2 ; make divisor < 2^16
56 ;; er1 contains divisor
57 ;; er2 contains shifted divisor
64 mulxu.w r0,er2 ; er2 = upper (AQ - 1) * divisor
68 sub.l er2,er3 ; er3 = dividend - (AQ - 1) * divisor
70 cmp.l er1,er3 ; is divisor < remainder?
/arch/x86/include/asm/
Ddiv64.h43 static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder) in div_u64_rem() argument
53 if (upper >= divisor) { in div_u64_rem()
54 d.v32[1] = upper / divisor; in div_u64_rem()
55 upper %= divisor; in div_u64_rem()
58 "rm" (divisor), "0" (d.v32[0]), "1" (upper)); in div_u64_rem()
/arch/powerpc/lib/
Ddiv64.S22 divwu r7,r5,r4 # if dividend.hi >= divisor,
23 mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
24 subf. r5,r0,r5 # dividend.hi %= divisor
31 srw r10,r10,r0 # the divisor right the same amount,
41 mulhwu r9,r11,r4 # multiply the estimate by the divisor,
42 subfc r6,r10,r6 # take the product from the divisor,
/arch/powerpc/boot/
Dvirtex.c29 u16 divisor; in virtex_ns16550_console_init() local
52 divisor = clk / (16 * spd); in virtex_ns16550_console_init()
58 out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF); in virtex_ns16550_console_init()
59 out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8); in virtex_ns16550_console_init()
Ddiv64.S22 divwu r7,r5,r4 # if dividend.hi >= divisor,
23 mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
24 subf. r5,r0,r5 # dividend.hi %= divisor
31 srw r10,r10,r0 # the divisor right the same amount,
41 mulhwu r9,r11,r4 # multiply the estimate by the divisor,
42 subfc r6,r10,r6 # take the product from the divisor,
/arch/x86/boot/
Dstring.c202 static inline u64 __div_u64_rem(u64 dividend, u32 divisor, u32 *remainder) in __div_u64_rem() argument
212 if (upper >= divisor) { in __div_u64_rem()
213 d.v32[1] = upper / divisor; in __div_u64_rem()
214 upper %= divisor; in __div_u64_rem()
217 "rm" (divisor), "0" (d.v32[0]), "1" (upper)); in __div_u64_rem()
221 static inline u64 __div_u64(u64 dividend, u32 divisor) in __div_u64() argument
225 return __div_u64_rem(dividend, divisor, &remainder); in __div_u64()
Dearly_serial_console.c29 unsigned divisor; in early_serial_init() local
36 divisor = 115200 / baud; in early_serial_init()
39 outb(divisor & 0xff, port + DLL); in early_serial_init()
40 outb((divisor >> 8) & 0xff, port + DLH); in early_serial_init()
/arch/x86/kernel/
Dearly_printk.c133 static __init void early_serial_hw_init(unsigned divisor) in early_serial_hw_init() argument
144 serial_out(early_serial_base, DLL, divisor & 0xff); in early_serial_hw_init()
145 serial_out(early_serial_base, DLH, (divisor >> 8) & 0xff); in early_serial_hw_init()
153 unsigned divisor; in early_serial_init() local
187 divisor = 115200 / baud; in early_serial_init()
194 early_serial_hw_init(divisor); in early_serial_init()
222 unsigned divisor; in early_pci_serial_init() local
316 divisor = 115200 / baud; in early_pci_serial_init()
319 early_serial_hw_init(divisor); in early_pci_serial_init()
/arch/arm/mach-orion5x/
Dtsx09-common.c27 const unsigned divisor = ((orion5x_tclk + (8 * 19200)) / (16 * 19200)); in qnap_tsx09_power_off() local
33 writel(divisor & 0xff, UART1_REG(DLL)); in qnap_tsx09_power_off()
34 writel((divisor >> 8) & 0xff, UART1_REG(DLM)); in qnap_tsx09_power_off()
/arch/sh/kernel/cpu/sh4/
Dclock-sh4-202.c30 int divisor = clk->parent->rate / rate; in frqcr3_lookup() local
34 if (frqcr3_divisors[i] == divisor) in frqcr3_lookup()
79 int divisor = frqcr3_divisors[i]; in shoc_clk_init() local
81 if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) in shoc_clk_init()
/arch/arm/boot/dts/
Dwm8750.dtsi130 divisor-reg = <0x300>;
137 divisor-reg = <0x304>;
144 divisor-reg = <0x320>;
151 divisor-reg = <0x310>;
206 divisor-reg = <0x350>;
215 divisor-reg = <0x330>;
216 divisor-mask = <0x3f>;
225 divisor-reg = <0x3A0>;
234 divisor-reg = <0x3A4>;
Dwm8650.dtsi124 divisor-reg = <0x300>;
131 divisor-reg = <0x304>;
138 divisor-reg = <0x320>;
145 divisor-reg = <0x310>;
168 divisor-reg = <0x328>;
169 divisor-mask = <0x3f>;
Dwm8850.dtsi141 divisor-reg = <0x300>;
148 divisor-reg = <0x304>;
155 divisor-reg = <0x320>;
162 divisor-reg = <0x310>;
201 divisor-reg = <0x350>;
210 divisor-reg = <0x330>;
211 divisor-mask = <0x3f>;
Dwm8505.dtsi120 divisor-reg = <0x300>;
127 divisor-reg = <0x304>;
134 divisor-reg = <0x350>;
141 divisor-reg = <0x310>;
196 divisor-reg = <0x328>;
197 divisor-mask = <0x3f>;
/arch/mips/ralink/
Dtimer.c71 static int rt_timer_config(struct rt_timer *rt, unsigned long divisor) in rt_timer_config() argument
73 if (rt->timer_freq < divisor) in rt_timer_config()
76 rt->timer_div = divisor; in rt_timer_config()
/arch/m68k/ifpsp060/src/
Dilsp.S74 # 0x4(sp) = divisor #
89 # codes before performing the final "rts". If the divisor was equal to #
134 mov.l 0x8(%a6),%d7 # fetch divisor
136 beq.w ldiv64eq0 # divisor is = 0!!!
145 # save the sign of the divisor
146 # make divisor unsigned if it's negative
165 # - is (hi(dividend) == 0 && (divisor <= lo(dividend))) ? (32-bit div)
173 cmp.l %d7,%d6 # is (divisor <= lo(dividend))
272 # where U,V are words of the quadword dividend and longword divisor, #
276 # in %d6. The divisor must be in the variable ddivisor, and the #
[all …]
/arch/arm/mach-pxa/
Dviper.c167 unsigned int divisor = 0; in viper_set_core_cpu_voltage() local
171 v = "1.0"; divisor = 0xfff; in viper_set_core_cpu_voltage()
173 v = "1.1"; divisor = 0xde5; in viper_set_core_cpu_voltage()
175 v = "1.3"; divisor = 0x325; in viper_set_core_cpu_voltage()
186 step = divisor; in viper_set_core_cpu_voltage()
187 else if (current_voltage_divisor < divisor - STEP) in viper_set_core_cpu_voltage()
189 else if (current_voltage_divisor > divisor + STEP) in viper_set_core_cpu_voltage()
192 step = divisor; in viper_set_core_cpu_voltage()
217 } while (current_voltage_divisor != divisor); in viper_set_core_cpu_voltage()
/arch/mips/ar7/
Dclock.c168 int divisor = prediv * postdiv; in tnetd7300_get_clock() local
187 return base_clock / divisor; in tnetd7300_get_clock()
190 return (base_clock >> (mul / 16 + 1)) / divisor; in tnetd7300_get_clock()
196 return product / divisor; in tnetd7300_get_clock()
200 return base_clock / divisor; in tnetd7300_get_clock()
202 return base_clock * mul / divisor; in tnetd7300_get_clock()
/arch/powerpc/kernel/
Dudbg_16550.c126 unsigned int dll, dlm, divisor, prescaler, speed; in udbg_probe_uart_speed() local
137 divisor = dlm << 8 | dll; in udbg_probe_uart_speed()
149 speed = (clock / prescaler) / (divisor * 16); in udbg_probe_uart_speed()

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