| /arch/sparc/lib/ |
| D | VISsave.S | 28 ldub [%g6 + TI_FPDEPTH], %g1
31 stb %g0, [%g6 + TI_FPSAVED]
32 stx %fsr, [%g6 + TI_XFSR]
38 vis1: ldub [%g6 + TI_FPSAVED], %g3
39 stx %fsr, [%g6 + TI_XFSR]
41 stb %g3, [%g6 + TI_FPSAVED]
46 stx %g3, [%g6 + TI_GSR]
47 2: add %g6, %g1, %g3
52 add %g6, %g1, %g3
55 add %g6, %g1, %g2
[all …]
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| D | clear_page.S | 43 lduw [%g6 + TI_PRE_COUNT], %o2
63 stw %o4, [%g6 + TI_PRE_COUNT]
103 stw %o2, [%g6 + TI_PRE_COUNT]
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| D | copy_page.S | 51 lduw [%g6 + TI_PRE_COUNT], %o4
77 stw %o2, [%g6 + TI_PRE_COUNT]
172 ldub [%g6 + TI_FAULT_CODE], %g3
240 stw %o4, [%g6 + TI_PRE_COUNT]
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| /arch/sparc/kernel/ |
| D | dtlb_miss.S | 4 ldxa [%g0] ASI_DMMU, %g6 ! Get TAG TARGET
5 srlx %g6, 48, %g5 ! Get context
6 sllx %g6, 22, %g6 ! Zero out context
8 srlx %g6, 22, %g6 ! Delay slot
10 cmp %g4, %g6 ! Compare TAG
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| D | itlb_miss.S | 4 ldxa [%g0] ASI_IMMU, %g6 ! Get TAG TARGET
5 srlx %g6, 48, %g5 ! Get context
6 sllx %g6, 22, %g6 ! Zero out context
8 srlx %g6, 22, %g6 ! Delay slot
10 cmp %g4, %g6 ! Compare TAG
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| D | rtrap_64.S | 162 ldx [%g6 + TI_FLAGS], %l0
173 ldub [%g6 + TI_WSAVED], %o2
182 stb %g0, [%g6 + TI_FPDEPTH]
192 mov %g6, %l2
195 LOAD_PER_CPU_BASE(%g5, %g6, %i0, %i1, %i2)
197 ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6
209 mov %l2, %g6
271 ldx [%g6 + TI_FLAGS], %g3
314 ldsw [%g6 + TI_PRE_COUNT], %l5
316 ldx [%g6 + TI_FLAGS], %l5
[all …]
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| D | winfixup.S | 25 TRAP_LOAD_THREAD_REG(%g6, %g1)
29 stb %g4, [%g6 + TI_FAULT_CODE]
30 stx %g5, [%g6 + TI_FAULT_ADDR]
44 TRAP_LOAD_THREAD_REG(%g6, %g1)
45 ldx [%g6 + TI_FLAGS], %g1
49 ldub [%g6 + TI_WSAVED], %g1
51 add %g6, %g3, %g3
55 add %g6, %g3, %g3
90 stb %g1, [%g6 + TI_WSAVED]
98 stb %g4, [%g6 + TI_FAULT_CODE]
[all …]
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| D | urtt_fill.S | 41 stb %g4, [%g6 + TI_FAULT_CODE]
42 stx %g5, [%g6 + TI_FAULT_ADDR]
44 mov %g6, %l1
60 mov %l1, %g6
61 ldx [%g6 + TI_TASK], %g4
62 LOAD_PER_CPU_BASE(%g5, %g6, %g1, %g2, %g3)
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| D | wof.S | 40 #define curptr g6 /* Gets set to 'current' then stays G */
77 mov %g6, %saved_g6 ! save away 'current' ptr register
121 mov %saved_g6, %g6 ! restore %curptr
189 mov %saved_g6, %g6
245 mov %saved_g6, %g6
248 sethi %hi(STACK_OFFSET), %g6
249 or %g6, %lo(STACK_OFFSET), %g6
250 sub %sp, %g6, %g6 ! curptr
284 mov %saved_g6, %g6
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| D | fpu_traps.S | 23 1: TRAP_LOAD_THREAD_REG(%g6, %g1)
24 ldub [%g6 + TI_FPSAVED], %g5
29 ldx [%g6 + TI_GSR], %g7
67 add %g6, TI_FPREGS + 0x80, %g1
87 add %g6, TI_FPREGS + 0xc0, %g2
118 add %g6, TI_FPREGS, %g1
129 add %g6, TI_FPREGS + 0x40, %g2
151 add %g6, TI_FPREGS, %g1
188 ldx [%g6 + TI_XFSR], %fsr
208 TRAP_LOAD_THREAD_REG(%g6, %g1)
[all …]
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| D | ktlb.S | 39 KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_itlb_load)
55 TSB_WRITE(%g1, %g5, %g6)
103 TSB_WRITE(%g1, %g5, %g6)
113 TSB_WRITE(%g1, %g5, %g6)
127 TSB_WRITE(%g1, %g5, %g6)
151 KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_dtlb_load)
154 KERN_TSB4M_LOOKUP_TL1(%g6, %g5, %g1, %g2, %g3, kvmap_dtlb_load)
167 TSB_WRITE(%g1, %g5, %g6)
218 KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_dtlb_load)
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| D | tsb.S | 78 mov %g6, %g2
79 and %g5, 0x7, %g6
82 sllx %g7, %g6, %g7
83 srlx %g4, REAL_HPAGE_SHIFT, %g6
85 and %g6, %g7, %g6
86 sllx %g6, 4, %g6
87 add %g5, %g6, %g5
89 TSB_LOAD_QUAD(%g5, %g6)
90 cmp %g6, %g2
97 TRAP_LOAD_TRAP_BLOCK(%g7, %g6)
[all …]
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| D | trampoline_32.S | 63 ld [%g5 + %g4], %g6
67 add %g6, %sp, %sp
124 ld [%g5 + %g4], %g6
128 add %g6, %sp, %sp
180 ld [%g5 + %g4], %g6
184 add %g6, %sp, %sp
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| D | ivec.S | 30 TRAP_LOAD_IRQ_WORK_PA(%g6, %g1)
32 ldx [%g6], %g5
34 stx %g3, [%g6]
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| D | etrap_64.S | 34 etrap_syscall: TRAP_LOAD_THREAD_REG(%g6, %g1)
53 add %g6, %g2, %g2
85 ldx [%g6 + TI_FLAGS], %g3
92 mov %g6, %l6
151 stx %g6, [%sp + PTREGS_OFF + PT_V9_G6]
190 mov %l6, %g6
192 LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %l1)
193 ldx [%g6 + TI_TASK], %g4
219 TRAP_LOAD_THREAD_REG(%g6, %g1)
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| D | hvtramp.S | 106 mov %l6, %g6
107 ldx [%g6 + TI_TASK], %g4
112 add %g6, %g5, %sp
123 mov %g6, %o0
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| D | sun4v_tlb_miss.S | 56 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_itlb_4v)
61 cmp %g2, %g6
75 ldxa [%g0] ASI_SCRATCHPAD, %g6
81 ldx [%g6 + HV_FAULT_I_CTX_OFFSET], %o1 ! ctx
102 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_dtlb_4v)
107 cmp %g2, %g6
118 ldxa [%g0] ASI_SCRATCHPAD, %g6
124 ldx [%g6 + HV_FAULT_D_CTX_OFFSET], %o1 ! ctx
207 ldxa [%g0] ASI_SCRATCHPAD, %g6
208 ldx [%g6 + HV_FAULT_I_CTX_OFFSET], %o1
[all …]
|
| D | utrap.S | 5 TRAP_LOAD_THREAD_REG(%g6, %g1)
6 ldx [%g6 + TI_UTRAPS], %g1
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| D | syscalls.S | 56 1: ldx [%g6 + TI_FLAGS], %l5
106 stb %g0, [%g6 + TI_NEW_CHILD]
111 ldx [%g6 + TI_FLAGS], %l0
140 stb %g0, [%g6 + TI_WSAVED]
221 ldx [%g6 + TI_FLAGS], %l0 ! Load
245 ldx [%g6 + TI_FLAGS], %l0 ! Load
282 ldub [%g6 + TI_SYS_NOERROR], %l2
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| D | head_32.S | 187 set 0x4000, %g6
188 cmp %g7, %g6
259 set 0x8000, %g6 ! AC bit mask
260 or %g5, %g6, %g6 ! Or it in...
261 sta %g6, [%g0] ASI_M_MMUREGS ! Close your eyes...
380 or %o0, %g0, %g6
548 set init_thread_union, %g6
551 st %g6, [%g2]
554 st %g6, [%g2]
556 st %g0, [%g6 + TI_UWINMASK]
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| D | trampoline_64.S | 293 set 0xdeadbeef, %g6
337 sethi %hi(init_thread_union), %g6
338 or %g6, %lo(init_thread_union), %g6
394 ldx [%l0], %g6
395 ldx [%g6 + TI_TASK], %g4
400 add %g6, %g5, %sp
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| D | asm-offsets.c | 42 OFFSET(SC_REG_G6, saved_context, g6); in sparc64_foo()
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| /arch/sparc/prom/ |
| D | cif.S | 21 mov %g6, %l3
26 mov %l3, %g6
35 TRAP_LOAD_THREAD_REG(%g6, %g1)
36 LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %o0)
37 ldx [%g6 + TI_TASK], %g4
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| /arch/sparc/include/asm/ |
| D | hibernate.h | 21 unsigned long g6; member
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| /arch/sparc/power/ |
| D | hibernate_asm.S | 37 stx %g6, [%g3 + SC_REG_G6]
118 ldxa [%g3 + SC_REG_G6] %asi, %g6
|