| /arch/arm/mach-imx/devices/ |
| D | platform-sdhci-esdhc-imx.c | 11 #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \ argument
15 .iobase = soc ## _ESDHC ## hwid ## _BASE_ADDR, \
16 .irq = soc ## _INT_ESDHC ## hwid, \
19 #define imx_sdhci_esdhc_imx_data_entry(soc, devid, id, hwid) \ argument
20 [id] = imx_sdhci_esdhc_imx_data_entry_single(soc, devid, id, hwid)
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| D | platform-spi_imx.c | 9 #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ argument
13 .iobase = soc ## _ ## type ## hwid ## _BASE_ADDR, \
15 .irq = soc ## _INT_ ## type ## hwid, \
18 #define imx_spi_imx_data_entry(soc, type, devid, id, hwid, size) \ argument
19 [id] = imx_spi_imx_data_entry_single(soc, type, devid, id, hwid, size)
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| /arch/arm64/kernel/ |
| D | smp.c | 450 u64 hwid; in of_get_cpu_mpidr() local
463 hwid = of_read_number(cell, of_n_addr_cells(dn)); in of_get_cpu_mpidr()
467 if (hwid & ~MPIDR_HWID_BITMASK) { in of_get_cpu_mpidr()
471 return hwid; in of_get_cpu_mpidr()
480 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid) in is_mpidr_duplicate() argument
485 if (cpu_logical_map(i) == hwid) in is_mpidr_duplicate()
527 u64 hwid = processor->arm_mpidr; in acpi_map_gic_cpu_interface() local
530 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid); in acpi_map_gic_cpu_interface()
534 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) { in acpi_map_gic_cpu_interface()
535 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid); in acpi_map_gic_cpu_interface()
[all …]
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| /arch/arm/kernel/ |
| D | devtree.c | 89 u32 hwid; in arm_dt_init_cpu_maps() local
109 hwid = be32_to_cpu(*cell++); in arm_dt_init_cpu_maps()
111 } while (!hwid && prop_bytes > 0); in arm_dt_init_cpu_maps()
113 if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) { in arm_dt_init_cpu_maps()
126 if (WARN(tmp_map[j] == hwid, in arm_dt_init_cpu_maps()
141 if (hwid == mpidr) { in arm_dt_init_cpu_maps()
156 tmp_map[i] = hwid; in arm_dt_init_cpu_maps()
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| /arch/arm64/include/asm/ |
| D | smp.h | 51 static inline void set_cpu_logical_map(int cpu, u64 hwid) in set_cpu_logical_map() argument
53 __cpu_logical_map[cpu] = hwid; in set_cpu_logical_map()
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| /arch/ia64/kernel/ |
| D | irq.c | 56 void set_irq_affinity_info (unsigned int irq, int hwid, int redir) in set_irq_affinity_info() argument
60 cpumask_of(cpu_logical_id(hwid))); in set_irq_affinity_info()
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| /arch/x86/include/asm/ |
| D | mce.h | 315 #define HWID_MCATYPE(hwid, mcatype) (((hwid) << 16) | (mcatype)) argument
325 struct smca_hwid *hwid; member
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| /arch/openrisc/kernel/ |
| D | setup.c | 153 u32 hwid; in setup_find_cpu_node() local
157 if (of_property_read_u32(cpun, "reg", &hwid)) in setup_find_cpu_node()
159 if (hwid == cpu) in setup_find_cpu_node()
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| /arch/x86/kernel/cpu/mce/ |
| D | amd.c | 127 if (!b->hwid) in smca_get_bank_type()
130 return b->hwid->bank_type; in smca_get_bank_type()
269 if (smca_banks[bank].hwid && smca_banks[bank].hwid->hwid_mcatype != 0) in smca_configure()
283 smca_banks[bank].hwid = s_hwid; in smca_configure()
1193 if (smca_banks[bank].hwid->count == 1) in get_name()
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| /arch/powerpc/xmon/ |
| D | xmon.c | 2584 unsigned int hwid = get_hard_smp_processor_id(cpu); in dump_one_xive() local
2588 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid); in dump_one_xive()
2589 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid); in dump_one_xive()
2590 opal_xive_dump(XIVE_DUMP_TM_OS, hwid); in dump_one_xive()
2591 opal_xive_dump(XIVE_DUMP_TM_USER, hwid); in dump_one_xive()
2592 opal_xive_dump(XIVE_DUMP_VP, hwid); in dump_one_xive()
2593 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid); in dump_one_xive()
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