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Searched refs:ieee754_csr (Results 1 – 22 of 22) sorted by relevance

/arch/mips/math-emu/
Dsp_simple.c16 if (ieee754_csr.abs2008) { in ieee754sp_neg()
22 oldrm = ieee754_csr.rm; in ieee754sp_neg()
23 ieee754_csr.rm = FPU_CSR_RD; in ieee754sp_neg()
25 ieee754_csr.rm = oldrm; in ieee754sp_neg()
34 if (ieee754_csr.abs2008) { in ieee754sp_abs()
40 oldrm = ieee754_csr.rm; in ieee754sp_abs()
41 ieee754_csr.rm = FPU_CSR_RD; in ieee754sp_abs()
46 ieee754_csr.rm = oldrm; in ieee754sp_abs()
Ddp_simple.c16 if (ieee754_csr.abs2008) { in ieee754dp_neg()
22 oldrm = ieee754_csr.rm; in ieee754dp_neg()
23 ieee754_csr.rm = FPU_CSR_RD; in ieee754dp_neg()
25 ieee754_csr.rm = oldrm; in ieee754dp_neg()
34 if (ieee754_csr.abs2008) { in ieee754dp_abs()
40 oldrm = ieee754_csr.rm; in ieee754dp_abs()
41 ieee754_csr.rm = FPU_CSR_RD; in ieee754dp_abs()
46 ieee754_csr.rm = oldrm; in ieee754dp_abs()
Ddp_sqrt.c67 oldcsr = ieee754_csr; in ieee754dp_sqrt()
68 ieee754_csr.mx &= ~IEEE754_INEXACT; in ieee754dp_sqrt()
69 ieee754_csr.sx &= ~IEEE754_INEXACT; in ieee754dp_sqrt()
70 ieee754_csr.rm = FPU_CSR_RN; in ieee754dp_sqrt()
114 ieee754_csr.rm = FPU_CSR_RZ; in ieee754dp_sqrt()
115 ieee754_csr.sx &= ~IEEE754_INEXACT; in ieee754dp_sqrt()
120 if (ieee754_csr.sx & IEEE754_INEXACT || t.bits != y.bits) { in ieee754dp_sqrt()
122 if (!(ieee754_csr.sx & IEEE754_INEXACT)) in ieee754dp_sqrt()
150 ieee754_csr = oldcsr; in ieee754dp_sqrt()
Dieee754.h154 #define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.fcr31)) macro
158 return (ieee754_csr.rm); in ieee754_getrm()
163 return (ieee754_csr.rm = rm); in ieee754_setrm()
171 return (ieee754_csr.cx); in ieee754_getcx()
178 return (ieee754_csr.cx & n); in ieee754_cxtest()
186 return (ieee754_csr.sx); in ieee754_getsx()
193 return (ieee754_csr.sx = 0); in ieee754_clrsx()
200 return (ieee754_csr.sx & n); in ieee754_sxtest()
239 ieee754_csr.nan2008])
251 ieee754_csr.nan2008])
[all …]
Dieee754dp.c32 return ieee754_csr.nan2008 ^ qbit; in ieee754dp_issnan()
45 if (ieee754_csr.nan2008) { in ieee754dp_nanxcpt()
61 switch (ieee754_csr.rm) { in ieee754dp_get_rounding()
98 if (ieee754_csr.nod) { in ieee754dp_format()
102 switch(ieee754_csr.rm) { in ieee754dp_format()
166 switch (ieee754_csr.rm) { in ieee754dp_format()
188 if (ieee754_csr.mx & IEEE754_UNDERFLOW) in ieee754dp_format()
Dieee754sp.c32 return ieee754_csr.nan2008 ^ qbit; in ieee754sp_issnan()
45 if (ieee754_csr.nan2008) { in ieee754sp_nanxcpt()
61 switch (ieee754_csr.rm) { in ieee754sp_get_rounding()
98 if (ieee754_csr.nod) { in ieee754sp_format()
102 switch(ieee754_csr.rm) { in ieee754sp_format()
165 switch (ieee754_csr.rm) { in ieee754sp_format()
187 if (ieee754_csr.mx & IEEE754_UNDERFLOW) in ieee754sp_format()
Dieee754int.h23 ieee754_csr.cx = 0; in ieee754_clearcx()
28 ieee754_csr.cx |= flags; in ieee754_setcx()
29 ieee754_csr.sx |= flags; in ieee754_setcx()
36 return ieee754_csr.mx & x; in ieee754_setandtestcx()
61 else if (ieee754_csr.nan2008 ^ !(vm & SP_MBIT(SP_FBITS - 1))) \
99 else if (ieee754_csr.nan2008 ^ !(vm & DP_MBIT(DP_FBITS - 1))) \
121 if (ieee754_csr.nod) { \
132 if (ieee754_csr.nod) { \
Dsp_fdp.c41 if (!ieee754_csr.nan2008) { in ieee754sp_fdp()
58 if ((ieee754_csr.rm == FPU_CSR_RU && !xs) || in ieee754sp_fdp()
59 (ieee754_csr.rm == FPU_CSR_RD && xs)) in ieee754sp_fdp()
Ddp_sub.c83 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754dp_sub()
158 if (ieee754_csr.rm == FPU_CSR_RD) in ieee754dp_sub()
Ddp_add.c83 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754dp_add()
154 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754dp_add()
Dsp_add.c83 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754sp_add()
153 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754sp_add()
Dsp_sub.c83 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754sp_sub()
155 if (ieee754_csr.rm == FPU_CSR_RD) in ieee754sp_sub()
Ddp_rint.c54 switch (ieee754_csr.rm) { in ieee754dp_rint()
Dsp_rint.c55 switch (ieee754_csr.rm) { in ieee754sp_rint()
Dsp_maddf.c119 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in _sp_maddf()
231 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in _sp_maddf()
Dsp_sqrt.c90 switch (ieee754_csr.rm) { in ieee754sp_sqrt()
Dsp_tlong.c68 switch (ieee754_csr.rm) { in ieee754sp_tlong()
Ddp_tint.c67 switch (ieee754_csr.rm) { in ieee754dp_tint()
Dsp_tint.c72 switch (ieee754_csr.rm) { in ieee754sp_tint()
Ddp_tlong.c72 switch (ieee754_csr.rm) { in ieee754dp_tlong()
Dcp1emu.c1424 ieee754_csr_save = ieee754_csr; \
1426 ieee754_csr_save.cx |= ieee754_csr.cx; \
1427 ieee754_csr_save.sx |= ieee754_csr.sx; \
1429 ieee754_csr.cx |= ieee754_csr_save.cx; \
1430 ieee754_csr.sx |= ieee754_csr_save.sx; \
1974 oldrm = ieee754_csr.rm; in fpu_emu()
1976 ieee754_csr.rm = MIPSInst_FUNC(ir); in fpu_emu()
1978 ieee754_csr.rm = oldrm; in fpu_emu()
2020 oldrm = ieee754_csr.rm; in fpu_emu()
2022 ieee754_csr.rm = MIPSInst_FUNC(ir); in fpu_emu()
[all …]
Ddp_maddf.c150 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in _dp_maddf()
291 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in _dp_maddf()