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Searched refs:mpidr (Results 1 – 25 of 25) sorted by relevance

/arch/arm/mach-milbeaut/
Dplatsmp.c25 unsigned int mpidr, cpu, cluster; in m10v_boot_secondary() local
30 mpidr = cpu_logical_map(l_cpu); in m10v_boot_secondary()
31 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_boot_secondary()
32 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_boot_secondary()
48 unsigned int mpidr, cpu, cluster; in m10v_smp_init() local
59 mpidr = read_cpuid_mpidr(); in m10v_smp_init()
60 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_smp_init()
61 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_smp_init()
78 unsigned int mpidr, cpu; in m10v_cpu_kill() local
80 mpidr = cpu_logical_map(l_cpu); in m10v_cpu_kill()
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/arch/arm/common/
Dmcpm_platsmp.c22 unsigned int mpidr; in cpu_to_pcpu() local
24 mpidr = cpu_logical_map(cpu); in cpu_to_pcpu()
25 *pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in cpu_to_pcpu()
26 *pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in cpu_to_pcpu()
73 unsigned int mpidr, pcpu, pcluster; in mcpm_cpu_die() local
74 mpidr = read_cpuid_mpidr(); in mcpm_cpu_die()
75 pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_die()
76 pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_die()
Dmcpm_entry.c241 unsigned int mpidr, cpu, cluster; in mcpm_cpu_power_down() local
245 mpidr = read_cpuid_mpidr(); in mcpm_cpu_power_down()
246 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_power_down()
247 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_power_down()
330 unsigned int mpidr = read_cpuid_mpidr(); in mcpm_cpu_suspend() local
331 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_suspend()
332 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_suspend()
342 unsigned int mpidr, cpu, cluster; in mcpm_cpu_powered_up() local
349 mpidr = read_cpuid_mpidr(); in mcpm_cpu_powered_up()
350 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_powered_up()
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DbL_switcher.c124 unsigned int mpidr = read_mpidr(); in bL_switchpoint() local
125 unsigned int clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); in bL_switchpoint()
149 unsigned int mpidr, this_cpu, that_cpu; in bL_switch_to() local
236 mpidr = read_mpidr(); in bL_switch_to()
237 pr_debug("after switch: CPU %d MPIDR %#x\n", this_cpu, mpidr); in bL_switch_to()
238 BUG_ON(mpidr != ib_mpidr); in bL_switch_to()
516 int bL_switcher_get_logical_index(u32 mpidr) in bL_switcher_get_logical_index() argument
523 mpidr &= MPIDR_HWID_BITMASK; in bL_switcher_get_logical_index()
528 if ((mpidr == cpu_logical_map(cpu)) || in bL_switcher_get_logical_index()
529 (mpidr == cpu_logical_map(pairing))) in bL_switcher_get_logical_index()
/arch/arm/kernel/
Dtopology.c197 unsigned int mpidr; in store_cpu_topology() local
202 mpidr = read_cpuid_mpidr(); in store_cpu_topology()
205 if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { in store_cpu_topology()
211 if (mpidr & MPIDR_MT_BITMASK) { in store_cpu_topology()
213 cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
214 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
215 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2); in store_cpu_topology()
219 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
220 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
238 cpu_topology[cpuid].package_id, mpidr); in store_cpu_topology()
Dsleep.S38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, mpidr, mask
39 and \mpidr, \mpidr, \mask @ mask out MPIDR bits
40 and \dst, \mpidr, #0xff @ mask=aff0
43 and \mask, \mpidr, #0xff00 @ mask = aff1
47 and \mask, \mpidr, #0xff0000 @ mask = aff2
78 ldmia r0, {r1, r6-r8} @ r1 = mpidr mask (r6,r7,r8) = l[0,1,2] shifts
157 ldmia r2, { r3-r6 } @ r3 = mpidr mask (r4,r5,r6) = l[0,1,2] shifts
Ddevtree.c77 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; in arm_dt_init_cpu_maps() local
141 if (hwid == mpidr) { in arm_dt_init_cpu_maps()
Dsetup.c591 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; in smp_setup_processor_id() local
592 u32 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in smp_setup_processor_id()
605 pr_info("Booting Linux on physical CPU 0x%x\n", mpidr); in smp_setup_processor_id()
/arch/arm/mach-hisi/
Dplatmcpm.c100 unsigned int mpidr, cpu, cluster; in hip04_boot_secondary() local
104 mpidr = cpu_logical_map(l_cpu); in hip04_boot_secondary()
105 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_boot_secondary()
106 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_boot_secondary()
155 unsigned int mpidr, cpu, cluster; in hip04_cpu_die() local
158 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_die()
159 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_cpu_die()
160 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_cpu_die()
193 unsigned int mpidr, cpu, cluster; in hip04_cpu_kill() local
196 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_kill()
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/arch/arm64/kernel/
Dsleep.S38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
39 and \mpidr, \mpidr, \mask // mask out MPIDR bits
40 and \dst, \mpidr, #0xff // mask=aff0
42 and \mask, \mpidr, #0xff00 // mask = aff1
45 and \mask, \mpidr, #0xff0000 // mask = aff2
48 and \mask, \mpidr, #0xff00000000 // mask = aff3
Dsetup.c87 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; in smp_setup_processor_id() local
88 set_cpu_logical_map(0, mpidr); in smp_setup_processor_id()
97 (unsigned long)mpidr, read_cpuid_id()); in smp_setup_processor_id()
Dsmp.c198 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; in secondary_start_kernel() local
254 cpu, (unsigned long)mpidr, in secondary_start_kernel()
/arch/arm/mach-sunxi/
Dmc_smp.c394 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_boot_secondary() local
396 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_boot_secondary()
397 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in sunxi_mc_smp_boot_secondary()
398 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in sunxi_mc_smp_boot_secondary()
446 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_cpu_die() local
449 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_cpu_die()
450 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in sunxi_mc_smp_cpu_die()
451 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in sunxi_mc_smp_cpu_die()
536 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_cpu_kill() local
541 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_cpu_kill()
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/arch/arm64/include/asm/
Dsmp_plat.h34 static inline int get_logical_index(u64 mpidr) in get_logical_index() argument
38 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
Dcputype.h21 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ argument
22 ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
Dkvm_host.h487 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
/arch/arm/mach-exynos/
Dplatsmp.c53 u32 mpidr = cpu_logical_map(cpu); in platform_do_lowpower() local
54 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in platform_do_lowpower()
324 u32 mpidr = cpu_logical_map(cpu); in exynos_boot_secondary() local
325 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos_boot_secondary()
429 u32 mpidr = cpu_logical_map(cpu); in exynos_cpu_die() local
430 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos_cpu_die()
Dsuspend.c267 unsigned int mpidr = read_cpuid_mpidr(); in exynos5420_cpu_suspend() local
268 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in exynos5420_cpu_suspend()
269 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos5420_cpu_suspend()
453 unsigned int mpidr, cluster; in exynos5420_prepare_pm_resume() local
455 mpidr = read_cpuid_mpidr(); in exynos5420_prepare_pm_resume()
456 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in exynos5420_prepare_pm_resume()
/arch/arm/include/asm/
DbL_switcher.h55 int bL_switcher_get_logical_index(u32 mpidr);
71 static inline int bL_switcher_get_logical_index(u32 mpidr) { return -EUNATCH; } in bL_switcher_get_logical_index() argument
Dsmp_plat.h80 static inline int get_logical_index(u32 mpidr) in get_logical_index() argument
84 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
Dcputype.h58 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ argument
59 ((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
Dkvm_host.h329 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
/arch/arm/mach-vexpress/
Dtc2_pm.c204 unsigned int mpidr, cpu, cluster; in tc2_pm_init() local
244 mpidr = read_cpuid_mpidr(); in tc2_pm_init()
245 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in tc2_pm_init()
246 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in tc2_pm_init()
/arch/arm/mach-shmobile/
Dheadsmp.S103 add r5, r5, r2 @ array of per-cpu mpidr values
/arch/arm64/kvm/
Dsys_regs.c609 u64 mpidr; in reset_mpidr() local
618 mpidr = (vcpu->vcpu_id & 0x0f) << MPIDR_LEVEL_SHIFT(0); in reset_mpidr()
619 mpidr |= ((vcpu->vcpu_id >> 4) & 0xff) << MPIDR_LEVEL_SHIFT(1); in reset_mpidr()
620 mpidr |= ((vcpu->vcpu_id >> 12) & 0xff) << MPIDR_LEVEL_SHIFT(2); in reset_mpidr()
621 vcpu_write_sys_reg(vcpu, (1ULL << 31) | mpidr, MPIDR_EL1); in reset_mpidr()