Home
last modified time | relevance | path

Searched refs:msk (Results 1 – 25 of 26) sorted by relevance

12

/arch/powerpc/include/asm/
Dfeature-fixups.h39 #define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \ argument
45 FTR_ENTRY_LONG msk; \
61 #define END_FTR_SECTION_NESTED(msk, val, label) \ argument
63 MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
65 #define END_FTR_SECTION(msk, val) \ argument
66 END_FTR_SECTION_NESTED(msk, val, 97)
68 #define END_FTR_SECTION_NESTED_IFSET(msk, label) \ argument
69 END_FTR_SECTION_NESTED((msk), (msk), label)
71 #define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk)) argument
72 #define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0) argument
[all …]
Dcell-pmu.h31 #define CBE_PM_SPU_ADDR_TRACE_SET(msk) (((msk) & 0x3) << 9) argument
Dxive.h74 u32 msk; member
/arch/unicore32/mm/
Dproc-macros.S94 .macro va2pa, va, pa, tbl, msk, off, err=990f
105 ldw \msk, [\tbl+], #0 @ get the mask
108 and \pa, \pa, \msk @ pa <- phys addr of 2nd pt
110 cntlo \tbl, \msk @ use tbl as temp reg
127 andn \tbl, \va, \msk
128 and \pa, \pa, \msk
/arch/arm/plat-orion/
Dgpio.c458 u32 msk; in orion_gpio_dbg_show() local
465 msk = 1 << i; in orion_gpio_dbg_show()
466 is_out = !(io_conf & msk); in orion_gpio_dbg_show()
472 out & msk ? "hi" : "lo", in orion_gpio_dbg_show()
473 blink & msk ? "(blink )" : ""); in orion_gpio_dbg_show()
478 (data_in ^ in_pol) & msk ? "hi" : "lo", in orion_gpio_dbg_show()
479 in_pol & msk ? "lo" : "hi"); in orion_gpio_dbg_show()
480 if (!((edg_msk | lvl_msk) & msk)) { in orion_gpio_dbg_show()
484 if (edg_msk & msk) in orion_gpio_dbg_show()
486 if (lvl_msk & msk) in orion_gpio_dbg_show()
[all …]
/arch/sparc/kernel/
Dsun4d_smp.c186 int msk; member
202 work->single = work->msk = work->resched = 0; in smp4d_ipi_init()
214 if (work->msk) { in sun4d_ipi_interrupt()
215 work->msk = 0; in sun4d_ipi_interrupt()
253 work->msk = 1; in sun4d_ipi_mask_one()
Dleon_smp.c265 int msk; member
301 work->single = work->msk = work->resched = 0; in leon_ipi_init()
328 work->msk = 1; in leon_ipi_mask_one()
353 if (work->msk) { in leonsmp_ipi_interrupt()
354 work->msk = 0; in leonsmp_ipi_interrupt()
/arch/arm/mach-footbridge/
Dnetwinder-hw.c365 int msk; in nw_cpld_modify() local
372 for (msk = 8; msk; msk >>= 1) { in nw_cpld_modify()
373 int bit = current_cpld & msk; in nw_cpld_modify()
/arch/mips/txx9/generic/
Dirq_tx4939.c184 __raw_writel(0, &tx4939_ircptr->msk.r); in tx4939_irq_init()
194 __raw_writel(irc_elevel, &tx4939_ircptr->msk.r); in tx4939_irq_init()
/arch/arm64/boot/dts/mediatek/
Dmt2712-evb.dts129 mediatek,u3p-dis-msk = <0x1>;
141 //mediatek,u3p-dis-msk = <0x1>;
/arch/h8300/kernel/
Dptrace_h.c48 #define OPTABLE(ptn, msk, len, jmp) \ argument
51 .bitmask = msk, \
/arch/powerpc/kvm/
Dbook3s_xive.h256 static inline u32 __xive_read_eq(__be32 *qpage, u32 msk, u32 *idx, u32 *toggle) in __xive_read_eq() argument
265 *idx = (*idx + 1) & msk; in __xive_read_eq()
Dbook3s_xive_template.c157 hirq = __xive_read_eq(qpage, q->msk, &idx, &toggle); in GLUE()
432 idx = (idx + 1) & q->msk; in GLUE()
Dbook3s_xive.c349 max = (q->msk + 1) - XIVE_Q_GAP; in xive_try_pick_queue()
1430 irq = __xive_read_eq(q->qpage, q->msk, &idx, &toggle); in xive_pre_save_queue()
2061 idx = (idx + 1) & q->msk; in kvmppc_xive_debug_show_queues()
/arch/arm/common/
Dsa1111.c587 u32 msk, val; in sa1111_gpio_set_multiple() local
589 msk = *mask; in sa1111_gpio_set_multiple()
593 sa1111_gpio_modify(reg + SA1111_GPIO_PADWR, msk & 15, val); in sa1111_gpio_set_multiple()
594 sa1111_gpio_modify(reg + SA1111_GPIO_PASSR, msk & 15, val); in sa1111_gpio_set_multiple()
595 sa1111_gpio_modify(reg + SA1111_GPIO_PBDWR, (msk >> 4) & 255, val >> 4); in sa1111_gpio_set_multiple()
596 sa1111_gpio_modify(reg + SA1111_GPIO_PBSSR, (msk >> 4) & 255, val >> 4); in sa1111_gpio_set_multiple()
597 sa1111_gpio_modify(reg + SA1111_GPIO_PCDWR, (msk >> 12) & 255, val >> 12); in sa1111_gpio_set_multiple()
598 sa1111_gpio_modify(reg + SA1111_GPIO_PCSSR, (msk >> 12) & 255, val >> 12); in sa1111_gpio_set_multiple()
/arch/x86/kernel/
Dprocess.c506 unsigned long debugctl, msk; in __switch_to_xtra() local
510 msk = tifn & _TIF_BLOCKSTEP; in __switch_to_xtra()
511 debugctl |= (msk >> TIF_BLOCKSTEP) << DEBUGCTLMSR_BTF_SHIFT; in __switch_to_xtra()
/arch/mips/include/asm/octeon/
Dcvmx-asxx-defs.h411 uint64_t msk:64; member
413 uint64_t msk:64;
/arch/powerpc/sysdev/xive/
Dcommon.c96 q->idx = (q->idx + 1) & q->msk; in xive_read_eq()
232 idx = (idx + 1) & q->msk; in xive_dump_eq()
481 max = (q->msk + 1) - 1; in xive_try_pick_target()
Dspapr.c479 q->msk = order ? ((1u << (order - 2)) - 1) : 0; in xive_spapr_configure_queue()
Dnative.c148 q->msk = order ? ((1u << (order - 2)) - 1) : 0; in xive_native_configure_queue()
/arch/x86/include/asm/
Dapic.h295 void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec);
/arch/mips/include/asm/txx9/
Dtx4939.h88 struct tx4939_le_reg msk; member
/arch/powerpc/sysdev/
Dmpic.c1699 u32 msk = 1 << hard_smp_processor_id(); in mpic_setup_this_cpu() local
1716 mpic_irq_read(i, MPIC_INFO(IRQ_DESTINATION)) | msk); in mpic_setup_this_cpu()
1745 u32 msk = 1 << hard_smp_processor_id(); in mpic_teardown_this_cpu() local
1756 mpic_irq_read(i, MPIC_INFO(IRQ_DESTINATION)) & ~msk); in mpic_teardown_this_cpu()
/arch/powerpc/kernel/
Dtraps.c1361 unsigned long msk = 0xf0000000UL >> shift; in emulate_instruction() local
1364 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); in emulate_instruction()
/arch/arm/mach-omap2/
Dsram243x.S257 mov r8, #1 @ valid cfg msk

12