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Searched refs:r29 (Results 1 – 25 of 77) sorted by relevance

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/arch/microblaze/lib/
Ddivsi3.S19 swi r29, r1, 4
34 addik r29, r0, 32 /* initialize the loop count */
42 addik r29, r29, -1
53 addik r29, r29, -1
54 beqi r29, loop_end
67 lwi r29, r1, 4
Dmodsi3.S21 swi r29, r1, 4
37 addik r29, r0, 32 /* initialize the loop count */
42 addik r29, r29, -1
53 addik r29, r29, -1
54 beqi r29, loop_end
67 lwi r29, r1, 4
Dudivsi3.S21 swi r29, r1, 0
28 addik r29, r0, 32 /* initialize the loop count */
56 addik r29, r29, -1
67 addik r29, r29, -1
68 beqi r29, loop_end
78 lwi r29, r1, 0
Dumodsi3.S20 swi r29, r1, 0
28 addik r29, r0, 32 /* initialize the loop count */
58 addik r29, r29, -1
69 addik r29, r29, -1
70 beqi r29, loop_end
80 lwi r29, r1, 0
/arch/ia64/lib/
Dxor.S18 .save pr, r29
19 mov r29 = pr
44 mov pr = r29, -1
56 .save pr, r29
57 mov r29 = pr
85 mov pr = r29, -1
97 .save pr, r29
98 mov r29 = pr
129 mov pr = r29, -1
141 .save pr, r29
[all …]
Dmemcpy_mck.S59 #define t15 r29
77 and r29=0x7,in1
88 and r29=0x7,in1
97 cmp.ne p14,p0=0,r29 // check src alignment
141 shr.u r29=in2,5 // number of 32-byte iteration
144 add cnt=-1,r29 // ctop iteration adjustment
145 cmp.eq p10,p0=r29,r0 // do we really need to loop?
337 mov r29=ip // jmp_table thread
340 add r29=.jump_table - 1b - (.jmp1-.jump_table), r29
344 add r29=r29,r28 // jmp_table thread
[all …]
/arch/microblaze/kernel/
Dhead.S247 andi r29, r9, 0x100000
248 bneid r29, 1f
250 andi r29, r9, 0x400000
251 bneid r29, 1f
253 andi r29, r9, 0x1000000
254 bneid r29, 1f
277 andi r29, r10, 0x100000
278 bneid r29, 1f
280 andi r29, r10, 0x400000
281 bneid r29, 1f
[all …]
/arch/parisc/kernel/
Dpacache.S81 copy %arg2, %r29 /* Init middle loop count */
87 addib,COND(>) -1, %r29, fitmanymiddle /* Middle loop decr */
96 copy %arg2, %r29 /* init middle loop count */
99 addib,COND(>) -1, %r29, fitonemiddle /* Middle loop count decr */
125 copy %arg2, %r29 /* Init middle loop count */
131 addib,COND(>) -1, %r29, fdtmanymiddle /* Middle loop decr */
140 copy %arg2, %r29 /* init middle loop count */
143 addib,COND(>) -1, %r29, fdtonemiddle /* Middle loop count decr */
551 copy %r28, %r29
552 depdi 1, 41,1, %r29 /* Form aliased virtual address 'from' */
[all …]
Dsyscall.S187 STREG %r29, TASK_PT_GR29(%r1) /* return value 1 */
199 ldo -16(%r30),%r29 /* Reference param save area */
340 ldo -16(%r30),%r29 /* Reference param save area */
391 ldo -16(%r30),%r29 /* Reference param save area */
413 ldo -16(%r30),%r29 /* Reference param save area */
713 shlw %r23, 2, %r29
714 blr %r29, %r0
801 blr %r29, %r0
806 13: ldb 0(%r26), %r29
807 sub,= %r29, %r25, %r0
[all …]
Dentry.S63 tovirt_r1 %r29
122 STREG %r29,PT_GR29(%r9)
125 copy %r9,%r29
136 STREG %r29,PT_GR29(%r9)
139 copy %r9,%r29
143 LDREG PT_GR1(%r29), %r1
144 LDREG PT_GR30(%r29),%r30
145 LDREG PT_GR29(%r29),%r29
912 ldo -16(%r30),%r29 /* Reference param save area */
921 copy %r16,%r29
[all …]
/arch/hexagon/kernel/
Dhead.S186 {r29.H = #HI(init_thread_union); r0.H = #HI(_THREAD_SIZE); }
187 {r29.L = #LO(init_thread_union); r0.L = #LO(_THREAD_SIZE); }
191 {r29 = add(r29,r0); THREADINFO_REG = r29; }
/arch/openrisc/kernel/
Dentry.S136 l.lwz r29,PT_GPR29(r1) ;\
174 l.sw PT_GPR29(r1),r29 ;\
212 l.sw PT_GPR29(r1),r29 ;\
645 ENABLE_INTERRUPTS(r29) // enable interrupts, r29 is temp
661 l.movhi r29,hi(sys_call_table)
662 l.ori r29,r29,lo(sys_call_table)
664 l.add r29,r29,r11
665 l.lwz r29,0(r29)
667 l.jalr r29
706 DISABLE_INTERRUPTS(r27,r29)
[all …]
/arch/parisc/include/asm/
Dasmregs.h18 ret1: .reg %r29
19 sl: .reg %r29
29 ap: .reg r29
62 r29: .reg %r29
/arch/ia64/kernel/
Divt.S165 (p7) ld8 r29=[r28] // get *pud (may be 0)
167 (p7) cmp.eq.or.andcm p6,p7=r29,r0 // was pud_present(*pud) == NULL?
168 dep r17=r18,r29,3,(PAGE_SHIFT-3) // r17=pmd_offset(pud,addr)
235 cmp.ne.or.andcm p6,p7=r19,r29 // did *pud change
261 mov r29=b0 // save b0
269 mov b0=r29
305 mov r29=b0 // save b0
313 mov b0=r29
356 (p8) mov r29=b0 // save b0
396 (p8) mov r29=b0 // save b0
[all …]
Dminstate.h53 MOV_FROM_IPSR(p0,r29); /* M */ \
89 st8 [r16]=r29; /* save cr.ipsr */ \
92 tbit.nz p15,p0=r29,IA64_PSR_I_BIT; \
93 mov r29=b0 \
126 st8 [r16]=r29,16; /* save b0 */ \
189 .mem.offset 8,0; st8.spill [r3]=r29,16; \
Dentry.S296 mov.m r29=ar.unat
346 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
378 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
426 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
728 RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection
731 ld8 r29=[r2],16 // M0|1 load cr.ipsr
850 adds r29=PT(R24)+16,r12
856 ld8.fill r24=[r29]
860 ld8 r29=[r2],16 // load b7
890 mov b7=r29
[all …]
/arch/powerpc/kernel/
Didle_book3s.S74 std r29,-8*17(r1)
119 ld r29,-8*17(r1)
182 std r29,-8*17(r1)
Dmisc.S70 PPC_STL r29,20*SZL(r3)
98 PPC_LL r29,20*SZL(r3)
/arch/hexagon/include/uapi/asm/
Dregisters.h178 unsigned long r29; member
217 pt_psp(regs) = (regs)->r29 = (sp);\
Dptrace.h28 #define user_stack_pointer(regs) ((regs)->r29)
Duser.h43 unsigned long r29; member
/arch/csky/abiv2/inc/abi/
Dswitch_context.h29 unsigned long r29; member
/arch/arc/include/asm/
Dunwind.h43 unsigned long r29; member
102 PTREGS_INFO(r29), \
/arch/powerpc/crypto/
Daes-spe-regs.h35 #define rG1 r29
/arch/nds32/kernel/
Dsleep.S57 pushm $r29, $r30
63 popm $r29, $r30

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